TW200723440A - Method for forming trench using hard mask with high selectivity and isolation method for semiconductor device using the same - Google Patents

Method for forming trench using hard mask with high selectivity and isolation method for semiconductor device using the same

Info

Publication number
TW200723440A
TW200723440A TW095112766A TW95112766A TW200723440A TW 200723440 A TW200723440 A TW 200723440A TW 095112766 A TW095112766 A TW 095112766A TW 95112766 A TW95112766 A TW 95112766A TW 200723440 A TW200723440 A TW 200723440A
Authority
TW
Taiwan
Prior art keywords
hard mask
forming
high selectivity
semiconductor device
same
Prior art date
Application number
TW095112766A
Other languages
English (en)
Inventor
Myung-Ok Kim
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200723440A publication Critical patent/TW200723440A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
TW095112766A 2005-11-12 2006-04-11 Method for forming trench using hard mask with high selectivity and isolation method for semiconductor device using the same TW200723440A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050108315A KR100801308B1 (ko) 2005-11-12 2005-11-12 고선택비 하드마스크를 이용한 트렌치 형성 방법 및 그를이용한 반도체소자의 소자분리 방법

Publications (1)

Publication Number Publication Date
TW200723440A true TW200723440A (en) 2007-06-16

Family

ID=38041458

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095112766A TW200723440A (en) 2005-11-12 2006-04-11 Method for forming trench using hard mask with high selectivity and isolation method for semiconductor device using the same

Country Status (5)

Country Link
US (1) US20070111467A1 (zh)
JP (1) JP2007134668A (zh)
KR (1) KR100801308B1 (zh)
CN (1) CN1963999A (zh)
TW (1) TW200723440A (zh)

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US20080160707A1 (en) * 2006-12-27 2008-07-03 Jin Hyo Jung Method for fabricating sesmiconductor device
JP2008227360A (ja) * 2007-03-15 2008-09-25 Elpida Memory Inc 半導体装置の製造方法
KR100849190B1 (ko) * 2007-03-19 2008-07-30 주식회사 하이닉스반도체 반도체 소자의 미세 패턴 형성 방법
WO2008115600A1 (en) * 2007-03-21 2008-09-25 Olambda, Inc. Multi-material hard mask or prepatterned layer for use with multi-patterning photolithography
KR100871967B1 (ko) * 2007-06-05 2008-12-08 주식회사 하이닉스반도체 반도체 소자의 미세 패턴 형성 방법
US7553770B2 (en) * 2007-06-06 2009-06-30 Micron Technology, Inc. Reverse masking profile improvements in high aspect ratio etch
US7718546B2 (en) * 2007-06-27 2010-05-18 Sandisk 3D Llc Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon
KR101588909B1 (ko) 2007-12-21 2016-02-12 램 리써치 코포레이션 실리콘 구조의 제조 및 프로파일 제어를 이용한 딥 실리콘 에칭
JP4909912B2 (ja) * 2008-01-10 2012-04-04 株式会社東芝 パターン形成方法
JP2009206394A (ja) * 2008-02-29 2009-09-10 Nippon Zeon Co Ltd 炭素系ハードマスクの形成方法
US9018098B2 (en) * 2008-10-23 2015-04-28 Lam Research Corporation Silicon etch with passivation using chemical vapor deposition
US8173547B2 (en) 2008-10-23 2012-05-08 Lam Research Corporation Silicon etch with passivation using plasma enhanced oxidation
TW201036142A (en) * 2009-03-16 2010-10-01 Nanya Technology Corp Manufacturing method of supporting structure for stack capacitor in semiconductor device
KR101073075B1 (ko) * 2009-03-31 2011-10-12 주식회사 하이닉스반도체 이중 패터닝 공정을 이용한 반도체장치 제조 방법
US20110014726A1 (en) 2009-07-20 2011-01-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming shallow trench isolation structure
US8227339B2 (en) * 2009-11-02 2012-07-24 International Business Machines Corporation Creation of vias and trenches with different depths
CN102299112B (zh) * 2010-06-23 2014-05-14 中芯国际集成电路制造(上海)有限公司 制作沟槽和浅沟槽隔离结构的方法
TW201216331A (en) * 2010-10-05 2012-04-16 Applied Materials Inc Ultra high selectivity doped amorphous carbon strippable hardmask development and integration
JP2013030582A (ja) 2011-07-28 2013-02-07 Elpida Memory Inc 半導体装置の製造方法
KR101821413B1 (ko) * 2011-09-26 2018-01-24 매그나칩 반도체 유한회사 소자분리구조물, 이를 포함하는 반도체 소자 및 그의 소자분리 구조물 제조 방법
CN102354679A (zh) * 2011-10-25 2012-02-15 上海华力微电子有限公司 浅沟槽隔离的制作方法
US8841181B2 (en) 2012-03-07 2014-09-23 United Microelectronics Corp. Method for fabricating semiconductor device and PMOS device fabricated by the method
CN103376487B (zh) * 2012-04-23 2016-03-30 中芯国际集成电路制造(上海)有限公司 光栅的制作方法
JP2015079793A (ja) * 2013-10-15 2015-04-23 東京エレクトロン株式会社 プラズマ処理方法
KR20150107756A (ko) * 2013-11-06 2015-09-23 맷슨 테크놀로지, 인크. 수직 앤에이앤디 디바이스에 대한 새로운 마스크 제거 방법
CN104752152B (zh) * 2013-12-29 2018-07-06 北京北方华创微电子装备有限公司 一种沟槽刻蚀方法及刻蚀装置
CN104022066B (zh) * 2014-04-22 2017-01-04 上海华力微电子有限公司 一种形成浅沟槽隔离的方法
KR102171265B1 (ko) 2014-07-08 2020-10-28 삼성전자 주식회사 금속 마스크를 이용한 패터닝 방법 및 그 패터닝 방법을 포함한 반도체 소자 제조방법
CN105428317B (zh) * 2014-09-12 2018-09-18 中国科学院微电子研究所 半导体器件制造方法
CN108389830B (zh) * 2017-02-03 2020-10-16 联华电子股份有限公司 掩模的制作方法
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Also Published As

Publication number Publication date
KR100801308B1 (ko) 2008-02-11
CN1963999A (zh) 2007-05-16
KR20070050737A (ko) 2007-05-16
JP2007134668A (ja) 2007-05-31
US20070111467A1 (en) 2007-05-17

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