TW200634897A - Method for fabricating semiconductor device - Google Patents

Method for fabricating semiconductor device

Info

Publication number
TW200634897A
TW200634897A TW094119536A TW94119536A TW200634897A TW 200634897 A TW200634897 A TW 200634897A TW 094119536 A TW094119536 A TW 094119536A TW 94119536 A TW94119536 A TW 94119536A TW 200634897 A TW200634897 A TW 200634897A
Authority
TW
Taiwan
Prior art keywords
layer
gate
doped polysilicon
forming
oxide film
Prior art date
Application number
TW094119536A
Other languages
English (en)
Other versions
TWI261295B (en
Inventor
Sang-Cheol Kim
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Application granted granted Critical
Publication of TWI261295B publication Critical patent/TWI261295B/zh
Publication of TW200634897A publication Critical patent/TW200634897A/zh

Links

Classifications

    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47LDOMESTIC WASHING OR CLEANING; SUCTION CLEANERS IN GENERAL
    • A47L15/00Washing or rinsing machines for crockery or tableware
    • A47L15/0097Combination of dishwashers with other household appliances
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47LDOMESTIC WASHING OR CLEANING; SUCTION CLEANERS IN GENERAL
    • A47L15/00Washing or rinsing machines for crockery or tableware
    • A47L15/42Details
    • A47L15/4278Nozzles
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B02CRUSHING, PULVERISING, OR DISINTEGRATING; PREPARATORY TREATMENT OF GRAIN FOR MILLING
    • B02CCRUSHING, PULVERISING, OR DISINTEGRATING IN GENERAL; MILLING GRAIN
    • B02C18/00Disintegrating by knives or other cutting or tearing members which chop material into fragments
    • B02C18/06Disintegrating by knives or other cutting or tearing members which chop material into fragments with rotating knives
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H01L21/823425MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • H10B12/053Making the transistor the transistor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Food Science & Technology (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Element Separation (AREA)
TW094119536A 2005-03-18 2005-06-13 Method for fabricating semiconductor device TWI261295B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050022618A KR100596833B1 (ko) 2005-03-18 2005-03-18 반도체 소자의 제조 방법

Publications (2)

Publication Number Publication Date
TWI261295B TWI261295B (en) 2006-09-01
TW200634897A true TW200634897A (en) 2006-10-01

Family

ID=36933986

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094119536A TWI261295B (en) 2005-03-18 2005-06-13 Method for fabricating semiconductor device

Country Status (6)

Country Link
US (1) US7332397B2 (zh)
JP (1) JP5047475B2 (zh)
KR (1) KR100596833B1 (zh)
CN (1) CN100576505C (zh)
DE (1) DE102005026315B4 (zh)
TW (1) TWI261295B (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101374335B1 (ko) * 2007-09-10 2014-03-17 삼성전자주식회사 국부적으로 두꺼운 유전막을 갖는 리세스 채널트랜지스터의 제조방법 및 관련된 소자
JP2009182114A (ja) * 2008-01-30 2009-08-13 Elpida Memory Inc 半導体装置およびその製造方法
CN101572224B (zh) * 2008-04-30 2011-05-04 中芯国际集成电路制造(北京)有限公司 多晶硅浮栅的制作方法以及半导体器件的制作方法
KR101051577B1 (ko) 2009-06-30 2011-07-22 주식회사 하이닉스반도체 반도체 소자 및 그의 형성 방법
US8507996B2 (en) * 2009-09-22 2013-08-13 Taiwan Semiconductor Manufacturing Company, Ltd. Block contact plugs for MOS devices
KR101095802B1 (ko) * 2010-01-07 2011-12-21 주식회사 하이닉스반도체 반도체 소자 및 그의 제조 방법
KR101164974B1 (ko) * 2010-12-15 2012-07-12 에스케이하이닉스 주식회사 매립게이트를 구비한 반도체 장치 제조방법
KR102188883B1 (ko) * 2013-12-13 2020-12-14 삼성전자주식회사 반도체 소자 및 그 제조 방법
CN108257957A (zh) * 2016-12-29 2018-07-06 联华电子股份有限公司 半导体结构及其制作方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621451A (ja) * 1992-07-02 1994-01-28 Seiko Epson Corp 半導体装置の製造方法
JPH06318680A (ja) * 1993-05-10 1994-11-15 Nec Corp 半導体記憶装置およびその製造方法
JPH07161977A (ja) * 1993-12-06 1995-06-23 Hitachi Ltd 半導体装置とその製造方法
KR0136995B1 (ko) * 1994-09-08 1998-04-24 김주용 비휘발성메모리셀의제조방법
JP2751909B2 (ja) * 1996-02-26 1998-05-18 日本電気株式会社 半導体装置の製造方法
US5808340A (en) * 1996-09-18 1998-09-15 Advanced Micro Devices, Inc. Short channel self aligned VMOS field effect transistor
US5780340A (en) * 1996-10-30 1998-07-14 Advanced Micro Devices, Inc. Method of forming trench transistor and isolation trench
JP3295393B2 (ja) * 1998-10-26 2002-06-24 松下電器産業株式会社 半導体装置の製造方法
US6204128B1 (en) * 1998-10-26 2001-03-20 Matsushita Electronics Corporation Method for fabricating semiconductor device
US6303448B1 (en) * 1998-11-05 2001-10-16 Taiwan Semiconductor Manufacturing Company Method for fabricating raised source/drain structures
KR100370129B1 (ko) * 2000-08-01 2003-01-30 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법
KR100574487B1 (ko) * 2002-07-05 2006-04-27 주식회사 하이닉스반도체 반도체소자의 mos 트랜지스터 제조방법
KR100835505B1 (ko) * 2002-07-18 2008-06-04 주식회사 하이닉스반도체 반도체 소자의 제조 방법
KR100539276B1 (ko) * 2003-04-02 2005-12-27 삼성전자주식회사 게이트 라인을 포함하는 반도체 장치 및 이의 제조 방법
KR20040102720A (ko) * 2003-05-29 2004-12-08 주식회사 하이닉스반도체 반도체소자의 제조방법
JP2005019584A (ja) 2003-06-25 2005-01-20 Sony Corp 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
JP2006261625A (ja) 2006-09-28
US20060211229A1 (en) 2006-09-21
US7332397B2 (en) 2008-02-19
KR100596833B1 (ko) 2006-07-04
DE102005026315B4 (de) 2010-11-25
CN1835208A (zh) 2006-09-20
DE102005026315A1 (de) 2006-09-21
JP5047475B2 (ja) 2012-10-10
TWI261295B (en) 2006-09-01
CN100576505C (zh) 2009-12-30

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees