TW200305128A - Display apparatus and its driving method - Google Patents

Abstract

The purpose of the present invention is to suppress the dim animation, which is occurred in the dynamic image display action of the LCD display such as the sustaining type display apparatus, and the generated deterioration of image quality under the condition of having no damage of the display brightness of the dynamic image. At each echo of the horizontally synchronous signal to sequentially write the image data of each one line inputted to the display apparatus into each line of pixel array of the display apparatus N times (N is a natural number and larger than 2), the writing action of sequentially writing-in the blanking data for lowering pixel array brightness is repetitively conducted M times (M is a natural number and is smaller than N). The writing-in data (N+M) times for the pixel array are obtained by distributing the N line horizontal scan period of image data so as to make the horizontal flyback period of writing data into pixel array shorter than the horizontal flyback period contained in the horizontal scan period of the image data. In addition, by using the start signal of scan for the beginning of selection action of each pixel, the separation of the pixel array between the pixel row of image data, which is written in N times, and the pixel row of blanking data, which is written in M times, is adjusted.

Description

200305128 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to a liquid crystal display device and an EL type (Electro Luminescence-type) display device having a plurality of pixels each provided with a switching element. And the so-called Active Matrix-type Display Device represented by a display device having a plurality of pixels each having a light emitting element such as a Light Emitting Diode, and particularly relates to a hold-type display device (Hold- Type Display Device) Blanking Process. [Prior art] Liquid crystal display devices have been popularized to maintain the brightness of most pixels in a two-dimensional array at a desired value during a specific period (for example, one frame period), so that the display is input from the outside every frame. A display device for video data (in the case of television broadcasting, video signals). In an active matrix scheme liquid crystal display device, as shown in FIG. 9, each pixel of a plurality of pixels PIX in a two-dimensional arrangement or a matrix configuration is provided with a pixel electrode PX and an image is supplied for this. Signal switching element SW (such as a thin film transistor). The device configured with most pixels PIX in this way is also called Pixel Array 101, and the pixel array of liquid crystal display device is also called liquid crystal display panel. In this pixel array, most pixels PIX constitute a so-called screen that displays an image. — In the pixel array 101 shown in FIG. 9, juxtapose a plurality of gate lines 10 (gate lines) extending in the horizontal direction and a longitudinal direction (crossing the gate lines 10) Direction) most of the extended data lines 83946 -6-200305128 12 (Data Lines, also known as video signal lines). As shown in FIG. 9, along the gate lines 10 identified by the addresses of G1, G2, Gj, Gj + 1, Gn + 1, Gn, a so-called pixel column (Pixel) in which a plurality of pixels PIX are arranged in the horizontal direction is formed. Row) along the data lines 12 identified by the addresses of DIR, DIG, DIB, DmB, and so-called pixel columns in which a plurality of pixels PIX are arranged in the vertical direction. The gate line 10 is set by a scanning driver 103 (Scanning Driver, also referred to as a scanning driving circuit) to apply a voltage signal to the pixels PIX constituting each corresponding pixel column (in the case of FIG. 9, below each gate line). The switching element SW turns on or off the electrical connection between the pixel electrode PX provided in each pixel PIX and one of the data lines 12. The operation of controlling the switching element SW group provided in a specific pixel row by applying a voltage signal to the gate line 10 corresponding to this is also called "Selecting Line (s)" or "Scanning". The above-mentioned voltage signal applied to the gate line 10 by the scan driver 103 is also referred to as a scan signal. For example, the ON state of the switching element SW is controlled by a pulse generated by the signal waveform. In addition, according to the type of the switching element SW, this scanning signal is supplied to the scanning signal line (equivalent to the gate line 10) as a current signal. On the other hand, the data driver 102 (Data Driver, also known as the image signal driving circuit) applies a display signal (in the case of a liquid crystal display device, a voltage signal) called a gray scale voltage r (Gray Scale Voltage or Tone Voltage). To each data line 12, the above-mentioned hue voltage is applied to each pixel PIX selected by the scanning signal in the pixel PIX constituting each corresponding pixel row (in the case of FIG. 9, to the right of each data line). When this liquid crystal display device is assembled in a TV device, the image data (image signal) received in the interlace mode (interlace mode) has a field period of 200305128 or the image data received in the progressive scanning method (progressive mode) During the 1 frame period, the above-mentioned scanning signals are sequentially applied to the gate by the gate line 10 and the tone voltage generated by the image data received during the 1 field or 1 frame period is sequentially applied to each pixel column. Group of pixels. In each pixel, a so-called capacitive element is formed in which the liquid crystal layer 1C is sandwiched between the pixel electrode PX and a counter electrode CT to which a reference voltage or a common voltage (common voltage) is applied via a signal line. The electric field generated between the pixel electrode ρχ * counter electrode CT is used to control the light transmittance of the liquid crystal layer 1 ^. As described above, when the operation of sequentially selecting the gate lines G1 to Gn is performed during each field period or frame period of the image data, in theory, for example, the hue applied to a certain pixel during a certain field period The voltage will be maintained until another tone voltage is received during the next field period after this one field period. Therefore, the light transmittance of the liquid crystal layer LC held by the pixel electrode ρχ and the above-mentioned counter electrode ct (in other words, the brightness of a pixel having the pixel electrode) will be maintained in a specific state during each field. . In this way, during each field period and each period, the brightness of the pixels is maintained on the-side, and the liquid crystal display device that displays images on one side is also called a hold-type display device (HQld_type this device), which is different from receiving an image signal. Immediately, the so-called impulse_type device such as a cathode ray tube (cathode ray tube) that emits light from a phosphor provided at each pixel by electron beam irradiation. ○ Image data sent by a television or computer, etc. It has a format corresponding to the pulse type display device. When comparing the driving method of the above-mentioned liquid crystal display device with that of television broadcasting, the scanning signal is applied at a time corresponding to the reciprocal of the horizontal scanning frequency of television broadcasting at 83,936 200305128, and every 10 gates, and the vertical frequency Time, complete the application of G1sGni scanning signal to all gate lines. The pulse-type display device corresponds to the horizontal synchronization pulse and causes the pixels arranged in the horizontal direction of the screen to emit pulses sequentially in each horizontal scanning period. However, in the hold-type display device, as described above, During the scanning, a pixel column is selected, and a voltage signal is supplied to < most of the pixels contained in the pixel column, and after the horizontal scanning period ends, the pixels are maintained with a voltage signal. 0 above, referring to FIG. 9 and taking the liquid crystal display device as an example to describe the operation of the holding type display π device, but this liquid crystal layer] 1 (: Electroluminescent type (EL type) display replaced with an electroluminescent material Element, or a light-emitting diode array type display device in which a capacitive element in which a liquid crystal layer LC is sandwiched by a pixel electrode ρχ and a counter electrode CT is replaced with a light-emitting diode. Although there is a difference in the amount of carrier injection to display an image), it can be used as a hold-type display device. In a display device in which carriers are injected into a light-emitting material (light-emitting area) to generate an image, the above-mentioned display signal Xichun is supplied to each pixel in the pixel array as a current signal. However, since the display device of the retention type keeps the brightness of each pixel to display an image, for example, during each frame described above, the image is displayed. When replacing a display image with a consecutive pair of frame periods, it may not fully respond to the brightness of the pixels. This phenomenon can be set in a certain frame period (such as the i-th frame period) The fact that a pixel with a specific brightness maintains the brightness corresponding to the first frame period until the next frame period (for example, the second frame period) after the frame period is scanned. This phenomenon can also be explained by The first part of the voltage signal (or the carrier injected here) sent to the pixel during the period 83946 200305128 will interfere with the voltage signal (or the '/ 王 入 到 到') that will be sent to the pixel during the second frame Carriers) are explained by the so-called hysteresis effect. For example, in Japanese Patent Publication No. 06_〇16223, Japanese Patent Publication No. 07044670, Japanese Patent Publication No. 05-073005, In Japanese Patent Application Laid-Open No. 11-109921 and Japanese Patent Application Laid-Open No. 2000--16628, the solutions to the above-mentioned problems related to the responsiveness of image display using a hold-type light-emitting display device have been disclosed. Among them, in Japan In Japanese Patent Application Laid-Open No. 11_109921, it was discussed that when a moving image is played on a liquid crystal display device (an example of a display device using a hold-type light emitting device), the contour ratio of an object is generated. The cathode pulses of elementary pulsed light emission are more unclear, the so-called Biurring phenomenon. In order to solve this blurring phenomenon, Japanese Unexamined Patent Publication No. U_1099221 discloses the pixel array of a liquid crystal display panel (Pixels Array, A two-dimensional array of a plurality of pixel groups) is divided into two equal parts above and below the screen (image display area), and a liquid crystal display device of a data line driving circuit is provided in each of the divided pixel arrays. This liquid crystal display device is implemented on one side One gate line is selected in each of the upper and lower pixel arrays, and a total of two gate lines are selected in the upper and lower pixel arrays. One side is a so-called dual scanning operation in which a data line driving circuit provided in each pixel array supplies an image signal. While performing this double-scanning operation within 1 frame period, the upper and lower phases are shifted, and each data line driving circuit inputs a signal equivalent to a display image (so-called image signal) to a pixel array, and blanks the image. Image, such as a black image, is input to the other pixel array. Therefore, in one frame period, the period during which the image is displayed is 83946 • 10- 200305128 and the period during which the display is blanked out, and the period during which the image is maintained in the entire screen can be shortened. A dynamic image display characteristic equivalent to that of a cathode ray tube can also be obtained. As a conventional technology, it is disclosed in Japanese Patent Application Laid-open No. Hei ... Divides a pixel array of a liquid crystal display panel into two upper and lower pixel arrays. A data line driving circuit is provided in each of the divided pixel arrays. Select one for each and two gate lines for the top and bottom. On the one hand, each driving circuit performs a double-scanning action on the display area divided into the upper and lower halves. On the one hand, the upper and lower phases are staggered, and the insertion (interj) 〇late is blanked. Image (black image). That is, the image display period and the blanking period can be obtained during the i-frame period, and the image retention period can be shortened. Therefore, the liquid crystal display device can be used to obtain the dynamic image display performance of pulse-type light emission like a cathode ray tube. . On the other hand, Japanese Patent Application Laid-Open No. 2001-166280 has disclosed another technique for suppressing the blurring phenomenon of a moving image displayed by a liquid crystal display device. The driving method of the liquid crystal display device described in the publication is to divide the supply period of the above-mentioned image signal to the selection line of the gate line for the pixel group corresponding to each gate line, and to supply the image signal to the selection corresponding to the first half thereof. The pixel group of the gate line will supply the voltage signal of the black display that performs these signals to the pixel group corresponding to the other gate line selected in the latter half. The outline of the pixel array of FIG. 9 is driven in accordance with the time chart of FIG. 10. In each period, the gate lines G1, G2, ..., Gj'GjH, ... in the pixel array 101 are gate pulses (Gate Pulses) generated by the scanning signals transmitted by the scan driver 103 to each of the gate lines. , Also known as brake selection pulse). In other words, 83946 -11- 200305128 the switching element SW provided at each pixel p τ χ corresponding to the gate line that received the gate pulse is in a state in which the pixel ρχ can receive the display signal transmitted by the gate line 12 by the gate pulse. For example, it can be removed from the data driver that will be supplied to the image signal corresponding to the gate line G1 "pixel group (because # is listed in the column direction, & also known as the pixel column). Output, and use idle pulse to select inter_. In FIG. 10, the gate pulse is represented by the waveform of the # trace signal in the W state to the High state. During the period when the trace signal is in the High state, the line between receiving the scan signal is selected. In the driving method of the liquid crystal display device disclosed in Japanese Patent Application Laid-Open No. 200i! 66, 'in order to set the scene', the display signal of the taste of the image data (Figure 10t L2 '· ...' Lj + 1 '· _ · Medium work) is supplied to each pixel column, and G1, G2, Gj,

Gj + 1) time tg 'assign the latter half of the allocation as the selection of another line (for the gate line Gi' is the gate line Gj), the pixels display a black display signal (Figure! B) Supply to the pixel column corresponding to this other gate line. Within this time (tg-tb), the closed line of the image data selected to be written into the phosphorus and the black line selected in the following time (corresponding to the The two-color display signal is selected by the pixel array = selection. Therefore, when the image data is written to the pixel array and the image is eliminated 'in the period of ㈣zheng', it can be like a pulse type The display device like this produces this image on the screen and reduces its dynamic image phenomenon. The problem to be solved by the invention is the liquid crystal display device 83946 -12- 200305128 contained in the aforementioned Japanese Patent Application Laid-Open No. H-Ka and Japanese Patent Application Laid-Open When the liquid crystal display device contained in 2GGH6628G is compared, the latter can select two gate lines at the same time, and supply the image data display signal corresponding to the line to the pixel row corresponding to one gate line, and the pixels are not black. The display signal is supplied to the pixel columns corresponding to the other gate lines, so as to ensure that the display signal is supplied to the time of each pixel constituting each pixel column. ^ However, since the pixel column remains corresponding to the shadow during one frame period The period of data display signal is limited to half, especially when the brightness of the pixel needs to be corrected from the supply of the display signal to the delay time until the corresponding value is reached, it will appear that the pixel has reached sufficient brightness. Previously, it was necessary to receive the problem of displaying the pixel next to the display signal. In order to solve this problem, the intensity of the display signal must be increased, so the output of the data driver 102 had to be increased. Also, as described above, Japanese Patent Laid-Open Since the liquid crystal display device contained in U_1〇9921 divides its pixel array into two areas, data line driving circuits have to be set in each area. Therefore, the structure of the liquid crystal display panel and its peripheral circuits naturally tends to be complicated and the size On the other hand, the liquid crystal display device described in Japanese Patent Application Laid-Open No. 2001-166280 has a larger structure and size than the liquid crystal display panel and its peripheral circuits in Japanese Patent Application Laid-Open No. 11-109921. The liquid crystal display device is practical, but it can also be known from the time chart of FIG. 10 that since one line of image data is written into the pixel row, Part of the selection period of the gate line is allocated as another gate line for selecting to write black data into another pixel row, so it cannot be denied that the problem of shortening the time for supplying the display signal to each pixel row may occur. In SID 01 Digest (The 2001 International Symposium of the Society for Information Display), pages 994-997, describes a technique for solving the above-mentioned problems of the liquid crystal display device of Japanese Patent Publication No. 83946 -13-200305128. When using this technique, the time-ratio ratio at time tg should be kept below ⑽ to ensure the writing time of pixel-like image data. On the other hand, the writing of the black data in the pixel row is based on the writing of the image data in the pixel row in the majority of times, and the writing is repeated to make up for the short writing time tb &lt;. Therefore, 'corresponding to the writing of the image data of the gate line ⑴, the data will be written to the gate lines Gj, Gj + 2, Gj + 4, ··· (the latter two are not shown in the figure; there is no explicit correspondence in 〇 In the writing of the image data of the gate line G2, I will love: ^ into the gate line, ㈣, ·, ... (the latter two are not shown in the figure ^). So 'even if the total value can be used To ensure the black-in time of the black line of the gate line, but its time is not enough to compensate for the delay of the brightness response of the pixel, which is still insufficient. With the writing of the black data of the line once, that is: Compared with the pixels with sufficient display signal, the display signal is divided into several parts: in the case of under-received pixels, the brightness response will also be slower. Therefore, the application should eliminate the "signal of the display signal of the image data in the black data." After the start, it still = left in the pixel 'The action of erasing the image data from the writing of the image, which should have ended between __, may undeniably become half-way. The purpose of the present invention is to provide a liquid crystal display device Changes in the structure around the pixel array of the representative '4 π device A display device and a driving method for suppressing the animated blur of the dynamic picture line displayed on the minimum plane, and suitable for filling the knife to maintain its display brightness. [Summary of the Invention] The "display device of the present invention includes a pixel array" , Which consists of a majority of pixels divided into 83,946 -14- 200305128 including switching elements (such as field effect transistors such as thin film transistors) along the first direction (such as the horizontal direction of the display screen) into a plurality of pixel columns, along with and The second direction intersecting the first direction (for example, the vertical direction of the display screen) is configured as a plurality of pixel lines; (2) most of the first signal lines (for example, a scanning signal line) are along the aforementioned first direction of the aforementioned pixel array Extending and arranging to extend along the second direction and respectively transmit a first signal (such as a gate pulse) to the aforementioned switching element group included in the aforementioned pixel column corresponding thereto; (3) a first driving circuit ( For example, a scan driving circuit), it is from one end of the pixel array along the second direction to the other end, and each of the first- Line, sequentially output the aforementioned _ signal to select the aforementioned pixel row corresponding to each of the-signal lines; (4) most of the second signal line (eg, ^ image signal line and data signal line), which are along the aforementioned pixels The array extends in the aforementioned second direction and is arranged to extend along the aforementioned first direction and supplies a second signal to the aforementioned pixel row selected by the aforementioned-signal including the aforementioned pixel corresponding to the aforementioned pixel row respectively. At least one of the following: (5) a second driving circuit (such as a data driving circuit), which converts the aforementioned two = to each of the second signal lines of the aforementioned second signal line (such as a time controller), which It is to send the first control signal of the control material to the aforementioned first driving circuit, and to output the second control signal and image data of the control signal output interval to the second driving circuit. The -th drive circuit is repeatedly executed in accordance with "the Y-line output of the N-th signal-scanning process pin number, the spring-signal line-scanning receiver number and other (<× ΝΝ) line other than 83946- 15-200305128 (in other words, 3 A group of the first signal lines selected by a scanning process) outputs M times of the first signal every Z lines of the second scanning process (γ, N, z, Μ are respectively satisfying m &lt; N and Y &lt; n / MSZ The natural number of relationships). The second driving circuit is a display control circuit that receives 1 line of image data every 1 horizontal scanning cycle, and repeatedly executes the second scanning circuit to output N times of the second line of image data using the first scanning process. The signal &lt; operation, and the operation of outputting the second signal of the mask pixel array M times by the aforementioned second scanning process. The above image data is input and supplied to the display device by an image signal source located outside the display device such as a television, a personal computer, and a DVD playback device (Dignal Versatile Disc Piayer). In addition, the image data is inputted to the display device multiple times for line data (also called line data or horizontal data) every 1 horizontal scanning cycle, so as to supply the image information of i screens to the display device. The image signal is input to the display device according to the image information of each frame. The time required here is called the frame period. Relatively, 'corresponds to the output of the display signal from the aforementioned second drive circuit, and selects the aforementioned pixel column and inputs the display signal to this pixel column &lt; The period is called a horizontal period or horizontal period. In other words, this horizontal period also corresponds to the output interval of the second signal from the second driving circuit. Set the retrace period included in this horizontal period to be shorter than the horizontal retrace period included in the period during which the 1-line image data is input to the display device (horizontal scan period) and the 1-line image data is input to The input interval of the display device is shorter than that corresponding to the display signal output to the pixel array. Therefore, setting at least N line memories in the display control circuit will be based on 83946 • 16- 200305128 per 1 line When the image data input to the display device in turn is stored in the line memories of the N line 1 memory once and read out by the line memory in sequence, the image data of the N line injury can be input to the display device. The difference between the time required and the time required to sequentially (N times) transfer it to the second drive circuit is effectively used in the operation of outputting the second signal to the pixel array in the aforementioned second scanning process. In the second scanning process, the second signal that masks the pixel array becomes a blanking signal because the brightness of the pixel inputted to this signal is set to be lower than the brightness before the inputting signal '. Another example of the display device of the present invention includes (丨) a pixel array, which includes two components along a first direction (for example, the horizontal direction of the display screen) and a second direction that intersects it (for example, the vertical direction of the display screen). Dimensional configuration of most pixels; (2) Most first signal lines (such as scanning signal lines), which are arranged along the second direction and arranged on the aforementioned pixel array, and the transmission selection is along the aforementioned first The scanning signal of each pixel row of the plurality of pixel rows formed by the groups arranged in one direction; (3) Most of the second signal lines (such as image signal lines) are arranged along the aforementioned first direction and arranged on the aforementioned pixel array. And supply the display signals that determine the brightness of the pixels contained in the aforementioned pixel row selected by the aforementioned scanning signal; (4) the first driving circuit (such as the scanning signal driving circuit), which outputs the scanning signal to the aforementioned majority Each of the first signal lines of the first signal line; (5) a second driving circuit (such as an asset driving circuit), which outputs a display signal to most of the aforementioned second signal lines Each second signal line; and (6) a display control circuit (such as a time controller), which responds to the horizontal synchronization signal (such as the signal used to specify the above-mentioned horizontal scanning period) of the image data during each frame period. Line input and use the aforementioned first drive circuit 83946 -17- 200305128 &amp; production of the first clock signal output of the signal 7 and the scan start signal transmission using the first clock signal to instruct to start the selection process of the aforementioned pixel row To the first driving circuit, and transmitting the second clock signal and the image data to the second driving circuit together. In this display device, the second driving circuit responds to the clock signal as described above every 1 frame period, and repeatedly repeatedly executes the image display signal N times (N It is the output of 2 or more, and the output of M times (M is a natural number satisfying m &lt; n), and the blanking signal that masks the image displayed in the aforementioned pixel array. Also, in this display device, the first driving circuit uses the aforementioned scanning signal output during each of the aforementioned one frame, and repeatedly executes it interactively whenever the output y image N is inputted by the aforementioned pixel array. One end (such as the upper end of the screen) selects the gamma line (γ &lt; N / M) in order from the other end (such as the lower end of the screen), and the pixel array One end sequentially selects the processes of the second signal line (Z-N / M) of the first signal line other than the ΥχN selected when outputting the N times of image display signals. The first signal line group of γ × N and the first signal line group of ZZ × selected in each process can also be arranged in the pixel array to be separated from each other by sandwiching other first signal lines that do not belong to any of them. . In addition, when these signal line groups are adjacent to each other, when one end of the pixel array sequentially arranges the first signal line group of Ζ × N and the first signal line group of χ × M, the first signal corresponding to γ × N The hold time of the image display signal of the pixels of the line group will be longer. That is, it is because the pixel is selected by one of the first signal line groups of the Υ × N (receiving the image display signal) from the time of 83936 -18 · 200305128 to the one selected by the first signal line group of the ZXM ( The period up to the moment when the blanking signal is accepted will be longer. , J The scan start signal is determined during each period, so that the first order of each y is selected: the process of the signal line is started at the __ end of the pixel array, and the first order of each Z is selected sequentially The signal line process starts at the second moment from the y-end of the pixel array. Set the interval between the first moment in an old period and the first moment that follows it to be longer than the second moment and the second moment (the beginning of each gamma that starts to choose the next movement: the signal line Time) can be increased! ^ During the period, the pixel array maintains the ratio of the time during which the image is displayed (in other words, the image display time of the frame) and increases the display brightness. Also, at least one pair of building periods can be used to make the first time of the scan start signal of each building period different from the second time interval (the time when the blanking signal is supplied to the pixel array). The waveform of the scan start signal contains the first pulse corresponding to the first time and the second pulse corresponding to the second time. At least one pair of building periods can also be used to make the first pulse and the second pulse of each building period The intervals are different. In addition, the display device of the present invention includes: a pixel array, which includes a plurality of pixel rows arranged along the first direction and arranged along the second direction intersecting with the first direction; (b ) A scanning drive circuit that selects each pixel row of the plurality of pixel rows by using a tracing signal; ⑷ a data drive circuit that supplies a display signal to at least one row selected by using the scanning signals of the plurality of pixel rows Including each pixel of the pixel; and "display control circuit" which is a display operator of the pixel array. The outline of the driving method of this display device 83946 • 19- 200305128 is as follows: (1) The image data is input to the display device line by line during each horizontal scanning period. (2) Using this-shell material driving circuit, repeat the execution (2A) to sequentially generate the display signal corresponding to this on the first line of the image data, and output the display signal to the pixel array N times (N is 2 or more) And (2B) the first step and (2B) generate a display signal that sets the brightness of the aforementioned pixel below the brightness of the pixel of the aforementioned first step (in other words, the brightness before receiving the display signal of this 2B step). And the second process of outputting the display signal to the pixel array M times (M is a natural number less than N). (3) Using this scanning driving circuit, repeat the execution (38). In the first step, in each row (where Υ is a natural number less than N / M) from the end of the pixel array center to the other end along the aforementioned In the second direction, the first selection process of selecting the plurality of pixel columns in sequence, and (3B) in the second step from the aforementioned pixel array in every two columns (2 is N / M or more (natural number))-from end to end Along the second direction, the second selection process other than the (XXN) row selected by the first selection process of the plurality of pixel columns is sequentially selected. The above-mentioned steps (2A) and (3A), and order (2B) and X The sequence (3B) is carried out in a substantially parallel manner. The details of the functions, effects, and ideal embodiments of the present invention described above can be further understood from the following description. [Embodiment] The following I The drawings illustrate specific embodiments of the present invention. In the drawings referred to in the following description, parts having the same function 83946-20-200305128 are denoted by the same symbols, and repeated descriptions are omitted. First Embodiment Hereinafter, a first embodiment of a display device and a driving method thereof according to the present invention will be described with reference to FIGS. 1 to 7. In this embodiment, a series of pixel arrays (pixeis Array) are used in an active matrix liquid crystal display. A display device (a liquid crystal display device) of an active matrix-type Uqind Crystal Display panel is used as a reference example, but its basic structure and driving method are also applicable to the use of an electroluminescence array and a light-emitting diode array. (Light Emitting Diode Array) is used as the display device of the pixel array. Figure 1 shows the display signal output (data driver output voltage) of the pixel array of the display device and the scanning signal line G1 in the pixel array corresponding to each display signal output. Time chart of selecting time. Figure 2 shows the input and output of the image data (input data) and the output and output of the image data (driver data) to the display control circuit (time-dependent controller) of the display device. Time (time chart. FIG. 3 is a diagram showing the outline of the present embodiment of the display device of the present invention &lt; structure diagram (Block diagram), the pixel array shown here and the detailed inner valleys around it (an example is shown in Figure 9. The aforementioned time charts of Figures 1 and 2 are based on the display device (liquid crystal display) shown in Figure 3 Device). The figure shows the display signal of the pixel array of the display device in this embodiment, the output signal (data driver output voltage), the scanning signal corresponding to the output of each display signal, and the spring selection time. The other is the time chart of the example. During the output period of the display signal, the 'scan shift register-type scan driver (S) 丨 Caca ng Driver selects 4 scanning signal lines and supplies the display signals to the corresponding The scanning signal lines in these scanning signal lines. FIG. 5 shows that each of the 4 line memories contained in the line memory circuit (Line_ Memory Circuit) 105 provided in the display control circuit 104 (refer to FIG. 3) is 83946 -21-200305128. Wnte) Time of 4 lines of image data, and read (Read_〇ut) the image data from each line memory, and transfer to the data driver (image data drive circuit) time &lt; time chart. Fig. 6 shows the display time of the image data and the blanking data in this embodiment of the pixel array in the driving method of the display device according to the present invention. FIG. 7 shows the luminance response of a pixel (corresponding to a change in light transmittance of a liquid crystal layer of a pixel) when the display π device (liquid crystal display device) of this embodiment is driven according to this display time. First, an outline of the display device 100 of this embodiment will be described with reference to FIG. 3. This display device 100 has a WXGA-level liquid crystal display panel (hereinafter referred to as a liquid crystal panel) as the pixel array 101. The pixel array 101 having WXGA-level resolution is not limited to a liquid crystal panel, and is characterized in that: in its screen, a pixel column of 768 lines is provided in the vertical direction, and the pixel column is composed of 1280 dots arranged in the horizontal direction. Made up of pixels. The display device of this embodiment &lt; The pixel array 101 is substantially the same as that described with reference to FIG. 9, but because of the resolution relationship, 768 lines of gate lines 10 and 10 are provided in the plane of the pixel array 101 respectively. 1280 lines of information line 12. Also, the pixel array 101 is arranged in a two-dimensional manner with 983 040 pixels PIX selected by the scanning signals transmitted by one of the former and receiving the display signal by one of the latter to generate an image using these pixels PIX. When a pixel array displays a color image, each pixel is cut in the horizontal direction according to the number of primary colors used for color display. For example, in a liquid crystal panel having a color filter corresponding to the three primary colors of light (red, green, and blue), the above The number of data lines 12 increased to 3840 lines, and the total number of pixels PIX contained in its 83946 -22- 200305128 display screen also became three times the above value. If the foregoing liquid crystal panel used as the pixel array 101 in this embodiment is described in more detail, each pixel PIX of the pixel PIX included in the liquid crystal panel has a thin film transistor (Thin Film Transistor, TFT for short) as a switching element SW. ). Each pixel performs its operation by using a so-called Normally Black-displaying Mode in which the supplied display signal becomes larger and brighter. Not only the liquid crystal panel of this embodiment, but also the pixels of the above-mentioned electroluminescent array and light-emitting diode array also perform their actions in a normally black display mode. In a liquid crystal panel which performs an operation in a normally black display mode, the hue voltage of the pixel electrode PX provided in the pixel PIX of FIG. 9 is applied from the data line 12 via the switching element SW and is applied to the liquid crystal layer LC. As the potential difference between the counter voltage (also referred to as a reference voltage or a common voltage) of the counter electrode CT facing the pixel electrode PX becomes larger, the light transmittance of the liquid crystal layer LC will increase, and the brightness of the pixel PIX will increase. In other words, the farther the value of the hue voltage of the display signal of the liquid crystal panel is from the value of the opposite voltage, the larger the display signal can be. In the pixel array (TFT-type liquid crystal panel) 101 shown in FIG. 3, similarly to the pixel array 101 shown in FIG. 9, display signals (tone voltage, gray scale voltage, or tone) corresponding to display data are respectively provided. Voltage) Applied to the data driver (display signal drive circuit) 12 of the data line (signal line) 12 provided here, and the scanning signal (voltage signal) is applied to the gate line (scanning line) 10 provided here. Scan driver (scan signal driver circuit) 103-1, 103-2, 103-3. In this embodiment, although the scan driver is divided into three along the so-called vertical direction of the pixel array 101, the number is not limited to 83946 -23- 200305128, and it can also be replaced by such functions. One scan driver in a unified set. The display control circuit (timing controller) 104 is used to control the above display data (driver data) 106 and the time signal (data driver control signal) corresponding to the display signal output here.

Data Driver Control Signal) 107 is transferred to the data driver 102 ′, and the scanning clock (Scanning Clock Signal) 12 and the scanning start signal (Scanning Start Signal) 113 are transferred to the scanning drivers 103_1, 103-2 φ, and 103-3. Although the scan control circuit 104 also transmits the corresponding scanning state selection signals (Scan-Condition Selecting Signal) 114-1, 114-2, and 114-3 to the scan drivers 103-1, 103-2, and 103-3, but The function will be described later. The scanning state selection signal is also called Display-Operation Selecting Signal from its function. The display control circuit 104 accepts an external image signal source from a display device such as a television, a personal computer, or a DVD player. The input image data (image signal) 120 and image control signal 121. A memory circuit for temporarily storing image data 120 is provided inside or around the display control circuit 104, but in this embodiment, a line memory circuit 105 is built in the display control circuit 104. The image control signal 121 includes a vertical synchronization signal (Vertical Synchronizing Signal) VSYNC, a horizontal synchronization signal (HSYNC), a dot clock signal (DOTCLK), and a display timing signal (Display Timing Signal) that control the transmission status of the image data. DTMG. The image data that causes the display device 100 to generate a 1-screen image is echoed (synchronized) to the vertical synchronization signal VSYNC and is input to the display control circuit 104 by 83946 -24- 200305128. In other words, the image data is in the ^ period specified by the vertical synchronization signal VSYNC (also known as the vertical scanning period and the frame period), and the image signal source is sequentially input to the display device 100 (display control circuit HM). '丨 The images of the screen are successively displayed in the pixel array ΗΠ. The image data during the period is input the line data (Line Data) contained in the horizontal synchronization signal HSYNC to the display device. In other words, each image data of the image data that is input to the display device during each frame period contains multiple U 'materials, which results in 4; the images of the screen will be sequentially based on the image of the horizontal level of each data line. It is generated by aligning in the vertical direction during every horizontal scanning period. The data of each pixel corresponding to the horizontal direction of one screen is to identify the data of each line at a period prescribed by the dot clock signal. ★ The image data 120 and the image control signal 121 are also input to the display device using a cathode ray tube (Cathode Ray Tube). Therefore, the imaging period is selected at each i level = and the electronic wire of each room needs to be scanned by the end position of the material. At the beginning of the sweeping field, this time will become empty in the transmission of image data. Therefore, the so-called flyback period, which does not help the transmission of image information, is also provided in the image data 12G. ⑽period) 7 domains. In the image data 120, the area display corresponding to the above-mentioned display time signal during the retrace period is identified as another area which is helpful for the transmission of image information. On the one hand, 100 copies of the active matrix display device described in this embodiment 1 use its data driver 102 to generate i-line image data (the above-mentioned line data) &lt; display signals, and these display signals correspond to the scan driver 103 of 83946- 25- 200305128 The selection action of the gate line ο is simultaneously output to most data lines (signal lines) 12 arranged in the pixel array ι〇1. Therefore, in theory, the line data can be continuously input to the pixel array from the horizontal scanning period to the next horizontal scanning period without interposing the flyback period, and from the frame period to the next i frame During this period, the image data is continuously input into the pixel array. Therefore, in the present embodiment &lt; display device 100, it can be generated according to the &lt; flightback period &gt; contained in shortening the horizontal scanning period (for distribution used to store 1 line of image data in the memory circuit 105). In the cycle, the display control circuit 104 is used to read out the image data (line data) from the memory circuit (line memory). This cycle is also reflected in the output signal to the pixel array 101 j output interval described later. Therefore, in the following, it is referred to as the horizontal period or the horizontal period of the pixel array operation. The display control circuit 104 generates an under-usual narrative signal CL1 that specifies this horizontal period, and forwards it to the data driver control signal 1 () 7__ Data driver 102. In this embodiment, since the image data of the tank ^ is stored in the memory circuit M (the above-mentioned horizontal scanning: interval), the time for reading it by the memory circuit 105 (the above is shortened) Horizontal period), 'so it is possible to remove the input of the blanking signal to the pixel array during each period, which indicates the memory circuit 105 for the display control circuit 104: time gate data input (Storage) and the image data output (read out)-for example: _: Pibu signal VSYNC—The image data input to the display device, such as the input data, •• Most of the data contained in it Line data (Image data of line 1). ^ "The data of line 1 contains the flyback period, and the response (synchronization) 83946 -26-200305128 Water 2 synchronization signal hsync is displayed by the control circuit 104. Once input to the memory circuit 1G5, the display circuit 1 () 4 reads the line data L1 stored in the memory circuit 105 in sequence according to the horizontal clock signal CL1 or a similar time signal as shown in the waveform of the output data. L2, L3, ···. At this time, the flyback period separating the line data L1, L2 ··· output by the memory circuit 105 along the time axis is shortened along the time axis. The line data input to the memory circuit 105 is separated by the line data of [2 ,, • • ·. The flyback period is shorter. Therefore, the line data of n &amp; (n * 2 乂 natural number) is input. The time required to reach the memory circuit 〇 05 and these line data are input by the memory circuit 105 The required period of time ^ line data output period) between the time when line data can be output by the memory circuit 105 to a natural number less than N) line data. In this embodiment, the memory circuit 105 can be used. The so-called remaining time of outputting the image data of the M line causes the pixel array 101 to perform another display action. In addition, the image data (in FIG. 2, the line data included here) is transferred to the data driver 102 before 'It will be temporarily stored in the memory circuit guard, so it will be read by the display control circuit 104 through a delay period corresponding to the storage period. When using a frame memory as the memory circuit 105, this delay period is equivalent to 1_ room. When the frequency of the image data ㈣Hz is input to the display device, because the period of time is about 33 ms (milliseconds), the user of the display device will not notice the delay of the display time of the image at the input time of the image data input to the display device, but As the above-mentioned memory circuit 105, most line memories are provided in the display device 100 to replace the frame memory, but "this delay time can be shortened" and the circuit control structure of the display control circuit 104 or its surroundings can be simplified 83946 -27- 200305128, or suppress its increase in size. Next, with reference to Fig. 5, an example of a driving method of the display device 100, which is a memory circuit 105, using a line memory that stores most line data, will be described. In the driving of the display device 100 constituted by this example, the N-line image data input period to the display control circuit 104 and the image data input period of the image data input from this line are used (will correspond to the N-line content, respectively). The display signal of the image data is generated by the data driver 102 successively during the above-mentioned remaining time, and the display signal that masks the display signal that has been held in the pixel array (the image data input to the pixel array during the previous frame) is written. (Hereinafter referred to as a blanking signal.) M times. In the driving method of the display device 100, each image data using the image driver 102 * N line image data is repeatedly executed one by one to generate a display signal, and it is output sequentially (total N times) corresponding to the horizontal clock signal Cl1. The first step to the pixel array 101 and the second step to output the blanking signal to the horizontal clock signal CL1 M times to the pixel array 101. Further description of the driving method of this display device will be described later with reference to FIG. 丨, but in FIG. 5, the above-mentioned N value is set to 4 and the M value is set to 1. As shown in FIG. 5, the memory circuit 105 has four line memories that can perform writing and reading of data independently from each other, and is sequentially input to the display device 100 in synchronization with the horizontal synchronization signal. The image data 120 of each line is sequentially stored in one of these line memories 1 to 4. In other words, the memory circuit 105 has a memory capacity of 4 lines. For example, during the acquisition period (eight calls—⑴⑽ Peri〇d) Tin of four lines of image data 120 obtained by the memory circuit 105, the four lines of image data circles 丨, W2, W3, and W4 are written by line 83946- 28- 200305128 Memory 1 is input to line memory 4 one by one. The acquisition period Tin of this image resource involves a time equivalent to four times the horizontal scanning period specified by the pulse interval of the horizontal synchronization message included in the image control signal 121. However, the M_Tin of the image data is ended because the image data is stored in the line memory 4 &lt; Yes, during this period, the image data stored in the line memory i, the line memory 2 and the line memory 3 will be displayed and controlled The circuit 读 出 is read out one by one to be used as image data. ^ Therefore, the acquisition period of the first-line image data,., W3, and W4 is as soon as Tin is finished, and the next four-line image data can be immediately started. 5, W6 , W7, are stored in the line memory ⑴ I said in the middle of the month, when the line memory input and the line memory "output" to attach the image data to each line reference symbol, for example, the former = wi changed to The latter is R1. This reflects the following phenomena: Each line of video data contains the above retrace period. This video data is read by one of the line memories and is synchronized (synchronized) when the frequency is higher than the horizontal synchronization signal HSYNC. The narration signal CL1 is read out. Time, the included retrace period will be shortened. As shown in FIG. 5, compared with the length along the time axis of the 1-line image data (hereinafter referred to as the line data) W1 that is input to the line memory 1, for example, along this image: The length of the time axis of the line data R1 when the volume 1 is output will become shorter. During the period from the input of line data to line memory to the output of line data from line memory, even if the image information contained in the line data is not processed (for example, 'a line of 1-line image is generated in the horizontal direction of the screen), The time axis is also compressed as described above. Therefore, the line memory 1 ~ 4 outputs 4, the end time of the spring wound image data R1, R2, R3, R4 and the line memory 83946 -29- 200305128 the body 1 ~ 4 outputs 4 lines of image data r5, R6. The above remaining time Tex will be generated between the start time of R7, R7 and R8. The 4 lines of image data ri, r2, r3, and R4 read from the line memory 1 to 4 are transferred to the data driver 102 as the drive data 106, and the corresponding display signals LI, L2, and L3 are generated, respectively. , L4 (the next 4 lines of image data R5, R6, R7, and R8 read out also produce display signals [5, L6, L7, L8). These display signals are output to the pixel array 101 in the order ′ corresponding to the above-mentioned horizontal clock signals ^^ _ in the order shown in the Eye Diagram of the display signal output in FIG. 5. Therefore, when the memory circuit 10 $ contains at least a line memory (or a collection thereof) having the capacity of the N lines described above, the line of image data that is input to the display device during a certain frame period can be The input to the pixel array during the frame period can improve the response speed of the display device to the input of image data. On the other hand, it can be known from FIG. 5 that the remaining time Tex corresponds to the horizontal clock signal CL1 and is output by the line memory! The time of the line's image data. In this embodiment, the remaining time Tex is used to output another display signal to the pixel array once. The other display signal of this embodiment is a blanking signal B that can reduce the brightness of the pixel to which the signal is supplied to the brightness before its supply. For example, the brightness of a pixel displayed in a higher tone (in the case of displaying a monochrome image, which is white or a bright gray close to this color) during the previous frame will be reduced by the blanking signal B. On the other hand, the brightness of a pixel displayed in a lower tone during the first frame (in the case of a monochrome image, black or a dark gray such as charcoal gray) after the blanking signal B is input It hardly changes. This blanking signal B will temporarily replace the image generated by the pixel array with a dark image (blanking image) during each frame period. With such a display operation of the pixel array, even in a hold type display device, as in the case of a pulse type display device, during each frame period, image display corresponding to the input image data is performed. The driving method of the display device which repeatedly performs the first process of sequentially outputting the aforementioned N-line image data to the pixel array and the second process of outputting the blanking signal B to the pixel array μ times is applicable to a hold type display device such as a pulse The situation of the type display device is generally, and the image display of the hold type display device can be performed. The driving method of this display device is not only applicable to a display device that has a line memory having a capacity of at least ν as described with reference to FIG. 5 as a memory circuit 105, but also to, for example, this memory circuit 105 Display device replaced with frame memory. A method for driving such a display device will be further described with reference to FIG. 1. The operation of the display device constituted by the above-mentioned first and second processes is used to specify that the data driver 10 of the display device 100 of FIG. 3 is used to output the display signal, but the scan driver 丨 03 is used to output the scan signal (selection). Pixel row) follows the format described below. In the following description, a "scanning signal" applied to a gate line (scanning signal line) 1 and selecting a pixel row corresponding to this gate line (most pixels PIX arranged along the gate line) means being applied to the graph i For all the pulses (gate pulses) of the scanning signals of the gate lines G1, G2, G3, ···, which are the scanning signals of the high state. In the pixel array shown in FIG. 9, the switching element 8 provided at the pixel Plx receives a gate pulse by being connected to the &lt; gate line 10, thereby inputting a display signal supplied from the data line 12 to this pixel PIX. 83946 -31- 200305128

In the period corresponding to the above-mentioned first step, whenever the image data corresponding to the ^^ line is output, the scanning signal of the pixel row corresponding to the selection is applied to the gamma line of the gate line. Therefore, a scan signal can be output by the scan driver 103. The application of such a scanning signal is performed successively from one end of the pixel array 101 (for example, the upper end in FIG. 3) to the other end (for example, the lower end in FIG. 3) every Y line of the gate line every time the display signal is output. Therefore, in the first step, a pixel row corresponding to a gate line of the (YXN) line is selected, and a display signal generated from image data is supplied to each pixel thereof. Figure 丨 shows the output time of the display signal (refer to the eye diagram of the output voltage of the data driver) when the N value is 4 and the γ value is 1 and the scanning of each gate line applied to the corresponding gate line (scanning line) The waveform of the signal corresponds to the output voltages of the data driver output voltages 1 to 4, 5 to 8, 9 to 12, ···, 513 to 516, ···. For the data driver output voltage i ~ 4, the scanning signal is successively input.

When the gate line is added to G1 to G4, the output voltage of the next data driver is 5 ~ 8, and the scanning signal is successively input to the gate line of G5 to G8. For further time, the output voltage of the asset driver is 513 ~ 516. Signals are successively applied to the gate lines of G5 13 to G516. That is, the operation of outputting a scanning signal from the scanning driver 103 is to increase the address number (G1, G2, G3, ..., G257, G258, G259, ...) of the pixel array 10 (10). , G513, G514, G515, ···). On the other hand, in the period corresponding to the above-mentioned second process, whenever the above-mentioned display data is outputted as the blanking signal, the scanning signal of the pixel row corresponding to the selection is applied to the Z line of the gate line. . Therefore, M scanning signals can be output by the scanning driver 103. There is no special limitation on the combination of gate lines (scanning lines) to which scanning signals are applied for the operation of 83946 -32- 200305128 scanning signals output by the scanning driver 103. However, it takes a long time in the first process. The ground keeps the display signal supplied to the pixel column and reduces the burden on the data driver 102, so as long as the display signal is output every time, the scanning signal can be applied to the Z line of the gate line one by one. In the second step, the scanning signal is applied to the gate lines in the same manner as in the first step, and is sequentially performed from one end of the pixel array 101 to the other end. Therefore, in the second step, a pixel row corresponding to a gate line of the (Z × M) line is selected, and a blanking signal is supplied to each pixel thereof. Figure 1 shows the display time of the display signal when the M value is 1, and the Z value is 4. The output time of each blanking signal B in the second step after the above first step and the application time to the gate line corresponding to this (scanning Waveform) of the scanning signal of each gate line. In the process of sequentially applying the scanning signal to the gate lines of G1 to G4 in the second process after the first process, the scanning signal is applied to the 4 gate lines of G257 to G260 for the output of the first blanking signal B. In the process of sequentially applying the scanning signal to the gate lines of g5 to G8, in the second step after the first step, the scanning signal is output to the 1st blanking signal B, and the scanning signal is applied to 4 of G261 to G264. For the gate lines, the scanning signal is applied to the gate lines of G513 to G516 successively. In the second step after the first step, the blanking signal B is output once, and the scanning signal is applied to G1 to G4. 4 gate lines. As described above, in the first step, the scanning signal is sequentially applied to each of the four gate lines, and in the second step, the scanning signal is simultaneously applied to the four gate lines. Therefore, it is necessary to correspond to The display signal output of the data driver 102 enables the operation of the scan driver 103 to cooperate with each process. As mentioned before, the pixel array used in this embodiment has a resolution of WXGA level 83946 -33- 200305128 ′ and a gate line of 7 6 8 is provided here. On the other hand, in the first step, the four gate line groups (for example, G1 to G4) are successively selected, and in the subsequent second step, the four gate line groups (for example, G257 to G260) are selected. It is separated by 252 gate lines along the direction of increasing the address number of the gate line 10 of the pixel array 101. Therefore, the gate lines parallel to the 768 lines of the pixel array are divided into 3 groups every 256 lines along the vertical direction (or the extension direction of the data lines), and the scanning driver 103 is controlled independently according to each group. Scanning signal output action. Therefore, in the display device shown in FIG. 3, three scan drivers 10-3_1, 103-2, and 10-3_3 are arranged along the pixel array 101, and the signals 114-1, 114-2, and 114 are selected in a scanning pattern. -3 controls the output operation of the scanning signal from each scan driver. For example, in the first step, the gate lines G1 to G4 are selected. In the subsequent second step, when the gate lines G257 to G260 are selected, the scan state selection signal 114-1 instructs the scan driver 1 03_1 to repeat the execution of 1 Line by line selects successively the scanning signal output operation of the continuous 4-pulse gate line of the tracing clock CL3, and the scanning state of the output halt operation of the 1-pulse known trace signal of the subsequent scanning clock CL3. On the other hand, the scan state selection signal 114-2 instructs the scan driver 10-3_2 to repeatedly execute the output pause action of the continuous 4 pulse scan signal to the scan clock CL3, and the scan clock (: 1 ^ of The scanning state of the output action of the scanning signal of the 4-wire gate line with 1 pulse. In addition, the scanning state selection signal 114-3 invalidates the scanning clock CL3 input to the scanning driver 10-3 _3 to stop the scanning signal output operation. Each scanning driver 103_1, 103-2, and 103-3 is provided with two control signal transmission networks corresponding to the above two instructions made by the scanning state selection signals 114_1, U4_2, and 114-3. 83946 -34- 200305128 On the other hand, the waveform of the scan start signal FLM shown in FIG. 1 includes two pulses that rise at time t1 and t2 respectively. The above-mentioned first step of the continuous climbing gate line selection action is in response to the scan start signal generated at time u Pulse (lPulse 1 means the first pulse hereinafter) to start its operation. One of the series of gate line selection operations in the second step is the pulse of the scan start signal FLM generated at time t2. Impulse (referred to as Pulse2, hereinafter referred to as the second pulse · Impulse) and start its operation. Scan start signal Gu Zhi-the pulse is also called · The input of the image data during the If period to the display device (by Shanglu -Describes the pulse of the vertical synchronization signal VSYNC). Therefore, the first and second pulses of the scan start signal FLM are repeatedly generated during each building. In addition, the first pulse and connection of the scan start signal FLM can be adjusted by using In this way, the interval between the second pulse and the interval between the second pulse and the first pulse that follows (for example, the next 1 frame period) is adjusted, and the frame period is adjusted. The pixel array remains based on the image. The time when the data is displayed. For Lu &lt;, including the pulse interval between the first pulse and the second pulse generated by the scan start signal FLM, two different values (time width) can be obtained alternately. On the other hand, this scan starts The signal FLM is generated by the display control circuit (time controller) 104. According to the above, the scanning state selection signals 114_ 丨, 114_2, and 114-3 can be displayed in the display control circuit 104. Generated by referring to the scan start signal FLM. _ Whenever the image data shown in FIG. 1 is written into the pixel array 4 times per line, the operation of writing the blanking signal into the pixel array once is as shown in FIG. 5. The description is completed in the time of inputting 4 lines of image data to the display device. In response to this, the scanning signal is output to the pixel array 5 times. Therefore, 83946 -35- 200305128 two t array operation The required horizontal period is the image control signal 121: 4/5 of the flat scan period. In this way, the i-frame image (based on the display signal) and the blanking signal are input to the pixel array during the i-frame period. The operation of all pixels is completed during this period. "Jin Shizhi 'Xiao Yin signal can be used in the display control circuit 104 or its surroundings to generate simulated image data (hereinafter referred to as blanking data), transfer it to the data driver 102 and generate it in the data driver 102. It is also possible to set a circuit for generating a blanking signal in the data driver 102 in advance, corresponding to a specific pulse of the horizontal clock signal cu transferred by the display control circuit 104, and output the blanking signal to the pixel array. A frame memory is set in the display control circuit 104 or its surroundings, and the display control circuit 104 is used to specifically designate that the pixels of the blanking signal should be enhanced by the image data stored during each frame period (the image data is higher Pixels of brightness ㈣) to generate blanking data that causes data driver i 02 to produce a blanking signal whose darkness varies from pixel to pixel. In the latter case, the data driver 10 can also be used to count the number of pulses of the horizontal clock signal CL1. And output a display signal that causes the pixel to display black or a dark color (such as charcoal black) according to the counted number. The LCD display device One part is to use a display control circuit (time converter) 104 to generate a tone voltage that determines the brightness of a pixel. In this type of liquid crystal display device, the data driver 102 is used to transfer most of the tone voltages, and the data driver 102 is used to select a corresponding image. The tone voltage of the data is output to the pixel array, but the tone voltage corresponding to the pulse of the horizontal clock signal CL1 can also be selected by the data driver i 〇2 to generate a blanking signal. 83946 -36- 200305128 The display signal output method (〇utpiming Manner) of the pixel array of the present invention shown in 1 and the output method of the scan signal corresponding to the gate lines (scan lines) corresponding thereto are suitable for driving a device having The scan status selection signal 114 simultaneously outputs the scan signal to the display device of the scan driver 1 () 3 which functions as the majority of the gate lines. In addition, even if it is not as described above, the scan signal is also output to most scan lines at the same time. Each pulse of the clock 〇3, and the scanning signal is output to the scanning one by one according to each line of the gate line (scanning line). The actuators 丨 we- 丨, 10-3, and 10-3-3 each scan driver can also perform the image display operation of this embodiment. With this kind of scan driver 103 operation, repeatedly execute whenever When the line image data is input to one of the pixel columns one by one (the first step of outputting the image data four times), the blanking data is input to four of the other pixel columns (the output shadow blanking The above-mentioned first process of data) The image display operation of this embodiment can be explained by using the output waveforms of the display signal and the scan signal shown in FIG. 4. The driving method of the display device described with reference to FIG. 4 is the same as that of FIG. The ground can refer to the display device shown in Fig. 3. The scan drivers 103_1, 103_2, and 103_3 are 256 terminals with output scanning signals. In other words, each scan driver 103 can output a scan signal to a gate line of 256 lines at most. On the other hand, the pixel array 101 (for example, a liquid crystal display panel) is provided with 768 lines of gate lines 10 and corresponding pixel columns. Therefore, the three scan drivers 103_ι, ι03-2, and 103-3 are sequentially arranged along one side of the vertical direction of the pixel array ι01 (the extending direction of the data line 12 provided here). The scanning driver 103-1 outputs the scanning signal to the gate line group G1 ~ G256, the scanning driver 103_2 outputs the scanning signal to the gate line group G257 ~ G512, and the scanning driver 10-3_3 outputs the scanning signal to 83946 -37- 200305128 to the gate line Groups G5i3 to G768, and control the image display of the full screen (the entire area of the pixel array 1011) of the display device 100. The display device to which the driving method described with reference to FIG. I is applied and the display device to which the driving method described below with reference to FIG. 4 is applied are common to the scan driver having the above. In addition, since the waveform of the scan start signal FLM includes the first pulse that starts the output of a series of scan signals to input image data into the pixel array and the start of the output of a series of scan signals that input blanking data to the pixel array during each i-frame period. Two pulses, so that the driving method of the display device described with reference to FIG. 1 and the case described with reference to FIG. 4 are in common. In addition, the scan driver 103 uses the scan clock CL3 to capture each pulse of the first pulse and the second pulse of the scan start signal FLm, and then echoes the scan clock CL3 to acquire the image data or blanking data to the pixel array. And sequentially shifting the terminals (or terminal groups) of the output scan signal in sequence also makes the driving method of the display device according to the signal waveform of FIG. 1 and the driving method of the display device according to the signal waveform of FIG. 4 common. However, in the driving method of the display device of this embodiment described with reference to FIG. 4, the effect of the scanning state selection signals 114-1, 114-2, and 114-3 is different from that described with reference to FIG. In FIG. 4, the waveforms of the scanning state selection signals 114-1, 114_2, and 114_3 are indicated by DISP1, DISP2, and DISP3. The scan state selection signal 114 first determines the output action of the scan signal in this area according to the operating conditions applicable to each area it controls (for example, in the case of DISP2, which is the pixel group corresponding to the gate group G257 ~ G512). In FIG. 4, in the period during which the output voltage of the data driver indicates the output of the display signals L5 13 to L516 corresponding to the 4-line video data (the first process of outputting the display signals L5 13 83946 -38-200305128 to L516), The scanning signal is applied by the scanning driver 10-3_3 to the gate line groups G5 i 3 to G516 corresponding to the pixel rows to which these display signals are input. Therefore, the scanning state selection signal 114-3 forwarded to the scanning driver 10-3_3 echoes the scanning clock CL3 (when the gate pulse is output), and the so-called per-line output of the scanning signal is sequentially performed on each of the gate lines G513 to G516. i-line gate line selection. Therefore, the display signal L513 can be supplied to the pixel column corresponding to the gate line G513 during a horizontal period (horizontal clock signal. The period specified by the pulse interval), and then the display signal is "supplied to the gate line G514." For the pixel column, the display signal L515 is supplied to the pixel column corresponding to the gate line G5151, and finally the display signal L516 is supplied to the pixel column corresponding to the gate line G516. On the other hand, during each horizontal period (corresponding to the horizontal clock signal CU) Pulse) output the display signal L513 ~ L516 successively in the above second step, and output the blanking signal B in the subsequent 1 level period corresponding to the 4 level period in this first step. In the embodiment, the blanking signal B output between the output of the display signal L516 and the output of the display signal L517 is supplied to each pixel column corresponding to the gate line group G5 to G8. Therefore, the scan driver 103-1 blanks the signal here During the output period of B, the so-called 4-line simultaneous closed line selection that applies the scanning signal to all of the 4 lines of the gate line group G5 to G8 must be implemented. However, in the display operation of the pixel array according to FIG. 4 As described above, the scan driver 103 responds to the scan clock CL3 (the next pulse) and starts to apply the scan signal to only one gate line, but applies the scan signal to most gate lines without opening. In other words, , Scan driver M] will not cause most closed-line scan signal pulses to rise at the same time. 83946 -39- 200305128 Therefore, the scan state selection signal 114-1 transferred to the scan driver 103-1 will 'before blanking the output of the signal B' #Descsignment signal is applied to at least the (Z-1) line of the Z line of the gate line where the scanning signal is expected to be applied, and to extend the application time of the scanning signal (the pulse width of the scanning signal) to at least N times the horizontal period. The mode controls the scanning driver 103-1. This variation, z, N is the first one described in the description of the seventh process of writing the above-mentioned image data into the pixel array and the second process of writing the blanking data into the pixel array. The number of selections of the gate line in the second step: Z and the number of times the display signal is output in the first step: n. For example, the scanning signal is applied during a period of 5 times the horizontal period from the output start time of the display signal L5 14 Add to gate line G5 and apply it to gate line g6 during 5 times the horizontal period from the output start time of display signal L515, and apply it to gate line g5 for 5 times the horizontal period from the output start time of display signal L516. The gate line G7 'is applied to the gate line G8 at a time period of $ times the horizontal period from the output end time of the display signal L516 (the output start time of the blanking signal B that follows it). In other words, the scan driver is used. Although the rising timings of the rising gate pulses of the gate line groups G5 to G8 are sequentially shifted in each horizontal period in response to the scan clock CL3, the falling timing of each of the gate pulses can be used to delay the N horizontal periods after the rising time. However, during the output period of the blanking signal, all the gate pulses of the gate line group 05 to G8 are raised (in FIG. 4, they are High). In this way, it is preferable that the scan driver 103 includes an operation function of a shift register in controlling the output of the gate pulse. The hatched area indicated by the gate pulses that supply the blanking signals to the corresponding gate lines G1 to G12 will be described in detail later. For this reason, during this period (the above-mentioned first 83946 -40- 200305128 process of outputting the display signals L513 to L516) and the subsequent second process described above, the display signal is not supplied corresponding to the reception by the scan driver 103-2 The pixel lines of the scanning signal gate lines G257 to G512. Therefore, the scanning state selection signal 114-2 transferred to the scanning driver ι〇3-2 makes the scanning clock CL3 ineffective for the scanning driver 103 during the first and second steps. Driver 103-2). Such invalidation of the scan clock CL3 using the scan state selection signal ι14 is also provided when the display signal and the blanking signal are supplied to the pixel group in the area where the scan driver 103 that transmits the scan state selection signal outputs the scan signal. Available at specific times. Fig. 4 shows the waveform of the scan clock CL3 corresponding to the scan signal output from the scan driver 103-1. Although the pulse of the scan clock CL3 is generated in response to the pulse of the horizontal clock signal CL1 which specifies the output interval of the display signal and the blanking signal, no pulse is generated at the output start time of the display signals L513, L517, ···. In this way, the scan state selection signal U4 can be used to perform an operation of invalidating the scan clock CL3 transmitted from the display control circuit 104 to the scan driver 103 at a specific time. The partial deactivation of the scan clock CL3 of the scan driver ι03 can also be programmed into the scan driver 103 by processing the signal corresponding to this, and started with the scan state selection signal 114 which is transferred to the scan driver 103. Perform this signal to process the action of the route. In addition, a part is not shown in FIG. 4, that is, the scan driver 103-3 that controls the writing of image data to the pixel array does not sense the scan clock CL3 at the output start time of the blanking signal B. Therefore, it is possible to prevent the scan driver 103-3 from supplying the blanking signal by mistake to the output of the blanking signal b, which is supplied in the first subsequent step of the second step based on the image signal's display signal at 83946 -41- 200305128 pixels. Column. Secondly, the scan state selection signal 114 makes the pulses (gate pulses) of the scan signals sequentially generated in the areas under their control separately, and becomes invalid at the stage when the pulses are output to the gate lines. This function is based on the driving method of the display device of FIG. 4, which supplies the blanking signal to the signal processing in the scanning driver 10 of the pixel array, and gives the scanning state selection signal 114 transferred to it, so that it has this function. . The three waveforms DISP1, DISP2, and DISP3 shown in FIG. 4 indicate the scanning state selection signals 114-1, 114-2, and 114_3 related to the internal signal processing of the scanning drivers 103-1, 103-2, and 103-3. When it is at Low-level, the output of the gate pulse becomes valid. In addition, the waveform DISP1 of the scanning state selection signal 114-1 becomes High-levei during the period in which the display signal is output to the pixel array in the first step, and during this period, the gate generated by the scan driver 1034 is turned on. The pulse output becomes invalid. For example, during the period when the display signals L513 ~ L516 are supplied to the four levels of the pixel array, the gate pulses generated by the scanning signals corresponding to the gate lines G1 ~ G7 are as follows; as shown by the 5V line, 'utilization becomes high-level The scan status selects the signal DISP1 to make each output invalid. Therefore, it is possible to prevent the display signal based on image data from being supplied to the pixel rows that are ready to supply the blanking signal in a certain period, and to perform the blanking display using these pixel rows (to eliminate the images originally displayed in these pixel rows) , And prevent the strength loss of the signal itself based on the image data. In addition, during the output display signals L5 13 to L516 &lt; 4 horizontal periods and the output display signals L517 to L52 followed by 4 horizontal periods &lt; output blanking signal 3 & horizontal periods, the scan state selection signal Dispi 83946 -42- 200305128 becomes Low-leve. Therefore, during this period, the gate pulses generated by the scanning signals corresponding to the gate lines G5 to G8 are simultaneously output to the pixel array, and the pixel columns corresponding to the gate lines of the 4 lines are selected, and The blanking signal B is supplied to each pixel column thereof. &quot; As described above, in the display operation of the display device of FIG. 4, not only the scanning state selection signal 114 can be used to control the operating state of the scan driver 103 which forwards this signal (based on the first step and the second step described above). No. 1 action resentment, or non-action state not based on any of these processes), and can determine the validity of the output pulse of the gate pulse generated by the scan driver 103 according to its action state. In addition, using these scanning state selection signals, a series of control of the signal's scanning driver 103 (scanning signal output from this), even for the writing and erasing of display signals based on the image data applied to the pixel array In any case where the hidden signal is embedded, it can also respond to the scan start signal FLM and start its control from the scan signal output of the gate line. Figure 4 mainly shows the second pulse in response to the scanning start signal flm, and the scanning driver 103 using the scanning state to select the waveform DISpi of the scanning state to sequentially shift the line selection action of the gate line (4-line simultaneous selection action). In addition, although it is not shown in FIG. 4, the operation of the display device can be used to make each line selection operation using the scan driver 103 to select the gate line, and it can be sequentially shifted in response to the first pulse of the scan start signal FLM. Therefore, in the operation of the display device of FIG. 4, it is necessary to start scanning of two kinds of pixel arrays by using the scanning start signal FLM 1 degree and 1 degree during each frame period, and the first pulse and continuity appear in the waveform of the scanning start signal FLM. The second pulse here. In any of the 83,946-43-200305128 M-types of the driving method of the display device of FIGS. 1 and 4 described above, the scanning driver 103 arranged along one side of the pixel array 101 and the scanning state selection transmitted thereto The number of signals 114 can also be changed without changing the structure of the pixel array 101 described with reference to FIGS. 3 and 9, and the functions shared by the three scan drivers 103 can be combined. In one sweeping horse driver 103 (for example, the inside of the scanning drive 11103 is divided into circuit parts corresponding to the respective scanning drivers of the three scanning drives 103-1, 103-2, and 103-3). Fig. 6 is a time chart showing the image display time of the display device of the present embodiment in three consecutive frame periods. At the beginning of each period, the image data is executed from the first pulse of the scan start signal FLM. The first scan line (equivalent to the upper gate and the spring G1) enters the pixel array, and the time elapses from this moment ... A . Then, the second pulse of the scan start signal! ^ Starts to perform the blanking data, so that the second scan line is written to the pixel array. In addition, after the scan start signal FLM "Time of the second pulse generation time elapses At2, the first pulse of the scan start field FLM is started to be input to the display device during the next U ~ period. The image data is input to the pixel array. Write. χ, in this embodiment, the time Δ ti in FIG. 6 is the same as time Δ u, and the time Δ a is the same as time Δ 2. The writing of the image data of the pixel array and the case of blanking the data. The number of gate lines (the former is blanked out and the latter is 4 lines) selected by the two parties during the 1 level period is different, but in terms of time, Roughly the same. Therefore, it is not affected by the position of the scanning line of the pixel array, and the corresponding periods of the | elements that are based on the display signal of the image data (including the time when the display signal is received are approximately the above time. △ ⑴ and this The period during which the pixel column keeps the blanking signal (including the time when this blanking signal is accepted is approximately 83946 -44-200305128 is the above time: △ t2) is approximately the same in the vertical direction of the pixel array. In other words, it can be used to suppress the The deviation of the display brightness between the pixel columns of the array (in the vertical direction). In this embodiment, as shown in FIG. 6, 67% and 33% of one period are allocated as the display periods of the image data in the pixel array, respectively. During the display period of the blanking data, the time of the scanning start signal FLM is adjusted (the adjustment of the above time △ 11 and 8:12), but the time of the scanning start signal FLM can be changed to appropriately change the image data. Display period and display period of blanking data. Fig. 7 shows an example of the brightness response of a pixel row when the display device is activated by using the time according to Fig. 6 This brightness response uses a liquid crystal display panel with a resolution of eighth and eighth level and activated in a normally black mode as the pixel array 101 of FIG. 3, and embeds display enable data to make the pixel column display white as image data. The display off data that causes the pixel column to display black is written as the blanking data. Therefore, the brightness response in FIG. 7 indicates the change in the transmittance of the liquid crystal layer corresponding to the pixel column of this liquid crystal display panel. As shown in FIG. 7 'The pixel column (each pixel included here) responds first to the brightness corresponding to the image data during a 1-frame period, and then responds to the black brightness. Although the response of the transmittance of the liquid crystal layer to the change in the electric field applied to it is compared, Slow, but it can be known from Figure 7 that its value can fully respond to the electric field corresponding to the image data and the electric field corresponding to the blanking data during each frame period. Therefore, the image data generated on the screen (pixel row) during the frame period The image can be fully eliminated by the screen (pixel column) during the frame period, and displayed in the same state as the pulse type display device. Using this image data The pulse-type response can reduce the blurring of the animation that occurs here. Even if the resolution of the pixel array is changed or the ratio of the flyback period during the horizontal period of the driver data shown in Figure 2 to 83946 -45- 200305128 is also obtained, the same can be obtained. In the embodiment described above, in the first step described above, the display signal generated by each line of the image data is sequentially output to the pixel array in 4 times, and it is supplied to the pixel array in sequence. The pixel line of the 1st line of the gate line outputs the blanking signal to the pixel array once in the subsequent second step, and supplies it to the pixel line corresponding to the 4th line of the gate line. However, the _th step The number of times the display signal is output: N (this value is also equivalent to the line data written into the pixel array

The number of materials) is not limited to 4, and the output frequency of the blanking signal in the second process: M is not limited to 1. Also, in the first step, for the output of the next display signal, the number of lines of the gate lines to which the scanning signal (selection pulse) is applied: γ is not limited to 1, and in the second step, the blanking for the second Signal output

The number of lines of the scanning signal gate line z is not limited to four. The requirements for these factors N and M must be natural numbers that satisfy the conditions of M &lt; N, and satisfy the conditions of N * 2 or more. In addition, it is required that the factor γ is a natural number smaller than N / M, and the factor Z is a natural number greater than N / M. In addition, the cycle of performing the N-time display signal output and the M-time blanking signal output is completed within the period when the display device inputs the N-line shirt image data. In other words, the value of (N + M) times of the horizontal period of the operation of the pixel array is set to be less than N times of the horizontal scanning period of the image data input display device. The horizontal period of the former is specified by the pulse interval of the horizontal clock signal CL1, and the horizontal scanning period of the latter is specified by the pulse interval of the horizontal synchronization signal HSYNC, one of the image control signals. According to the operating conditions of such a pixel array, during the time when the image data of the ^^ line is input into the display device, 83946 -46- 200305128, Tin can be outputted (n + M) times by the data driver i02. The operation of one cycle of the pixel array constituted by one process and the subsequent second process. Therefore, the time allotted for the output of the display signal output and the blanking signal output (hereinafter referred to as the period Tinvention) is reduced to 1 during the period when the display signal corresponding to the n-line image data is output sequentially. N / (N + M) times the time required for the secondary signal output (hereinafter referred to as Prior). However, as mentioned above, the factor M is a natural number less than N '. Therefore, during the output of each signal in the above-mentioned one cycle of the present invention, Tinvention can ensure a length of 1/2 or more of the above-mentioned Tprior. That is, from the viewpoint of writing the image data into the pixel array, the advantages of the method described in the above-mentioned sm01 mgest, pages 994_997 for the method described in Japanese Patent Application Laid-Open No. 2001-166280 can be obtained. In addition, in the present invention, the use of Tinvention to supply a blanking signal to a pixel during the above period can quickly reduce the brightness of the pixel. Therefore, compared with the method described in SID 〇1 Digest, pages 994-997, according to the present invention, the image display period and blanking display period of each pixel column in a frame period can be clearly divided, so the animation can also be effectively reduced. blurry. Furthermore, in the present invention, although the supply of the blanking signal to the pixels is performed intermittently (N + M) times, compared with the output of the blanking signal that is owed, the blanking signal can be supplied to The pixel rows of the gate line of the line can suppress the deviation of the ratio between the image display period and the blanking display period between the pixel rows. In addition, for each blanking signal output, if the Z line of the mother barrier line is applied with the scanning signal one by one, the load of the blanking signal output by the data driver 102 once can also be due to the pixel row supplied with this blanking signal. The number of restrictions is reduced. 83946 -47- 200305128 Therefore, the driving of the display device of the present invention is not limited to the examples of n = 4, M = 1, Y = 1, and Z = 4 described with reference to FIGS. Under the conditions, it can be widely applied to the driving of general holding display devices. For example, when the image data is input into one of the odd or even lines and input to the display device in an interlaced scanning method during each frame, the image data of the odd or even lines can be applied every 1 line, and every 2 The line applies the scanning signal successively, and supplies the display signal to the pixel columns corresponding to these (at this time, at least the above-mentioned factor Y is 2). Moreover, in the driving of the display device of the present invention, although the frequency of its horizontal clock signal CL1 is set to ((N + M) / N) times of the frequency of the horizontal synchronization signal HS YNC (in the figure above) and in FIG. 4 In the example, it is 1.25 times) ', but the frequency of the horizontal clock signal cL1 can be further increased to reduce the pulse interval to ensure the operation tolerance of the pixel array. At this time, a pulse oscillation circuit may also be provided in the display control circuit 104 or its surroundings, and the frequency of the horizontal clock signal cu is raised with reference to the reference signal whose frequency is at the point signal contained in the image control signal generated by the clock signal DOTCLK. For each of the factors described above, it is only necessary to set N to a natural number of 4 or more, to set the factor M to a natural number of 1 or more, and to set the factor γ to the same value as 1 ^, and the factor Z It can be set to the same value as N. << Second Embodiment >> In this embodiment, as in the first embodiment described above, the image data input to the display device of FIG. 3 at the time shown in FIG. 2 is represented by the waveform shown in FIG. The data driver 102 outputs the display signal and the scanning signal, and displays it according to the time shown in FIG. 6, but as shown in FIG. 8, it can be changed according to the frame period of the display signal of the image data of each i 83946-48-200305128. 1 or the output time of the blanking signal shown in Figure 4. In a display device using a liquid crystal display panel as a pixel array, the output time of the blanking signal of this embodiment shown in FIG. 8 can make use of the wave of the signal generated by the data line of the liquid crystal display panel to which this blanking signal is supplied. The influence of the transformation is dispersed (effects, so as to improve the display quality of the image. In FIG. 8 'will correspond to each of the pulses of the horizontal clock signal 之 period τμ, ΤΙ in one of these periods, will

Th3, · · • are arranged in the horizontal direction in order to display the display signal of each taste including the image data output by the data driver 1G2. • and the eye diagram of the blanking signal B are arranged in the order of n + 3, · · · in the vertical direction m +1, m + 2, and m + 3 are not limited to the special m, m + 1, m + 2, m + 3, and f periods, η, n + 1, and n + 2, respectively. The display signal ❿ and the fixed image data shown here may correspond to, for example, the display signals u, L2, L3, L4 'in FIG. 丨, and may also correspond to the display signals L511, L512, L513, and L514.

According to the method described in the first embodiment, whenever the image data is written into the pixel array 4 times, the blanking data is written twice, so that the blanking data of the pixel array shown in FIG. 8 is applied. Time is arranged every 1 period from the above-mentioned periods Th 1, Th2, Th3, Th4, Th5, Th6, ···. Every 4 periods are arranged in a group of "periods" (for example, groups of periods Thl, Th6, Thl2, ····). ) Change to another group in turn (for example, the group during the period Th2, Th7, Thl3, ...). For example, in the frame period η, before inputting the first line data into the pixel array (applying a display signal based on this data to the m-th pixel row), input blanking data into the pixel array (applying to a specific line equivalent to the gate line) The pixel column of the 4th line) 'In the period n + 1, after the first line data is input into the pixel array 83946 -49- 200305128, and the (m + 1) th line data is input into the pixel array, Hidden data is input into the pixel array. The operation of the (m + 1) line data input pixel array is similar to the case of the (m + 1) line data input pixel array, and the display signal based on the (m + i) line data is applied to the (m + 1) pixel row, and thereafter The operation of inputting line data into the pixel array also applies a display signal based on the line data to a pixel row having the same address (sequence). In the frame period Π + 2, after the (111 + 1) -th line data is input to the pixel array and before the (m + 2) -th line data is input to the pixel array, the blanking data is input to the pixel array. In the subsequent frame period n + 3, after the (m + 2) th line data is input into the pixel array and before the (m + 3) th line data is input into the pixel array, the blanking data is input into the pixel array. In the following, the input time of the blanking data is staggered every horizontal scanning period, and the input operation of the line data and the blanking data to the pixel array is repeatedly performed. In the block period n + 4, the center line of the frame period η is returned. The input form of data and blanking data to the pixel array. The repetition of this series of actions not only blanks the signal, but also the passivation effect of these signal waveforms generated by the extension direction of the heart data line when the display signal based on the line data is output to each data line of the pixel array. Can be evenly dispersed to improve the image quality displayed in the pixel array. On the other hand, in this embodiment, as in the first embodiment, the display device can be activated using the image display time of FIG. 6, but as described above, the application time of the blanking data to the pixel array can be every frame The period is shifted, so the generation time of the first pulse of the scan start signal 1 ^] ^, which starts the scanning of the pixel array by using the blanking signal, can also be changed according to the frame period. According to the change in the generation time of the second pulse of the first signal FLM in this scan 1, the time shown in frame 6 of FIG. 6 83946 • 50- 200305128 period 1: in the subsequent frame period 2 becomes shorter (or longer) than the time · Z Time of \ tl: An ', the time shown in the frame period 丨: In the subsequent frame period 2 becomes longer (or shorter) than the time: At2, At2 ,. Considering the “deviations” at the scan start time of the pixel array at the display signal according to the line data m as seen in one pair of frame periods 11 and 11 + 1 and the other pair of frame periods n + 3 and n + 4 shown in FIG. 8 In this embodiment, at least one of the two time intervals corresponding to the pulse interval of the scan start signal FL] V [: Atl, may be changed corresponding to the frame period. As described above, according to the driving method of the display device of this embodiment in which the output period of the blanking signal is shifted along the time axis direction during each frame period, a display operation similar to the image display time shown in FIG. 6 is performed. At this time, although the setting of the scanning start signal needs some changes, the effect obtained by this is not inferior to that of the first embodiment shown in FIG. 7. Therefore, in this embodiment, an image corresponding to the video data can be displayed on the hold-type display device in substantially the same manner as in the case of the pulse-type display device. Moreover, the dynamic pixel image can be displayed by maintaining the pixel array 'without sacrificing its brightness and reducing the ambiguity of the moving books generated here. In this embodiment, it is also possible to use the adjustment of the time of the scan start signal FLM (for example, the distribution of the above-mentioned pulse intervals △ u, △ t2) 'to appropriately change the display period and blanking data of the image data during one frame period. Displays the ratio for the period. In addition, the application range of the driving method of this embodiment to a display device is not limited by the resolution of a pixel array (such as a liquid crystal display panel) as in the case of the first embodiment. In addition, as in the case of the first embodiment, the display device of this embodiment can increase or decrease the ratio of the selection period included in the horizontal period specified by the horizontal clock signal CL1 in the winter season ^ 83946 -51- 200305128 The number of output times of the display signal in the first step mentioned above: N, and the number of gate lines selected in the second step: z. Effect of the Invention In the method of intermittently inserting the pixel array input blanking data into the pixel array inputting the image data during the period of one frame of the present invention, the method can be completed without compromising the brightness of the image display. During the frame period (or equivalent period), the pixel array is used to perform image display and blanking display, and it can reduce the animation blur caused by a series of image display during the frame period and the picture degradation caused by it. In addition, when the present invention is applied to a liquid crystal display device, the ratio of the image display period to the blanking display period within the frame period is optimally set in accordance with characteristics such as the response speed of the liquid crystal. The image display in the pixel array can also be used while taking into consideration the coordination The relationship between the reduction of animation blur and the maintenance of display brightness. 〃 [Schematic description] Figure 1 shows the display signal output time and beer selection as explained in the first embodiment of the driving method of the present invention + # $, the driving method of making the poor / j burn out the device. Draw the driving waveform diagram. Fig. 2 is a diagram showing a display control circuit (time-controlled input waveform (input data) and the time of outputting 2 / ~ data) as described in the embodiment of the display method of the present invention, and the driving method of the display. One round of waveforms (driver data) Figure 3 shows the display of the present invention. Figure 4 shows the outline of the device (hard sun display device). Figure 4 shows the drive method of the display device according to the present invention. No. 83946 -52- 200305128 When the scanning line 4-line embodiment is selected, the same driving waveforms as shown in the display signal output period are illustrated in FIG. 5. FIG. 5 shows a plurality of (for example, 4), $ 恃, 恃 a, and 啕 ai for the display device of the present invention. "", ", Write memory (Write) image data and every time the video data is generated by this ball. As a result, the first-embodiment of the driving method of the display device of the present invention, the first embodiment of the present invention, is a picture of a mother room (a period of three consecutive money periods). FIG. 7 is a graph showing the luminance response to a pixel of a display signal when the liquid crystal display device (an example of a display device) of the present invention is driven using the image display time shown in FIG. Illustration. FIG. 8 shows the display signals supplied to the pixel lines corresponding to the gate lines G1, G2, G3, ... which are described in the second embodiment of the driving method of the display device of the present invention (based on image data 111, 111 + 1, 111 + 2, •• and the blanking data… The change of the continuous period of time ^ + bu ^^, · ••. Figure 9 shows the pixel array of the active matrix display device. An outline of k is an example. Fig. 10 is a waveform diagram of a scanning signal and a display signal, which is one of the conventional methods for suppressing the blurring of animation of a liquid crystal display device. The representative symbols are explained in the figure. 100 display device (liquid crystal display device) 101 pixels Array (TFT liquid crystal display panel) 102 Data driver 83946 -53- 200305128 103 Scan driver 104 Display control circuit (time controller) 105 Line memory circuit 120 Image data 121 Image control signal group (vertical sync signal, horizontal sync signal, Point clock signal, etc.) 106 drive data 107 data drive control signal group CL3 scan clock 83946 -54-

Claims (1)

200305128 Scope of patent application: 1 · A display device including: Image = 丄 Γ: Most pixels each including a switching element are arranged in a majority pixel row along the -th direction, and intersect with the first direction along The second direction is configured as a majority pixel walker; the majority-minus line extends along the aforementioned direction of the pixel _ and is arranged to extend along the aforementioned second direction, and respectively transmits the first signal to the corresponding The aforementioned switching element group included in the aforementioned image phase; the first driving circuit, which outputs one of the plurality of-signal lines in sequence from one end to the other end of the pixel array along the second direction The first signal line selects the aforementioned pixel row corresponding to each of the first signal lines. Most of the second signal lines extend along the aforementioned second direction of the pixel array and are disposed along the aforementioned first direction. Extend, and respectively supply the second signal to at least one of the aforementioned pixel rows which are included in the aforementioned pixel row selected corresponding to the aforementioned first-signal, "the aforementioned second driving circuit, Is to output the aforementioned second signal to each of the aforementioned line; and a 'display control circuit' which transmits the first signal controlling the aforementioned __ signal output to the aforementioned first driving circuit, and will control the aforementioned first signal : The second control signal of the output interval and the image data are sent to the front circuit. The first driving circuit is to repeatedly execute the first signal circuit in accordance with the aforementioned first signal line. Signal No.—scanning process, and: 83946 200305128 The first scanning process that falls in the majority of the first signal line accepts every first z signal except the (γ X Ν) line to output M times of the first signal Two scanning steps (Υ, Ν, ζ, and M are natural numbers satisfying the relationship between M &lt; N and Y &lt; N / MgZ, respectively); the first driving circuit is performed by the display control circuit in each horizontal scanning cycle. Receive 1-line image data, and repeatedly perform the action of outputting the second signal generated by each of the lines of the image data N times using the first scanning process, and outputting "second mask" using the second scanning process. Acts as a shield for the second signal of the pixel array. 2. The display device according to item 1 of the patent application range, wherein the number of selection lines of the first signal line in the aforementioned first scanning process: γ and Number of output times of the first signal:% is 丨, the number of selection lines of the first signal line in the second scanning process: Z and the number of output times of the first signal in the first scanning process... N is 4 or more. For example, the display device of the scope of application for a patent, in which the aforementioned second signal output by the aforementioned second scanning process is a blanking signal which can reduce the brightness of the pixel row to which this signal is supplied to below the brightness before supply. 4. The display device according to item 1 of the scope of patent application, wherein the output interval of the second signal from the second driving circuit is shorter than the horizontal scanning period of the image data. 5 · If the display device of the scope of application for patent No. 1 wherein the aforementioned display control circuit includes at least N line memories, the image data of the first line inputted to the display device successively can be stored in the N line memories one by one Each of them, and successively transfer the 1-line image data to the aforementioned second driving circuit 83946 200305128. 6. A display device comprising: a pixel array 'which includes a majority direction that forms a two-dimensional arrangement along the base direction and a second party majority intersecting with the first: number line' which follows the foregoing The second direction is set in parallel with the aforementioned pixel descending line, and conveys the signal that selects the majority image phase of each group line arranged along the aforementioned first direction of the majority of pixels; most of the second signal line, which It is provided along the first direction and is located in the aforementioned pixel array, and supplies display signals that determine the respective degrees of the pixels contained in the aforementioned pixel row selected by the aforementioned scanning signal; the first-driving circuit 'outputs the scanning signal to Each of the first signal lines of most of the aforementioned first signal lines; the first drive package circuit, which outputs display signals to the first and second signal lines of most of the aforementioned second signal lines; and display control circuits, which are During each i-frame period, the image data is inputted line by line in response to its horizontal synchronization signal, and the aforementioned-driving circuit is used to control the-clock signal output of the aforementioned scanning signal, and the-clock signal is used to instruct the The scanning start signal that performs the selection process of the pixel row is transmitted to the child-driving circuit, and the second clock signal and the image data are transmitted to the second driving circuit together; the second driving circuit is in each frame described above. In the meantime, in response to the aforementioned second clock signal, the output of the image display signal generated by the line of the aforementioned image data 丨 ^ times (natural number above) is output repeatedly, and the mask is displayed in the aforementioned pixel array. The output of the "blank" signal of the image (m is full 83946 200305128, which is a natural number of M &lt;N); then the first driving circuit repeats using the aforementioned scanning signal output 'fork during each frame Whenever the aforementioned N-time image display signal is output, the i-order of the gamma line (γ &lt; N / M) is selected in sequence from one end to the other end of the pixel array, and the output is cancelled every time the connection is continued thereafter. In the case of hidden signals, the end of the pixel array is sequentially selected to output the N times of image display signals, and the first signal line (Z ^ N / M) of the first signal line other than the ΥχΝ selected is output. 7. The display device according to item 6 of the patent scope, wherein the aforementioned scan start signal sent by the aforementioned display control to the aforementioned-driving circuit is routed to each and every one of the aforementioned periods. The process of the aforementioned first signal line of ¥ starts at the first moment from one end of the aforementioned pixel array, and the process of selecting the aforementioned first signal line of each Z in turn starts at the second moment of the descending end of the pixel. &Amp; If the display device according to item 7 of the scope of patent application, wherein the aforementioned scanning and inserting begins to describe the aforementioned ___ of each period and its subsequent aforementioned moments, the interval is at least one pair of consecutive periods in the aforementioned frame period. China Mutual = 7 items of display device, in which the above-mentioned scanning start = the interval between the time and the following second time is long: = the second time and the aforementioned first time when the subsequent second time is selected; The interval of the moment of the article. 1 The display device of 7 items, wherein the aforementioned scan is turned on: a first pulse corresponding to the aforementioned first moment is generated during the period of time: 〃 a second pulse corresponding to the aforementioned second moment. 83946 -4- 200305128 The display device according to item 7 of the patent application, wherein the interval between the first pulse and the second pulse of the scan start signal is different from each other in at least one pair of consecutive frames during the aforementioned frame period. 12. The display device according to the patent application_item 6, wherein the aforementioned pixel array is a liquid crystal display panel, and the aforementioned blanking signal is a voltage signal which minimizes the light transmittance of the liquid crystal layer of the liquid crystal display panel. 13. A driving method for a display device, which is a driving display device, which is a package: a pixel array, which includes a plurality of pixel columns arranged along a first direction, respectively, along a second direction crossing the first direction Set up; scan drive circuit, which uses the scanning signal to select each pixel row of the plurality of pixel rows; data drive circuit, which supplies the display signal to at least one of the rows selected by the scan signal of the majority pixel row Each pixel of the pixel and the display control circuit are those who control the display action of the pixel array; and input image data to the display device i-line and line-line during each horizontal scanning period; use The aforementioned data driving circuit repeatedly performs the first process interactively, which generates a display signal corresponding to each of the lines of the aforementioned image data in turn, and outputs the display signal to the pixel array n &amp; (n is 2 or more). Natural number); and the second step, which generates a display signal that sets the brightness of the aforementioned pixel to below the brightness of the pixel in the aforementioned first step, and The signal is output to the pixel array M times (M is a natural number less than N); using the aforementioned scan driving circuit, the first selection process is repeatedly performed interactively, which is in the aforementioned first process, in each row (γ is 83946 200305128 a natural number less than n / m) from the end of the aforementioned pixel array to the other end in order to select the majority of the pixel rows along the second direction; and the second selection H is in the second step in the foregoing second process, at each zmz For the above-mentioned free image above, the other one (YXN) selected by the aforementioned first selection process in the second direction in the second direction in order from the end to the other end in sequence along the second direction. 14. For example, the driving method of the display device of the patent application No. 13 in which the number of rows of the aforementioned pixel rows selected in the aforementioned first selection process in accordance with the aforementioned display steps of the aforementioned-step: ah Is 1, the number of output times of the display signal in the first process: N 4 4 or more, the beer should be selected in the second selection process by the i-th output of the aforementioned display signal in the second process ^ : Z is 4 or more, and the number of output times of the display signal in the second process: N is 1. 83946 -6-