CN108391031B - Video rolling display device and method - Google Patents
Video rolling display device and method Download PDFInfo
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- CN108391031B CN108391031B CN201810045537.8A CN201810045537A CN108391031B CN 108391031 B CN108391031 B CN 108391031B CN 201810045537 A CN201810045537 A CN 201810045537A CN 108391031 B CN108391031 B CN 108391031B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
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- H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
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Abstract
The invention provides a video rolling display device and a method, wherein the device comprises a high-definition video photoelectric conversion module, a serial-parallel conversion module, a video data processing module and a video data display module which are sequentially connected, and can receive an optical signal containing video data, convert the optical signal into a serial electric signal and then convert the serial electric signal into a parallel electric signal; and extracting video data of the parallel electric signals, carrying out dynamic time delay on the video data, and displaying the video data in a circulating rolling manner. The technical scheme provided by the invention can enable the relative position of the video data and the line and field synchronous signals to dynamically change, thereby realizing the rolling display of the video.
Description
Technical Field
The invention belongs to the technical field of video display, and particularly relates to a video scrolling display device and method.
Background
The distributed sensing and information synthesis technology is a brand-new information sensing mode and information processing application research in the field of information sensing of future ground combat vehicles, is a new branch of the field of military passive photoelectric system research, and is the latest development direction of the military passive photoelectric system at present. The distributed sensing and information synthesis technology distributes and arranges the imaging detection with large field of view and the photoelectric information processing system with battlefield periphery sensing on a turret, and can break through the traditional distributed video splicing display technology; the panoramic type battlefield monitoring system has the advantages of panoramic battlefield observation and video image information acquisition, can enable passengers in the cabin to timely master the surrounding environment of the battlefield, and overcomes the defect that the passengers can only observe a fixed visual angle and have a large-range blind area in the prior art.
However, the current distributed sensing and information synthesis technology cannot realize the rolling and circulating display of the acquired video information, which causes certain difficulty in realizing panoramic battlefield observation and is not beneficial to mastering the short-distance situation of the platform; in order to fully exert the battlefield observation efficiency of the multi-path distributed video, the technical problem that the multi-path video is integrated into the high-resolution video to be displayed in a rolling and circulating mode is urgently needed to be solved.
Disclosure of Invention
The invention provides a video rolling display device and a method, which aims to realize panoramic battlefield observation, and adopts the technical scheme that:
the invention provides a video rolling display device, which is improved in that the device comprises a high-definition video photoelectric conversion module, a serial-parallel conversion module, a video data processing module and a video data display module which are sequentially connected;
the high-definition video photoelectric conversion module: for receiving and converting an optical signal containing video data into a serial electrical signal containing video data;
the serial-parallel conversion module: for converting the serial electrical signal containing video data to a parallel electrical signal containing video data;
the video data processing module: the device is used for extracting video data of the parallel electric signal containing the video data and carrying out dynamic time delay on the video data;
the video data display module: for circular scrolling display of the video data.
Further, the high-definition video photoelectric conversion module is a multi-path parallel optical transceiver module, wherein the central wavelength of the multi-path parallel optical transceiver module is 850nm, the single-channel transmission rate reaches 6.25Gbps, and the interface level is standard CML.
Further, the serial-to-parallel conversion module is configured to: and after receiving the serial electric signal, converting the serial electric signal containing the video data into a 16-bit parallel electric signal, wherein the rate of receiving the serial electric signal by the serial-parallel conversion module is 600M-1.5Gbps.
Further, the video data processing module includes:
an extracting unit, configured to buffer a parallel electrical signal including video data transmitted by the serial-to-parallel conversion module, convert the first 8 bits of the parallel electrical signal into image Cr/Cb data and convert the last 8 bits of the parallel electrical signal into image Y data when a line and field synchronization signal is valid, and sample the image Cr/Cb data and the image Y data by using 4;
wherein the parallel electrical signals are 16-bit parallel electrical signals;
the dynamic delay unit is used for storing the video data in an FPGA block memory under the premise that a video output line, a field synchronizing signal and a clock signal are not changed, controlling the address bit of an output port of the FPGA block memory to be increased progressively and outputting the video data through the output port in a read mode of the FPGA block memory;
and when N address bits of the output port of the FPGA block memory are increased, the output delay of the video data is increased by N clock signals.
In a method of video scrolling, the improvement comprising:
receiving an optical signal containing video data and converting the optical signal into a serial electrical signal containing video data;
converting the serial electrical signal containing video data to a parallel electrical signal containing video data;
extracting video data of the parallel electrical signal containing the video data and carrying out dynamic time delay on the video data;
and circularly scrolling and displaying the video data.
Further, the extracting the video data of the parallel electrical signal containing the video data and dynamically delaying the video data includes:
buffering a parallel electric signal which is transmitted by the serial-parallel conversion module and contains video data, converting the first 8 bits of the parallel electric signal into image Cr/Cb data and the last 8 bits of the parallel electric signal into image Y data when a line and field synchronous signal is effective, and sampling the image Cr/Cb data and the image Y data by adopting a sampling method of 4;
wherein the parallel electrical signals are 16-bit parallel electrical signals;
on the premise that a video output line, a field synchronizing signal and a clock signal are not changed, storing the video data in an FPGA block memory, controlling the address bit of an output port of the FPGA block memory to be increased progressively, and outputting the video data through the output port in a read mode of the FPGA block memory;
and when N address bits of the output port of the FPGA block memory are increased, the output delay of the video data is increased by N clock signals.
The invention has the beneficial effects that:
the invention adopts a single-port FPGA block memory, realizes the design of a variable-length shift register by utilizing the characteristic that the input address bit can be dynamically changed, and can realize the dynamic change of the relative position of video data and line and field synchronous signals, thereby realizing the rolling display of video.
Drawings
FIG. 1 is a diagram of a video scrolling display device according to the present invention;
fig. 2 is a flowchart of a video scrolling method according to the present invention.
Detailed Description
The following detailed description of the embodiments of the invention refers to the accompanying drawings.
The invention provides a video rolling display device, which comprises a high-definition video photoelectric conversion module, a serial-parallel conversion module, a video data processing module and a video data display module which are sequentially connected, as shown in figure 1;
the high-definition video photoelectric conversion module: for receiving an optical signal containing video data and converting it into a serial electrical signal containing video data;
the serial-parallel conversion module: for converting the serial electrical signal containing video data to a parallel electrical signal containing video data;
the video data processing module: the device is used for extracting video data of the parallel electric signal containing the video data and carrying out dynamic time delay on the video data;
the video data display module: for circular scrolling display of the video data.
Specifically, the high-definition video photoelectric conversion module is a multi-path parallel optical transceiver module, wherein the central wavelength of the multi-path parallel optical transceiver module is 850nm, the single-channel transmission rate reaches 6.25Gbps, and the interface level is standard CML.
Specifically, the serial-to-parallel conversion module is configured to: and after receiving the serial electric signal, converting the serial electric signal containing the video data into a 16-bit parallel electric signal, wherein the rate of receiving the serial electric signal by the serial-parallel conversion module is 600M-1.5Gbps.
Specifically, the video data processing module includes:
an extracting unit, configured to buffer a parallel electrical signal including video data transmitted by the serial-to-parallel conversion module, convert the first 8 bits of the parallel electrical signal into image Cr/Cb data and convert the last 8 bits of the parallel electrical signal into image Y data when a line and field synchronization signal is valid, and sample the image Cr/Cb data and the image Y data by using 4;
wherein the parallel electrical signals are 16-bit parallel electrical signals;
the dynamic delay unit is used for storing the video data in an FPGA block memory under the premise that a video output line, a field synchronizing signal and a clock signal are not changed, controlling the address bit of an output port of the FPGA block memory to be increased progressively and outputting the video data through the output port in a read mode of the FPGA block memory;
and when N address bits of the output port of the FPGA block memory are increased, the output delay of the video data is increased by N clock signals.
The invention provides a method for scrolling and displaying a video, which comprises the following steps as shown in figure 2:
receiving an optical signal containing video data and converting the optical signal into a serial electrical signal containing video data;
converting the serial electrical signal containing video data to a parallel electrical signal containing video data;
extracting video data of the parallel electrical signal containing the video data and carrying out dynamic time delay on the video data;
and circularly scrolling to display the video data.
Specifically, the extracting the video data of the parallel electrical signal containing the video data and performing dynamic delay on the video data includes:
buffering a parallel electric signal which is transmitted by the serial-parallel conversion module and contains video data, converting the first 8 bits of the parallel electric signal into image Cr/Cb data and the last 8 bits of the parallel electric signal into image Y data when a line and field synchronous signal is effective, and sampling the image Cr/Cb data and the image Y data by adopting a sampling method of 4;
wherein the parallel electrical signals are 16-bit parallel electrical signals;
on the premise that a video output line, a field synchronization signal and a clock signal are not changed, storing the video data in an FPGA block memory, controlling the address bit of an output port of the FPGA block memory to increase progressively, and outputting the video data through the output port in a read mode of the FPGA block memory;
and when N address bits of the output port of the FPGA block memory are increased, the output delay of the video data is increased by N clock signals.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.
Claims (4)
1. A video rolling display device is characterized by comprising a high-definition video photoelectric conversion module, a serial-parallel conversion module, a video data processing module and a video data display module which are sequentially connected;
the high-definition video photoelectric conversion module: for receiving an optical signal containing video data and converting it into a serial electrical signal containing video data;
the serial-parallel conversion module: for converting the serial electrical signal containing video data to a parallel electrical signal containing video data;
the video data processing module: the device is used for extracting video data of the parallel electric signal containing the video data and carrying out dynamic time delay on the video data;
the video data display module: for displaying the video data in a circular rolling manner;
the video data processing module comprises:
an extracting unit, configured to buffer a parallel electrical signal including video data transmitted by the serial-to-parallel conversion module, convert the first 8 bits of the parallel electrical signal into image Cr/Cb data and convert the last 8 bits of the parallel electrical signal into image Y data when a line and field synchronization signal is valid, and sample the image Cr/Cb data and the image Y data by using 4;
wherein the parallel electrical signals are 16-bit parallel electrical signals;
the dynamic delay unit is used for storing the video data in an FPGA block memory under the premise that a video output line, a field synchronizing signal and a clock signal are not changed, controlling the address bit of an output port of the FPGA block memory to be increased progressively and outputting the video data through the output port in a read mode of the FPGA block memory;
when the number of the address bits of the output port of the FPGA block memory is increased by N, the output delay of the video data is increased by N clock signals.
2. The apparatus of claim 1, wherein the high definition video optical-to-electrical conversion module is a multi-path parallel optical transceiver module, wherein the multi-path parallel optical transceiver module has a center wavelength of 850nm, a single channel transmission rate of 6.25Gbps, and an interface level of standard CML.
3. The apparatus of claim 1, wherein the serial-to-parallel conversion module is to: and after receiving the serial electric signal, converting the serial electric signal containing the video data into a 16-bit parallel electric signal, wherein the rate of receiving the serial electric signal by the serial-parallel conversion module is 600M-1.5Gbps.
4. A method for scrolling display of video, the method comprising:
receiving an optical signal containing video data and converting the optical signal into a serial electrical signal containing video data;
converting the serial electrical signal containing video data to a parallel electrical signal containing video data;
extracting video data of the parallel electrical signal containing the video data and carrying out dynamic time delay on the video data;
circularly scrolling and displaying the video data;
the extracting the video data of the parallel electrical signal containing the video data and dynamically delaying the video data comprises:
buffering a parallel electric signal which is transmitted by a serial-parallel conversion module and contains video data, converting the first 8 bits of the parallel electric signal into image Cr/Cb data and the last 8 bits of the parallel electric signal into image Y data when a line and field synchronous signal is effective, and sampling the image Cr/Cb data and the image Y data by adopting a sampling method of 4;
wherein the parallel electrical signals are 16-bit parallel electrical signals;
on the premise that a video output line, a field synchronization signal and a clock signal are not changed, storing the video data in an FPGA block memory, controlling the address bit of an output port of the FPGA block memory to increase progressively, and outputting the video data through the output port in a read mode of the FPGA block memory;
and when N address bits of the output port of the FPGA block memory are increased, the output delay of the video data is increased by N clock signals.
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