CN101917597B - Quick-look system suitable for large-area high-bit depth grayscale remote sensing images - Google Patents

Quick-look system suitable for large-area high-bit depth grayscale remote sensing images Download PDF

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CN101917597B
CN101917597B CN2010102277294A CN201010227729A CN101917597B CN 101917597 B CN101917597 B CN 101917597B CN 2010102277294 A CN2010102277294 A CN 2010102277294A CN 201010227729 A CN201010227729 A CN 201010227729A CN 101917597 B CN101917597 B CN 101917597B
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data
pcie
module
dark
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CN101917597A (en
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陈曦
汪鼎文
张青林
石文轩
周严
夏巧桥
黄腾
高利涛
邓德祥
吴敏渊
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Wuhan Zhuomu Technology Co.,Ltd.
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Wuhan University WHU
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Abstract

The invention relates to the technical fields of remote sensing, geographical information and global positioning, in particular to a quick-look system for large-area high-bit depth grayscale remote sensing images. The quick-look system comprises camera image receiving equipment, image preprocessing equipment, a PCIE image receiving card, a high-performance workstation, a PCIE image sending card, a high grayscale bit depth video image distributor, and a high grayscale bit depth special display, wherein the high-performance workstation operates CIDS image analysis processing software to perform processing such as modulation transfer function calculation, signal to noise ratio calculation and histogram calculation on the received image data, and outputs results to a local LCD display. The quick-look system can realize the processing and quick look of common camera images, and fills a technical blank that the undistorted large-area quick-look display of the large-area high-bit depth grayscale remote sensing images cannot be realized at home.

Description

A kind of quick look system that is applicable to the high-order dark-grey rank of large format remote sensing images
Technical field
The present invention relates to remote sensing, geography information, global-positioning technology field, relate in particular to a kind of quick look system that is used for the high-order dark-grey rank of large format remote sensing images.
Background technology
The 3S technology is the general designation of remote sensing, GIS-Geographic Information System, global positioning system.The present invention is mainly used in the remote sensing field in the 3S field, and the undistorted demonstration of full width face of the high-order dark-grey rank of large format remote sensing satellite image is the research focus of this technical field.Wherein the most unmanageable have two kinds of situation: after receiving the remote sensing satellite image, realize that the nothing sampling full width face of the high-order dark digital picture of large format high-resolution shows; Realize the undistorted demonstration in high-order dark-grey rank of the high-order dark digital picture of large format high-resolution.
The collection of traditional remote sensing satellite image, demonstration are the schemes that adopts image pick-up card+high-performance workstation+common LCD display; Wherein high-performance workstation is as master controller; Realize that through the control image pick-up card satellite image obtains, view data outputed to be convenient to observation on the display that in general high performance work station can drive the display of 2 LCD; The maximum 1920*1080 that supports of LCD display resolution commonly used; Maximum quantization is 8bits deeply, and the maximum that just can observe simultaneously is 1920*2*1080 as several points, and the position is dark to be the 8bits GTG.
Development along with remote sensing space exploration technology; The remote sensing satellite image need possess characteristics such as large format and high radiometric resolution; Promptly require the remote sensing satellite camera by multi-disc ccd sensor splicing focal plane, and the analog signal of each CCD pixel output is through 10bits even the dark quantification in 12bits position.How to break away from the dark display driver restriction in traditional computer bus 8bits position, splicing realizes the undistorted demonstration of large format of satellite image on the display of the dark-grey rank of a plurality of high positions, is remote sensing field urgent problem.
Summary of the invention
Technical problem to above-mentioned existence; The purpose of this invention is to provide a kind of quick look system that is used for the high-order dark-grey rank of large format remote sensing images, look scheme soon and develop the corresponding equipment of looking soon with the high-order dark-grey rank of the large format high-resolution image real-time that is applied in the remote sensing technology field.
For achieving the above object, the present invention adopts following technical scheme:
The camera image receiving equipment is used to receive 8 tunnel camera image data, after the view data that receives is carried out multiple connection and handled, is transferred to the image pre-processing device based on Cameralink syntype passage with the mode of time-sharing multiplex;
The image pre-processing device; Be used to receive the output signal of 1-4 platform camera image receiving equipment; Thereby realize maximum simultaneously 32 tunnel the view data that receives, and be provided with according to the user can data be sampled, processing such as counter-rotating, grey scale change, the data parallel output after handling the most at last;
PCIE image receiving card is installed on the PCIE slot of high performance work station, is used to receive the view data that the image pre-processing device sends, and the PCIE bus through high-performance workstation with data-moving in the internal memory of work station;
High-performance workstation; Operation CIDS image analysis processing software on it; After the view data that receives being carried out processing such as histogram calculation, the calculating of biography letter, snr computation; Output to the result on the local LCD display, and will need the images displayed data to send to PCIE image transmission card simultaneously through the PCIE bus;
The PCIE image sends card, is installed on the PCIE slot of high performance work station, receives the view data to be shown that high-performance workstation sends through the PCIE bus, and data are transferred to the dark video image distributor in high gray position with parallel mode;
The video image distributor that the high gray position is dark is used to receive the PCIE image and sends the view data to be shown that card transmits, and is the picture format of the dark dedicated display defined in high gray position with this data transaction, thereby drives the dark dedicated display in high gray position;
The dark dedicated display in high gray position.
Said camera image receiving equipment receives backboard by 8 camera image receiving cards and 1 camera image and forms;
Said camera image receiving card receives the parallel input signal of LVDS, BLVDS serial input signals and ECL serial input signals, and mainly also modular converter, level switch module, field programmable gate function FPGA constitute internal circuit by string;
Said camera image receives backboard and receives the data that 8 camera image receiving card transmission come simultaneously through 8 PCIE slots, and internal circuit mainly is made up of field programmable gate function FPGA, Cameralink syntype output module.
String and modular converter in the said camera image receiving card mainly are made up of the DS90CR218 chip, and level switch module mainly is made up of MC100EP90, MAX9376 chip;
The field programmable gate function that said camera image receiving card, said camera image receive in the backboard all selects for use the FPGA device EP2GX60 of altera corp to constitute.
Said image pre-processing device internal circuit is made up of 4 Cameralink syntype input interface modules, field programmable gate function FPGA, SDRAM cache module, usb interface modules;
Cameralink syntype input interface module mainly is made up of the DS90CR288 chip, is used for the serial LVDS conversion of signals that receives is parallel LVTTL data-signal;
Usb interface module mainly is made up of the CY7C68013 chip, is used to receive the control command that high-performance workstation sends through the USB2.0 port, and sends FPGA to;
The SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made up of 8 SDRAM chip MT48LC32M16.
Said PCIE image receiving card, PCIE image send card by field programmable gate function FPGA, configurable input/output interface module, SDRAM cache module, and PCI-PCIE * 4 bridge modules constitute; Direct and the configurable input/output interface module of the IO port of field programmable gate function FPGA, SDRAM cache module, PCI-PCIE * 4 bridge modules are connected;
Said field programmable gate function FPGA selects the FPGA device EP2C70 of altera corp for use, through the exchanges data between the realization of constitutive logic circuit and SDRAM cache module, PCI-PCIE * 4 bridge modules and the configurable input/output interface module;
Said configurable input/output interface module is used for according to the configuration of module resistance input or output interface being set.
The CIDS image analysis processing software of moving in the said high-performance workstation comprises with lower module:
Device driver module is positioned at the operating system kernel layer, is used for the driving of PCIE image receiving card, PCIE image transmission card, disk array driving and image pre-processing device USB;
Data processing module is responsible for and the communication of device driver module and reception, transmission and the transfer of data of human-computer interaction module control command as the intermediate layer;
Human-computer interaction module is positioned at the superiors, is used for data and data analysis result are appeared with multiple modes such as image, form, histogram and curves, receives operation response personnel's keyboard input and mouse action simultaneously.
The video image distributor that said high gray position is dark is made up of 1 video distributor image receiving sheet and 4 video distributor DVI drive plates;
Said video distributor image receiving sheet is used to receive the PCIE image and sends the view data that the card transmission comes, and gives video distributor DVI drive plate with transfer of data;
Said video distributor DVI drive plate, the picture format output that view data is converted into the dark dedicated display defined in high gray position drives the dark dedicated display in high gray position.
Said video distributor image receiving sheet; Constitute by field programmable gate function FPGA, parallel serial conversion module; Wherein said field programmable gate function FPGA selects the device EP2C70 of altera corp for use; Through 4 fifo modules of memory resource construction that call this chip internal, it is the LVDS parallel image signal of form that EP2C70 directly receives with the frame;
Said parallel serial conversion module mainly is made up of the DS90CR217 chip, and the LVTTL parallel data that is used for EP2C70 is sent converts the BLVDS serial signal into.
Said video distributor DVI drive plate is made up of field programmable gate function FPGA, string and modular converter, SDRAM cache module, DVI driver module;
Wherein, said string and modular converter mainly are made up of the DS90CR218 chip, and it is used for converting the BLVDS serial input signals into parallel LVTTL signal; Said SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made up of 12 SDRAM chip MT48LC32M16; Said field programmable gate function FPGA selects for use the FPGA device EP2C70 of altera corp to constitute; Said DVI driver module mainly is made up of chip TFP410.
The present invention has the following advantages and good effect:
Not only can realize the general camera treatment of picture and look soon, and fill up the domestic undistorted large format of the high-order dark-grey rank of large format remote sensing images of can't realizing and looked the technique for displaying blank soon.
Description of drawings
Fig. 1 is the quick look system structured flowchart of the high-order dark-grey rank of large format provided by the invention remote sensing images.
Fig. 2 is the internal structure block diagram of camera image receiving equipment among the present invention.
Fig. 3 is the schematic block circuit diagram of image pre-processing device among the present invention.
Fig. 4 is the schematic block circuit diagram of PCIE image receiving card among the present invention, transmission card.
Fig. 5 is the schematic block circuit diagram of configurable input/output interface module in PCIE image receiving card among the present invention, the transmission card.
Fig. 6 is the frame diagram of CIDS image analysis processing software in the high-performance workstation among the present invention.
Fig. 7 is the internal structure block diagram of the dark video image distributor in high gray position among the present invention.
Embodiment
Combine accompanying drawing that the present invention is described further with specific embodiment below:
As shown in Figure 1, the quick look system of the high-order dark-grey rank of large format provided by the invention remote sensing images has two kinds of mode of operations: image live preview pattern and image reproducing roam mode, respectively the system configuration under two kinds of different working modes is described in detail below:
Under image live preview pattern; Every camera image receiving equipment 101,102,103,104 maximum receptions of supporting the dark remote sensing image data of 8 road 12bits ash component level; After camera image receiving equipment 101,102,103,104 carries out the view data that receives multiple connection and handles, be transferred to image pre-processing device 105 with the mode of time-sharing multiplex based on Cameralink syntype passage; Every image pre-processing device 105 connects 4 camera image receiving equipments 101,102,103,104 at most; Receive when promptly maximum is supported 32 road remote sensing image datas; The image pre-processing device 105 USB2.0 interface through standard and high-performance workstation 107 are mutually in succession; According to receive running parameter to view data sample, processing such as counter-rotating, grey scale change, and with the view data and the line output of area-of-interest; PCIE image receiving card 106 is installed on the PCIE slot of high-performance workstation 107, is used to receive the view data that image pre-processing device 105 sends, and the PCIE bus through high-performance workstation 107 with data-moving in the internal memory of work station; The CIDS image analysis processing software of operation independent development in the high-performance workstation 107; After view data is carried out statistical analysis; The user's interest data are sent to realize in the video memory of work station that local express looks demonstration; Meanwhile identical data are sent to the PCIE image through the PCIE bus and send card 108 and look demonstration soon with what the large formats of realizing the remote sensing satellite image did not have a GTG distortion, raw image data and relevant treatment result also can store into through the RAID0 array control unit of high-performance workstation 107 in the local disk array in addition; The PCIE image sends and after card 108 is received view data to be shown through the PCIE bus interface data to be transferred to the dark video image distributor 109 in high gray position with parallel schema; The dark video image distributor in high gray position 109 is maximum to be driven when supporting the dark dedicated display in 4 high gray positions and shows; It is after receiving view data; With data transaction is the picture format of dark dedicated display 110,111,112,113 defineds in high gray position, and the DVI-Digital through standard directly drives the dark dedicated display 110,111,112,113 in high gray position; In the present invention; The dark dedicated display 110,111,112,113 in high gray position adopts the dedicated display G33 of the 12bits GTG of EIZO company; It is maximum supports that resolution is 2048*1536, thereby the resolution that 4 G33 use to realize the 12bits GTG is simultaneously looked demonstration soon as what the full width face of the large format remote sensing images of 8192*1536 did not have a GTG distortion.
Under the image reproducing roam mode; The CIDS image analysis processing software of operation independent development in the high-performance workstation; The view data of reading and saving from the local disk array; Send card 108 through the PCIE image and send to the dark video image distributor 109 in high gray position, thereby directly drive 4 dark dedicated display 110,111,112,113 in high gray position, the playback roaming shows the dark remote sensing images in large format high gray position.
Fig. 2 is the internal structure block diagram of camera image receiving equipment among the present invention, and the camera image receiving equipment receives backboard 210 by 8 camera image receiving cards (#1, #2, #3, #4, #5, #6, #7, #8) and 1 camera image and forms: camera image receiving card (#1, #2, #3, #4, #5, #6, #7, #8) is used to receive the view data of varying level form; The data that camera image reception backboard 210 is used for 8 camera image receiving cards are received are carried out data multiplexing, and export with Cameralink syntype standard.
Camera image receiving card (#1, #2, #3, #4, #5, #6, #7, #8) can receive the parallel input signal 201 of LVDS; BLVDS serial input signals 202 and ECL serial input signals 203; Internal circuit is mainly by string and modular converter 204; Level switch module 205, field programmable gate function FPGA206 constitutes.
Directly modular converter 204, level switch module 205 are connected the IO port of field programmable gate function FPGA206 with going here and there also, adopt hardware description language directly to construct logic glue and have realized the control of scale programmable logic device FPGA206 to string and modular converter 204.
String and modular converter 204 mainly are made up of the DS90CR218 chip, and it is used for converting BLVDS serial input signals 202 into parallel LVTTL signal.
Level switch module 205 mainly is made up of MC100EP90, MAX9376 chip, and it is used for converting the ECL level signal of input into the LVDS level signal.
Field programmable gate function 206 is selected the FPGA device EP2GX60 of altera corp for use; This device contains the configurable input/output port of rich functions (IO port); Wherein a part of IO port is set to the LVTTL signal input port, is used for directly connecting the LVTTL signal of DS90CR218 output; Part IO port is set to the receiving port of high speed LVDS, is used for directly receiving the parallel input signal of LVDS; Can also directly call the deserializer among the EP2GX60 through IPCORE in addition, be used to receive the ECL serial input signals that has converted the LVDS serial signal into.EP2GX60 is transferred to camera image reception backboard 210 with Rapid IO agreement through PCIE interface 207 with data after receiving signal.
Camera image receives backboard 210 can receive the data that 8 camera image receiving cards (#1, #2, #3, #4, #5, #6, #7, #8) transmission comes simultaneously through 8 PCIE slots, and internal circuit mainly is made up of field programmable gate function FPGA209, Cameralink syntype output module 211.
Field programmable gate function 209 is selected the FPGA device EP2GX60 of altera corp for use; Receive the data that the transmission of 8 camera image receiving cards comes simultaneously and be cached in its inner fifo module through the Rapid IO receiver module that calls this chip internal, then under the control of output control module with data with time-multiplexed mode and line output.
Cameralink syntype output module 211 mainly is made up of the DS90CR287 chip, and it is used for converting the parallel data that EP2GX60 sends the output of into Cameralink syntype standard.
Fig. 3 is the schematic block circuit diagram of image pre-processing device among the present invention; The maximum support of image pre-processing device is connected with 4 camera image receiving equipments, and internal circuit is made up of Cameralink syntype input interface module 301, Cameralink syntype input interface module 302, Cameralink syntype input interface module 303, Cameralink syntype input interface module 304, usb interface module 305, SDRAM cache module 306, field programmable gate function FPGA307.
The structure of Cameralink syntype input interface module 301,302,303,304 is identical, and it mainly is made up of the DS90CR288 chip, is used for the serial LVDS conversion of signals that receives is parallel LVTTL data-signal.
Usb interface module 305 is used to receive the control command that high-performance workstation 107 sends through the USB2.0 port, and sends FPGA307 to, and it mainly is made up of the CY7C68013 chip.
SDRAM cache module 306 is used for the view data that buffer memory receives; It mainly is made up of 8 SDRAM chip MT48LC32M16; In order to increase work efficiency; Under the control of FPGA, 8 MT48LC32M16 chips carry out work with ping-pong mechanism, thereby carry out when having guaranteed data read-write operation.
Field programmable gate function FPGA307 selects the FPGA device EP2GX60 of altera corp equally for use; Through the constitutive logic circuit; Receive the data of 4 Cameralink syntype input channels simultaneously, and be cached in the SDRAM module 306, the control command that receives according to usb interface module 305 then from high-performance workstation 107; To view data sample, processing such as counter-rotating, grey scale change, with the user's interest data with parallel LVDS data format output.
Fig. 4 is the schematic block circuit diagram of PCIE image receiving card among the present invention, transmission card.PCIE image receiving card is used to receive the view data that the image pre-processing device sends, and the PCIE bus through high-performance workstation with data-moving in the internal memory of work station.The PCIE image sends cartoon and crosses the view data to be shown that the PCIE bus receives high-performance workstation's transmission, and data are transferred to the dark video image distributor in high gray position with parallel mode.The circuit design of PCIE image receiving card, transmission card is in full accord, and by field programmable gate function FPGA401, configurable input/output interface module 402, SDRAM cache module 403, PCI-PCIEx4 bridge module 404 constitutes.
Direct and the configurable input/output interface module of the IO port of field programmable gate function FPGA401 402, SDRAM cache module 403, PCI-PCIE * 4 bridge modules 404 are connected, and adopt hardware description language directly to construct logic glue and have realized the control of scale programmable logic device FPGA401 to SDRAM cache module 403, PCI-PCIEx4 bridge module 404.
Field programmable gate function FPGA401 selects the FPGA device EP2C70 of altera corp for use, through the exchanges data between the realization of constitutive logic circuit and SDRAM cache module 403, PCI-PCIEx4 bridge module 404 and the configurable input/output interface module 402.
Configurable input/output interface module 402 is used for according to the configuration of module resistance input or output interface being set.The FPGA device EP2C70 of altera corp contains the LVDS transceiver of great deal of rich; As Fig. 5 (a) (b) shown in; With a pair of difference pin AD2, AD3 demonstrates different input and output functions under different resistance configuration; Be on duty when connecting the resistance R 1 in one 100 Europe between branch pin AD2, the AD3, difference pin AD2, AD3 are set to the LVDS input pin; Be on duty when connecting a π type resistance (R2=120 Europe, R3=170 Europe, R4=120 Europe) between branch pin AD2, the AD3, difference pin AD2, AD3 are set to the LVDS output pin.According to above-mentioned analysis, the circuit theory diagrams of configurable input/output interface module are shown in Fig. 5 (c), when R5=0 Europe; R6=100 Europe; During R7=0 Europe, configurable input/output interface module is set to the LVDS input interface module, and promptly this card is configured to PCIE image receiving card; When R5=120 Europe, R6=170 Europe, during R7=120 Europe, configurable input/output interface module is set to the LVDS output interface module, and promptly this card is configured to PCIE image transmission card.
SDRAM cache module 403 is used for the view data that buffer memory receives; It mainly is made up of 8 SDRAM chip MT48LC32M16; In order to increase work efficiency; Under the control of FPGA, 8 MT48LC32M16 chips carry out work with ping-pong mechanism, thereby carry out when having guaranteed data read-write operation.
PCI-PCIEx4 bridge module 404 mainly is made up of the PCIX bridging chip PI7C9X130 of PTI company.When this card is operated in receiving mode following time, the data transaction that the PCI-PCIEx4 bridge module is used for FPGA is sent with the PCI agreement is the PCIEx4 protocol data, and is transferred in the internal memory of high-performance workstation.When this card is operated in sending mode following time, the data transaction that the PCI-PCIEx4 bridge module is used for high-performance workstation is sent with the PCIEx4 agreement is the data of PCI agreement, receives data by the PCI logic function module of constructing in the FPGA, and exports.
Fig. 6 is software frame figure of the present invention, the software architecture of The software adopted layering of the present invention, modularization and parallel processing with satisfy to mass data show at a high speed, the requirement of analyzing and processing.System software module mainly is divided into three layers: device drive layer, data analysis layer and man-machine interaction layer.Carried out good encapsulation with the functional module of interlayer in each module layer, coupling is low, and the modification of the functional efficiency property improved can not have influence on other layer module in each layer.Simultaneously, software has favorable expansibility, increases function like need, then increases corresponding interface at the equivalent layer secondary module, can not impact to the whole software framework.
Device drive layer is positioned at the operating system kernel layer, is responsible for the driven management of four kinds of equipment among the present invention, is respectively PCIE image receiving card, PCIE image transmission card, disk array driving and image pre-processing device USB and drives.Wherein PCIE image receiving card is responsible for receiving the data of parallel input; The PCIE image sends card and is responsible for 4 12Bit display screens are needed the parallel dark video image distributor in high gray position that is sent to of data presented; Disk array drives control commands such as being responsible for sending disk array resets, reading and writing, and receives data from disk array; Image pre-processing device USB drive to be responsible for to the selection of image pre-processing device sendaisle, channel data side-play amount, data sampling rate and sample mode and control command such as to reset, begins and stop.
Data analysis layer is an intermediate layer, is responsible for and the communication of device drive layer and reception, transmission and the transfer of data of man-machine interaction layer control command.Its major function is: resolve PCIE image receiving card data format; Coding PCIE image sends the card data format; Resolve the combination data of magnetic disk array; The data of magnetic disk array management; Coding disk array control command and the dark video image distributor control command in high gray position; Each channel image splicing; Calculating such as modulation transfer function calculating, snr computation, histogram calculation, average, root mean square; Picture contrast enhancing etc.
The brightness that modulation transfer function calculates darkness that the brightness be meant light deducts light and light adds the ratio of the darkness of glazing; The snr computation of camera imaging is a signal and the ratio of the power spectrum of noise; Grey level histogram is the function of gray scale, the number of the pixel of every kind of gray scale in its expression camera imaging, every kind of frequency that gray scale occurs in the reflection image; Equal all pixel average gray values of value representation camera imaging; The result that root mean square extracts square root N gray values of pixel points quadratic sum after divided by N; The picture contrast enhancing promptly becomes more even to the distribution of gray value in the image on each gray scale.
The realization of above-mentioned technology contents is to well known to a person skilled in the art technological means, and those skilled in the art readily appreciate that how to programme according to its content and realize above-mentioned various calculating, do not repeat them here.
The man-machine interaction layer is positioned at the superiors, and main being responsible for presents data and data analysis result with multiple modes such as image, form, histogram and curves, responsible simultaneously reception operation response personnel's keyboard input and mouse action etc.Software provide image amplification, dwindle, multiple display mode such as automatic roaming when cutting, playback, support operations such as multichannel hot key, drag and drop.
Fig. 7 is the internal structure block diagram of the dark video image distributor in high gray position among the present invention, and the video image distributor is made up of 1 video distributor image receiving sheet 710 and 4 video distributor DVI drive plates (71,72,73,74); Video distributor image receiving sheet 710 is used to receive the PCIE image and sends the view data that the card transmission comes, and gives video distributor DVI drive plate (71,72,73,74) with transfer of data; Video distributor DVI drive plate (71,72,73,74) drives the dark dedicated display in high gray position with the picture format output that view data converts the dark dedicated display defined in high gray position into.
Video distributor image receiving sheet 710 is made up of field programmable gate function FPGA705, parallel serial conversion module 706,707,708,709.
Field programmable gate function FPGA705 selects the FPGA device EP2C70 of altera corp for use; Through 4 fifo modules of memory resource construction that call this chip internal; (its resolution is 8192*1536 to the LVDS parallel image signal that the direct reception of EP2C70 is form with the frame; Be that every frame has 1536 row; Every row has 8192 pictures to count a little), and every capable picture signal segmentation is stored in 4 FIFO (the 1st picture number of the every row of first FIFO stored o'clock counted a little to the 2048th picture, and the 2049th picture number of second every row of FIFO stored o'clock counted a little to the 4096th picture; The 4097th picture number of the 3rd the every row of FIFO stored o'clock counted a little to the 6144th picture; The 6145th picture number of the 4th the every row of FIFO stored o'clock counted a little to the 8192nd picture), when data line receive finish after, it is said that 4 FIFO are defeated by parallel-to-serial converter with 2048 numbers simultaneously.
Parallel serial conversion module 706,707,708,709 mainly is made up of the DS90CR217 chip, and its LVTTL parallel data that is used for EP2C70 is sent converts the BLVDS serial signal into.
Also modular converter 701, SDRAM cache module 702, field programmable gate function FPGA 703, DVI driver module constitute 704 to video distributor DVI drive plate (71,72,73,74) by string.
String and modular converter 701 mainly are made up of the DS90CR218 chip, and it is used for converting the BLVDS serial input signals into parallel LVTTL signal.
SDRAM cache module 702 is used for the view data that buffer memory receives, and it mainly is made up of 12 SDRAM chip MT48LC32M16, and wherein per 4 MT48LC32M16 constitute a memory cell, altogether the cache module of a polling mechanism of 3 memory cell compositions.Because the refresh frame frequency of display graphics image is different on the received image data frame frequency of video distributor DVI drive plate and the dark dedicated display in high gray position; Especially when received image data frame frequency less than the dark dedicated display in high gray position on during the refresh frame frequency of display graphics image; Through using the cache module of polling mechanism, realize that the not frame losing of image shows.
Field programmable gate function FPGA 703 selects the FPGA device EP2C70 of altera corp for use; View data pattern of the input according to the dark dedicated display in high gray position that is adopted (that adopt in this example is the 12bits GTG display G33 of EIZO company); Through the corresponding logical circuit of hardware description language built; Convert received maximum quantization the view data of the required specific format of G33 display into deeply for the view data of 12bits, export with the LVTTL parallel data.
DVI driver module 704 mainly is made up of chip TFP410, and TFP410 is the special-purpose DVI chip for driving of TI company, and it is the difference LVDS data of DVI standard with the parallel image data transaction of LVTTL form, shows to drive the G33 display.
The dark dedicated display in high gray position adopts the 12bits GTG display G33 of EIZO company, and it has the characteristics on the high-order dark-grey rank of high-resolution, and a plurality of the use simultaneously can the undistorted display image of large format.
Embodiment
Suppose that certain remote sensing satellite camera is by 32 ccd sensor splicing focal planes; What ccd sensor was taked is the working method of linear array scanning; And the analog signal of each CCD pixel output is exported with the mode that LVDS is parallel through the dark quantification in 12bits position, and 6144 pictures of its every line output are counted a little.Suppose and on the dark dedicated display in high gray position, to observe the full reduced sketch map of 32 passages and the full width face figure of certain passage; The existing operation as follows: 32 taps outputs of remote sensing satellite camera are connected with 4 camera image receiving equipments respectively through cable; The output of image receiving apparatus is connected with the image pre-processing device through the Cameralink cable of standard; The image pre-processing device is under the order control of high-performance workstation; Data to 32 passages are sampled; The thumbnail data of 32 passages and the full width face diagram data of certain passage are transferred to PCIE image receiving card through parallel cable; PCIE image receiving card with the data-moving that receives in the internal memory of high-performance workstation; The CIDS image analysis processing software of operation independent development in the high-performance workstation after the view data that receives carried out histogram calculation, passes processing such as letter calculatings, snr computation, outputs to the result on the local LCD display; And will need the images displayed data to send to PCIE image transmission card, RAID0 disk array recording image data of forming by 6 hard disks in the high-performance workstation in addition and relevant treatment result according to customer requirements simultaneously through the PCIE bus.PCIE image transmission cartoon is crossed parallel cable the thumbnail data of 32 passages and the full width face diagram data of certain passage is transferred to the dark video image distributor in high gray position; The dark video image distributor in high gray position is the picture format of the dark dedicated display defined in high gray position with the data transaction that receives; Drive 4 dark dedicated display G33 in high gray position; Thereby (resolution is 2048*1536 to be implemented in the thumbnail that shows 32 passages on the G33 display; The 12bits GTG quantizes), splice the full width face figure (resolution is 6144*1536, and the 12bits GTG quantizes) that shows certain passage on three G33 displays.
More than operation is an application note under the image live preview pattern; Certainly the user can divide the dark dedicated display in high gray position as required flexibly; For example with the thumbnail that shows 32 passages on the G33 display, splicing shows 1: 2 thumbnail of certain 2 passage etc. on three G33 displays.In like manner can accomplish the operation of image reproducing roam mode.
Compare with existing other camera quick look systems, the present invention has following several respects characteristic:
Adopt the dark dedicated display G33 in 12bits high gray position of EIZO company, utilize field programmable gate function FPGA construction logic circuit directly it to be driven, realized that the GTG of the above GTG quantized image of 8bits is undistorted to look demonstration soon.
Directly drive many (1-4 platform) high-resolution 12bits high gray dark dedicated display G33 in position through the dark video image distributor in high gray position; Realized the undistorted demonstration of large format high gray (ultimate resolution 8192*1536, the 12bits GTG quantizes) of region of interest area image.
Above-mentioned instance is used for the present invention that explains, rather than limits the invention, and in the protection range of spirit of the present invention and claim, the present invention is made any modification and change, all falls into protection scope of the present invention.

Claims (7)

1. a quick look system that is used for the high-order dark-grey rank of large format remote sensing images is characterized in that, comprising:
The camera image receiving equipment is used to receive 8 tunnel camera image data, after the view data that receives is carried out multiple connection and handled, is transferred to the image pre-processing device based on Cameralink syntype passage with the mode of time-sharing multiplex;
The image pre-processing device; Be used to receive the output signal of 1-4 platform camera image receiving equipment; Thereby realize maximum simultaneously 32 tunnel the view data that receives, and be provided with according to the user can data be sampled, processing such as counter-rotating, grey scale change, the data parallel output after handling the most at last;
PCIE image receiving card is installed on the PCIE slot of high performance work station, is used to receive the view data that the image pre-processing device sends, and the PCIE bus through high-performance workstation with data-moving in the internal memory of work station;
High-performance workstation; Operation CIDS image analysis processing software on it; After the view data that receives being carried out processing such as modulation transfer function calculating, snr computation, histogram calculation; Output to the result on the local LCD display, and will need the images displayed data to send to PCIE image transmission card simultaneously through the PCIE bus; The CIDS image analysis processing software of moving in the said high-performance workstation comprises device driver module, data processing module and human-computer interaction module; Device driver module is positioned at the operating system kernel layer, is used for the driving of PCIE image receiving card, PCIE image transmission card, disk array driving and image pre-processing device USB; Data processing module is responsible for and the communication of device driver module and reception, transmission and the transfer of data of human-computer interaction module control command as the intermediate layer; Human-computer interaction module is positioned at the superiors, is used for data and data analysis result are appeared with multiple modes such as image, form, histogram and curves, receives operation response personnel's keyboard input and mouse action simultaneously;
The PCIE image sends card, is installed on the PCIE slot of high performance work station, receives the view data to be shown that high-performance workstation sends through the PCIE bus, and data are transferred to the dark video image distributor in high gray position with parallel mode;
The video image distributor that the high gray position is dark is used to receive the PCIE image and sends the view data to be shown that card transmits, and is the picture format of the dark dedicated display defined in high gray position with this data transaction, thereby drives the dark dedicated display in high gray position; The video image distributor that said high gray position is dark is made up of 1 video distributor image receiving sheet and 4 video distributor DVI drive plates; Said video distributor image receiving sheet is used to receive the PCIE image and sends the view data that the card transmission comes, and gives video distributor DVI drive plate with transfer of data; Said video distributor DVI drive plate, the picture format output that view data is converted into the dark dedicated display defined in high gray position drives the dark dedicated display in high gray position;
The dark dedicated display in high gray position.
2. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Said camera image receiving equipment receives backboard by 8 camera image receiving cards and 1 camera image and forms;
Said camera image receiving card receives the parallel input signal of LVDS, BLVDS serial input signals and ECL serial input signals, and mainly also modular converter, level switch module, field programmable gate function FPGA constitute internal circuit by string;
Said camera image receives backboard and receives the data that 8 camera image receiving card transmission come simultaneously through 8 PCIE slots, and internal circuit mainly is made up of field programmable gate function FPGA, Cameralink syntype output module.
3. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 2 is characterized in that:
String and modular converter in the said camera image receiving card mainly are made up of the DS90CR218 chip, and level switch module mainly is made up of MC100EP90, MAX9376 chip;
The field programmable gate function that said camera image receiving card, said camera image receive in the backboard all selects for use the FPGA device EP2GX60 of altera corp to constitute.
4. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Said image pre-processing device internal circuit is made up of 4 Cameralink syntype input interface modules, field programmable gate function FPGA, SDRAM cache module, usb interface modules;
Cameralink syntype input interface module mainly is made up of the DS90CR288 chip, is used for the serial LVDS conversion of signals that receives is parallel LVTTL data-signal;
Usb interface module mainly is made up of the CY7C68013 chip, is used to receive the control command that high-performance workstation sends through the USB2.0 port, and sends FPGA to;
The SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made up of 8 SDRAM chip MT48LC32M16.
5. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Said PCIE image receiving card, PCIE image send card by field programmable gate function FPGA, configurable input/output interface module, SDRAM cache module, and PCI-PCIE * 4 bridge modules constitute; Direct and the configurable input/output interface module of the IO port of field programmable gate function FPGA, SDRAM cache module, PCI-PCIE * 4 bridge modules are connected;
Said field programmable gate function FPGA selects the FPGA device EP2C70 of altera corp for use, through the exchanges data between the realization of constitutive logic circuit and SDRAM cache module, PCI-PCIE * 4 bridge modules and the configurable input/output interface module;
Said configurable input/output interface module is used for according to the configuration of module resistance input or output interface being set.
6. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Said video distributor image receiving sheet; Constitute by field programmable gate function FPGA, parallel serial conversion module; Wherein said field programmable gate function FPGA selects the device EP2C70 of altera corp for use; Through 4 fifo modules of memory resource construction that call this chip internal, it is the LVDS parallel image signal of form that EP2C70 directly receives with the frame;
Said parallel serial conversion module mainly is made up of the DS90CR217 chip, and the LVTTL parallel data that is used for EP2C70 is sent converts the BLVDS serial signal into.
7. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Said video distributor DVI drive plate is made up of field programmable gate function FPGA, string and modular converter, SDRAM cache module, DVI driver module;
Wherein, said string and modular converter mainly are made up of the DS90CR218 chip, and it is used for converting the BLVDS serial input signals into parallel LVTTL signal; Said SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made up of 12 SDRAM chip MT48LC32M16; Said field programmable gate function FPGA selects for use the FPGA device EP2C70 of altera corp to constitute; Said DVI driver module mainly is made up of chip TFP410.
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