CN101378483A - Digital high clear display control device and method - Google Patents
Digital high clear display control device and method Download PDFInfo
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- CN101378483A CN101378483A CNA2007100767780A CN200710076778A CN101378483A CN 101378483 A CN101378483 A CN 101378483A CN A2007100767780 A CNA2007100767780 A CN A2007100767780A CN 200710076778 A CN200710076778 A CN 200710076778A CN 101378483 A CN101378483 A CN 101378483A
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Abstract
The invention provides a digital high-definition display controlling device and a method thereof. The method comprises the steps that: a DVI interface module accesses an external video signal and inputs the external video signal to a screen capturing module; the screen capturing module captures the video signal according to a HDTV resolution ratio standard of 1280 multiplied by 720 and transmits the video signal after capturing to a data reorganization module which carries out data reorganization to the video signal and inputs the signal after reorganization to a ping pong storage controlling module which carries out caching storage process to the video data after reorganization and causes the video data to be output continuously to a data distribution module by an HDTV frame frequency of 60Hz; and the data distribution module adjusts the output sequence of the video data and outputs the video data to an LED lattice screen. The device and the method can cause the displaying result of the LED lattice screen to reach an HDTV displaying standard of 1280 multiplied by 720 at 60Hz.
Description
Technical field:
The present invention relates to HD digital TV export technique (HDTV), particularly be the high clear display control device and the method for a kind of LED of being used for dot matrix screen.
Background technology:
HD digital TV export technique (HDTV, High Definition Television) technology is to adopt the television system of digital data transmission.It from the collection of video, be fabricated into the transmission of video, and all realize digitlization to the reception of user terminal, therefore HDTV has brought high definition to us, its resolution reaches as high as 1920 * 1080, frame per second can reach 60fps, compare with traditional analog television, adopt the Digital Television of HDTV technology to have high definition picture, clear stereo sound accompaniment, TV signal and can store, can finish multiple advantages such as multimedia system, frequency resource utilization are abundant with computer.
The maximum characteristics of HDTV are exactly high definition, and display devices such as present most rear-projection, liquid crystal, plasma not necessarily can reach the resolution of signal source, that is to say that display device can't be brought the advantage of signal source into play.
In recent years, along with the develop rapidly of computer technology and integrated circuit technique, and the very big raising of performance such as brightness of high-brightness LED, blue LED, light efficiency, aberration, thereby LED dot matrix electronic display has appearred.
LED dot matrix electronic display is the large display screen system that integrates microelectric technique, computer technology, the information processing technology.It is bright in luster with it, and dynamic range is wide, brightness height, advantage such as the life-span is long, and working stability is reliable and become the ideal that numerous display medias and outdoor study show and select.Yet,, therefore can't be generalizable because factor such as the resolution of existing LED dot matrix electronic display is not high, frame frequency and gray scale are low makes it in the requirement that does not also reach HD digital TV export technique (HDTV) aspect the video image demonstration.
Summary of the invention:
, frame frequency not high for the resolution that solves existing LED dot matrix electronic display and gray scale are low, can not satisfy the problem that HDTV requires, the object of the present invention is to provide a kind of digital high clear display control device and method, can reach 1280x720 with the terminal resolution that realizes LED dot matrix electronic display, frame frequency reaches the HDTV display standard of 60Hz.
For achieving the above object, the present invention is mainly by the following technical solutions:
A kind of digital high clear display control device, comprising having:
One DVI interface module is connected with external video source, is used for incoming video signal;
One screenshotss module is connected with the DVI interface module, by this screenshotss module the HDTV resolution standard of the video data in the incoming video signal according to 1280 x 720 is intercepted;
One data recombination module links to each other with the screenshotss module, will carry out recombination classes according to gray scale from the video data of screenshotss module;
One table tennis storage control module links to each other with the data recombination module, and the video data behind the recombination classes is carried out buffer-stored, and while output video data.
One data allocations module is connected with the table tennis storage control module, is used to adjust from the output order of table tennis storage control module video data and the data partition structure of coupling LED dot matrix screen, and with this video data input LED dot matrix screen.
Wherein also include a clock administration module, this Clock management module is connected with DVI interface module, screenshotss module, data recombination module, table tennis storage control module and data allocations module, it is by receiving the clock signal from the DVI interface module, produce and screenshotss module, data recombination module, table tennis storage control module and the corresponding clock signal of data allocations module, and control timing.
Wherein also include a display control signal generation module that is connected with the Clock management module, the clock that it produces according to the Clock management module produces the LED dot matrix screen control signal that matches with the video data sequential.
Also be connected with two memories on the wherein said table tennis storage control module, realize the continuity of data buffering and transfer of data by this memory.
Wherein said screenshotss module comprises linage-counter, column counter, row register and column register.
Wherein said data allocations module comprises the data latching array and and goes here and there conversion array.
In addition, for realizing goal of the invention of the present invention, the present invention also adopts following method:
A kind of digital high-definition display control method wherein specifically may further comprise the steps:
A): the DVI interface module inserts outer video signal, and is input to the screenshotss module;
B): the screenshotss module intercepts this vision signal according to the HDTV resolution standard of 1280 x 720, and the vision signal after will intercepting sends the data recombination module to;
C): the data recombination module is carried out data recombination with this vision signal, and the back signal input table tennis storage control module of will recombinating;
D): the table tennis storage control module is carried out the buffer-stored processing to the video data after recombinating, and makes this video data export to the data allocations module continuously with the HDTV frame frequency of 60Hz;
E): the data allocations module is adjusted the output order of video data, and video data is exported to LED dot matrix screen.
Wherein also comprise: the DVI interface module is input to the Clock management module with the clock signal in the outer video signal, the Clock management module is according to this clock signal, produce and screenshotss module, data recombination module, table tennis storage control module and the corresponding clock signal of data allocations module, and control timing.
Wherein also comprise after the step e: the clock that the display control signal generation module produces according to the Clock management module produces the LED dot matrix screen control signal that matches with the video data sequential, and this control signal is input in the LED dot matrix screen.
Wherein step C further comprises: at first the data recombination module will be upset from the vision signal of screenshotss module, and go here and there and change by shift memory; To pass through the colour bits selector through string and data converted then, and carry out by the gray scale classification, and be stored in the memory respectively.
After the common video signal intercepts according to the standard of the HDTV resolution of 1280 x 720 through the screenshotss modules among the present invention, carry out recombination classes by the data recombination module according to video level again, so that gray scale scanning control; Exporting the frequency frame continuously by the table tennis memory module then is the HDTV Frame of 60Hz, and final output is satisfied video data signal, clock signal and the control signal of HDTV standard to LED dot matrix screen.Adopt the LED dot matrix screen of apparatus and method of the present invention, its display effect is better than conventional display unit, and brightness wants high.
Description of drawings:
Fig. 1 is a structured flowchart of the present invention.
Fig. 2 is the work schematic diagram of DVI interface module among the present invention.
Fig. 3 is the work schematic diagram of screenshotss module of the present invention.
Fig. 4 is the work schematic diagram of data recombination module of the present invention.
Fig. 5 is the rattle work schematic diagram of storage control module of the present invention.
Fig. 6 is the work schematic diagram of data allocations module of the present invention.
Fig. 7 is the work schematic diagram of large scale display control signal generating module of the present invention.
Fig. 8 is the inventive method schematic flow sheet.
Embodiment:
Below in conjunction with the drawings and specific embodiments the present invention is done and to describe in further detail.
See also shown in Figure 1, the present invention relates to a kind of digital high clear display control device, wherein DVI interface module, screenshotss module, data recombination module, table tennis storage control module, data allocations module, display control signal generation module and Clock management module are integrated among a slice FPGA, wherein the DVI interface module is connected with external video source, is used for incoming video signal; The screenshotss module is connected with the DVI interface module, by this screenshotss module the HDTV resolution standard of the video data in the incoming video signal according to 1280 x 720 is intercepted; The data recombination module links to each other with the screenshotss module, will carry out recombination classes according to gray scale from the video data of screenshotss module; The table tennis storage control module links to each other with the data recombination module, and the video data behind the recombination classes is carried out buffer-stored, and while output video data; The data allocations module is connected with the table tennis storage control module, is used to adjust the output order from table tennis storage control module video data, and with this video data input LED dot matrix screen.
Wherein the Clock management module is connected with DVI interface module, screenshotss module, data recombination module, table tennis storage control module and data allocations module respectively, wherein clock control module receives DVI output clock, clock carries out frequency translation through phase-locked loop, clock frd is read in generation, and string change over clock fpts, shift clock fsft, scan clock fscn, latch clock flth, these clock signals are corresponding with screenshotss module, data recombination module, table tennis storage control module and data allocations module, and finally are input to LED dot matrix screen.
As shown in Figure 2, Fig. 2 is the work schematic diagram of DVI interface module among the present invention.Wherein extraneous vision signal forms input code flow by the input of signal access interface layer, comprise 30 video data in this input code flow, and signals such as data enable (DE), pixel data, control clock and clock, this input ni signal bit stream sends to the TMDS receiver by DVI cable data channel after handling through the TMDS transmitter, after handling through the TMDS receiver again the form with input code flow output to the signal output interface layer, finally output to the screenshotss module.
As shown in Figure 3, the screenshotss module includes linage-counter, column counter, row register and column register, and the effect of screenshotss module is with DVI interface output video data, mates with LED dot matrix resolution.Adopt the row, column statistical method, row, field sync signal are added up, a clock signal (CLK) rising edge column counter saltus step each once.Output valve that column counter produces and the set point in the column register are made comparisons, and stop to receive this data line when equal; Linage-counter counting DE rising edge, the capable number of statistics valid data.The output valve that linage-counter produces is made comparisons with the set point in the row register, stops to receive data when equal.
As shown in Figure 4, video data is handled back input data recombination module through the screenshotss module intercepts, data recombination be divided into string and change, latch, three links of data selection.Exported by receiver module by 30 pixel datas that R, G, three colors of B are formed, serial shift enters 30 10 bit shift register respectively, goes here and there and changes, and string also forms 30 10 Bit datas in the conversion back, is latched by clock and enters 30 10 latchs.By the colour bits selector, numerical value divides 10 gatings to enter 10 data segments in the memory by the gray scale weights in 30 latchs, selects each one 10 Bit data in R, G, three colors of B at every turn.In the memory of such 30 bit wides, each section stores the same weights data of pixel.Each bit wide stores R, G, the B color data of 10 pixels.The data recombination module is classified pixel data by the gray scale weights, and has deposited in respectively in 10 sections of memory.
As shown in Figure 5, video data has carried out sending to the table tennis storage control module after the classification according to the gray scale weights through the data recombination module, and the table tennis storage control module comprises that module, write address generation module, bidirectional bus control module take place to read the address.Clock CLK_RD is adopted in read operation, and write operation adopts clock CLK_WR.Rising edge counting with FLAG produces table tennis state exchange signal SWITCH, N_EN_WR_A output low level when SWITCH is high level, N_EN_RD_B exports high level, the A memory is write in execution, read the B storage operation, N_EN_WR_B output high level when SWTICH is low level, N_EN_RD_A output low level, A is read in execution, writes B.ADD_A, ADD_B are respectively the address output end of A, B memory.DQ_A, DQ_B are the BDB Bi-directional Data Bus that connects A, B memory.
As shown in Figure 6, the data allocations module for by the data latching array and and go here and there conversion array and form, wherein the data latching array is made up of 90 10 latchs altogether, and goes here and there conversion array and be made of one of every district correspondence 90 parallel-to-serial converters.Each parallel-to-serial converter is made up of three 10 bit shift register, is responsible for the also string conversion of R, G, three kinds of color data of B respectively, and RGB_S_OUTPUT is three, links to each other with R, G, the B data input pin of LED dot matrix screen.
In addition the display control signal generation module as shown in Figure 7, the display control signal generation module is made up of latch, counter, comparator, rest-set flip-flop.Counter carry end links to each other with trigger R end, and comparator output terminal links to each other with the S end, and latch can be put number by control end, and EN is the turnable pulse width signal output part.Comparator is output as 1 when input equates, be output as 0 when unequal.
More than be the explanation that digital high clear display control device provided by the invention is carried out, digital high-definition of the present invention shown that the method for control describes below in conjunction with Fig. 8.
As shown in Figure 8, the present invention also provides a kind of digital high clear display control device method, and its concrete steps are as follows:
Steps A: the DVI interface module inserts outer video signal, and is input to the screenshotss module;
Wherein also specifically include in the steps A:
Steps A 1: vision signal input signal input interface layer, and produce input code flow;
Wherein said input code flow includes data enable (DE), HE and VS3 position control signal.
Steps A 2: input code flow sends the TMDS receiver to by the DVI cable after handling through the TMDS transmitter;
Steps A 3:TMDS receiver restores the input code flow signal, and flows to the signal output interface layer with output code flow;
Steps A 4: the signal output interface layer outputs to the screenshotss module with vision signal.
Step B: the screenshotss module intercepts this vision signal according to the HDTV resolution standard of 1280 x 720, and the vision signal after will intercepting sends the data recombination module to;
Step B specifically includes:
Step B1: the screenshotss module is carried out signal statistics to the vision signal of input by the row, column statistical method, and when every rising edge clock signal, then the column counter saltus step once and produces an output valve;
Step B2: the output valve of column counter generation and the set point in the column register are compared, when the two numerical value equates, then stop to receive this data line;
Step B3: the linage-counter enumeration data enables rising edge, then adds up the capable number of valid data, and compare the output valve of linage-counter generation and the set point in the row register this moment, if equate, then stops to receive data;
Step B4: the screenshotss module intercepts this vision signal according to the HDTV resolution standard of 1280 x 720, and the vision signal after will intercepting sends the data recombination module to.
Step C: the data recombination module is carried out data recombination with this vision signal, and the back signal input table tennis storage control module of will recombinating;
Wherein step C includes:
Step C1: the data recombination module will be upset from the video data of screenshotss module, and be exported by receiver module by 30 pixel datas that R, G, three colors of B are formed;
Step C2: described pixel data serial shift respectively enters 30 10 bit shift register, goes here and there and changes;
Step C3: above-mentioned pixel data also forms 30 10 Bit datas in the conversion back through string, and is latched by clock and to enter 30 10 latchs;
Step C4: by color is selector, the numerical value in 30 latchs according to the gray scale weights respectively 10 gatings enter 10 data segments in the memory;
Wherein select each one 10 Bit data in R, G, three colors of B, in the memory of such 30 bit wides, each section stores the same weights data of pixel at every turn.Each bit wide stores R, G, the B color data of 10 pixels.
Step C5: the data recombination module is classified pixel data by the gray scale weights, and has deposited in respectively in 10 sections of memory, and every section identical weights bit number of storage, and the processed video data distributing of will classifying then is to the table tennis storage control module.
Step D: the table tennis storage control module is carried out the buffer-stored processing to the video data after recombinating, and makes this video data export to the data allocations module continuously with the HDTV frame frequency of 60Hz;
The storage control module of wherein rattling comprises that module, write address generation module, bidirectional bus control module take place to read the address.
Wherein step D specifically comprises:
Step D1: the table tennis storage control module reads clock signal by reading address generation module;
Step D2: the table tennis storage control module writes clock signal by write address generation module;
Step D3: the table tennis storage control module produces table tennis state exchange signal SWITCH by the rising edge counting of FLAG, when SWITCH is high level, and the N_EN_WR_A output low level, N_EN_RD_B exports high level, carries out and writes the A memory, reads the B storage operation; And when SWTICH was low level, N_EN_WR_B exported high level, and the N_EN_RD_A output low level is carried out and read A, writes B.
Wherein ADD_A, ADD_B are respectively the address output end of A, B memory.DQ_A, DQ_B are the BDB Bi-directional Data Bus that connects A, B memory.
Step e: the data allocations module is adjusted the output order of video data, and video data is exported to LED dot matrix screen.
Wherein the data allocations module is by the data latching array with and go here and there conversion array and form.When vision signal through table tennis storage control module buffer-stored, enter the data allocations module after, carry out R, G, three kinds of color data of B by the data latching array and the string conversion, the video data signal that final output and LED dot matrix screen are complementary.
More than a kind of digital high clear display control device provided by the present invention and method are described in detail, used specific case herein principle of the present invention and execution mode are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (10)
1, a kind of digital high clear display control device is characterized in that including:
One DVI interface module is connected with external video source, is used for incoming video signal;
One screenshotss module is connected with the DVI interface module, by this screenshotss module the HDTV resolution standard of the video data in the incoming video signal according to 1280 x 720 is intercepted;
One data recombination module links to each other with the screenshotss module, will carry out recombination classes according to gray scale from the video data of screenshotss module;
One table tennis storage control module links to each other with the data recombination module, and the video data behind the recombination classes is carried out buffer-stored, and while output video data.
One data allocations module is connected with the table tennis storage control module, is used to adjust from the output order of table tennis storage control module video data and the data partition structure of coupling LED dot matrix screen, and with this video data input LED dot matrix screen.
2, digital high clear display control device according to claim 1, it is characterized in that also including a clock administration module, this Clock management module is connected with DVI interface module, screenshotss module, data recombination module, table tennis storage control module and data allocations module, it is by receiving the clock signal from the DVI interface module, produce and screenshotss module, data recombination module, table tennis storage control module and the corresponding clock signal of data allocations module, and control timing.
3, digital high clear display control device according to claim 2, it is characterized in that also including a display control signal generation module that is connected with the Clock management module, the clock that it produces according to the Clock management module produces the LED dot matrix screen control signal that matches with the video data sequential.
4, digital high clear display control device according to claim 1 is characterized in that also being connected with on the described table tennis storage control module two memories, realizes the continuity of data buffering and transfer of data by this memory.
5, digital high clear display control device according to claim 1 is characterized in that: described screenshotss module comprises linage-counter, column counter, row register and column register.
6, digital high clear display control device according to claim 1 is characterized in that: described data allocations module comprises the data latching array and and goes here and there conversion array.
7, a kind of digital high-definition display control method is characterized in that specifically comprising step:
A): the DVI interface module inserts outer video signal, and is input to the screenshotss module;
B): the screenshotss module intercepts this vision signal according to the HDTV resolution standard of 1280 x 720, and the vision signal after will intercepting sends the data recombination module to;
C): the data recombination module is carried out data recombination with this vision signal, and the back signal input table tennis storage control module of will recombinating;
D): the table tennis storage control module is carried out the buffer-stored processing to the video data after recombinating, and makes this video data export to the data allocations module continuously with the HDTV frame frequency of 60Hz;
E): the data allocations module is adjusted the output order of video data, and video data is exported to LED dot matrix screen.
8, want 7 described digital high-definition display control methods according to right, it is characterized in that also comprising: the DVI interface module is input to the Clock management module with the clock signal in the outer video signal, the Clock management module is according to this clock signal, produce and screenshotss module, data recombination module, table tennis storage control module and the corresponding clock signal of data allocations module, and control timing.
9, want 7 described digital high-definition display control methods according to right, it is characterized in that also comprising after the step e: the clock that the display control signal generation module produces according to the Clock management module, produce the LED dot matrix screen control signal that matches with the video data sequential, and this control signal is input in the LED dot matrix screen.
10, want 7 described digital high-definition display control methods according to right, it is characterized in that step C further comprises: at first the data recombination module will be upset from the vision signal of screenshotss module, and go here and there and change by shift memory; To pass through the colour bits selector through string and data converted then, and carry out by the gray scale classification, and be stored in the memory respectively.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101582238B (en) * | 2009-06-10 | 2010-12-29 | 大连海事大学 | Method for reconstructing parallel data in LED display control system |
| CN101729919B (en) * | 2009-10-30 | 2011-09-07 | 无锡景象数字技术有限公司 | System for full-automatically converting planar video into stereoscopic video based on FPGA |
| CN102905056A (en) * | 2012-10-18 | 2013-01-30 | 利亚德光电股份有限公司 | Method and device for processing video image |
| CN103338405A (en) * | 2013-06-03 | 2013-10-02 | 四川长虹电器股份有限公司 | Screen capture application method, equipment and system |
| CN103929610A (en) * | 2014-04-23 | 2014-07-16 | 利亚德光电股份有限公司 | Data processing method and device applied to LED television and LED television |
| CN105451082A (en) * | 2014-08-27 | 2016-03-30 | 乐视致新电子科技（天津）有限公司 | Intelligent television screen capture method and intelligent television screen capture device based on external signal source |
| CN108597461A (en) * | 2017-12-26 | 2018-09-28 | 中航华东光电有限公司 | The method for realizing electrical picture signal control on liquid crystal display based on FPGA |
| CN109102770A (en) * | 2018-08-23 | 2018-12-28 | 上海深实微系统科技有限公司 | A kind of low-power consumption low bandwidth display panel driving chip towards high-performance calculation |
| CN114822385A (en) * | 2022-05-27 | 2022-07-29 | 中科芯集成电路有限公司 | Write protection circuit of LED display driving chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101582238B (en) * | 2009-06-10 | 2010-12-29 | 大连海事大学 | Method for reconstructing parallel data in LED display control system |
| CN101729919B (en) * | 2009-10-30 | 2011-09-07 | 无锡景象数字技术有限公司 | System for full-automatically converting planar video into stereoscopic video based on FPGA |
| CN102905056A (en) * | 2012-10-18 | 2013-01-30 | 利亚德光电股份有限公司 | Method and device for processing video image |
| EP2911381A4 (en) * | 2012-10-18 | 2016-01-13 | Leyard Optoelectronic Co Ltd | Method and device for processing video image |
| CN103338405A (en) * | 2013-06-03 | 2013-10-02 | 四川长虹电器股份有限公司 | Screen capture application method, equipment and system |
| CN103929610A (en) * | 2014-04-23 | 2014-07-16 | 利亚德光电股份有限公司 | Data processing method and device applied to LED television and LED television |
| CN103929610B (en) * | 2014-04-23 | 2017-08-08 | 利亚德光电股份有限公司 | For the data processing method of LED television, device and LED television |
| CN105451082A (en) * | 2014-08-27 | 2016-03-30 | 乐视致新电子科技（天津）有限公司 | Intelligent television screen capture method and intelligent television screen capture device based on external signal source |
| CN108597461A (en) * | 2017-12-26 | 2018-09-28 | 中航华东光电有限公司 | The method for realizing electrical picture signal control on liquid crystal display based on FPGA |
| CN108597461B (en) * | 2017-12-26 | 2020-10-02 | 中航华东光电有限公司 | Method for realizing power-on image signal control of liquid crystal display based on FPGA |
| CN109102770A (en) * | 2018-08-23 | 2018-12-28 | 上海深实微系统科技有限公司 | A kind of low-power consumption low bandwidth display panel driving chip towards high-performance calculation |
| CN114822385A (en) * | 2022-05-27 | 2022-07-29 | 中科芯集成电路有限公司 | Write protection circuit of LED display driving chip |
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