CN108597461A - The method for realizing electrical picture signal control on liquid crystal display based on FPGA - Google Patents
The method for realizing electrical picture signal control on liquid crystal display based on FPGA Download PDFInfo
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- CN108597461A CN108597461A CN201711428386.6A CN201711428386A CN108597461A CN 108597461 A CN108597461 A CN 108597461A CN 201711428386 A CN201711428386 A CN 201711428386A CN 108597461 A CN108597461 A CN 108597461A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The present invention relates to field of liquid crystal display, the open method that electrical picture signal control on liquid crystal display is realized based on FPGA, including：1, figure card control signal is generated into flag bit flag signals after signal detection module；2, flag bit flag signals are subjected to flag bit detection module processing, output identification position flag_gen signals；3, the level state of flag bit flag signals and flag bit flag_gen signals is judged, is low level, output pattern card control signal in flag bit flag signals；In the case where flag bit flag signals are high level, the control signal of output timing generation module generation；It is low level, output pattern card data-signal in flag bit flag_gen signals；In the case where flag_gen is high level, export as black data signal.The present invention realizes the beauty for powering on display and the protection of night display screen.
Description
Technical field
The present invention relates to field of liquid crystal display, and in particular, to realizes electrical picture signal control on liquid crystal display based on FPGA
Method.
Background technology
It is increasingly mature with LCD technology, the use of liquid crystal display increasingly extensively, medical treatment, machinery, military project and vapour
All by liquid crystal technology instead of original CRT technologies, liquid crystal display has lightening, low-power consumption for the display terminal of the industries such as vehicle
Deng prominent advantage, the bottleneck of original weight and volume is breached, therefore, the display quality and effect of liquid crystal display have become
Consumer's focus of attention.
Processor in graphics card needs initialization operation when powering on, 2-3 seconds general, is exported in power up initialization process
Data it is unstable, liquid crystal display influences display effect it is possible that Huaping phenomenon, long after processor work is abnormal
Time showing flower screen is likely to phenomena such as picture ghost occur.
Invention content
The object of the present invention is to provide a kind of methods for realizing electrical picture signal control on liquid crystal display based on FPGA, this is based on
The method that FPGA realizes electrical picture signal control on liquid crystal display, which overcomes, to be exported in power up initialization process in the prior art
Data are unstable, and liquid crystal display realizes the beauty and night display screen for powering on display it is possible that the problem of flower shields
Protection.
To achieve the goals above, the present invention provides a kind of side realizing electrical picture signal control on liquid crystal display based on FPGA
Method, the method that electrical picture signal control on liquid crystal display should be realized based on FPGA include：
Step 1, figure card control signal is generated into flag bit flag signals after signal detection module；
Step 2, flag bit flag signals are subjected to flag bit detection module processing, output identification position flag_gen signals；
Step 3, the level state of flag bit flag signals and flag bit flag_gen signals is judged, in flag bit
In the case of flag signals are low level, output pattern card control signal；In the case where flag bit flag signals are high level,
The control signal that output timing generation module generates；It is low level, output pattern in flag bit flag_gen signals
Card data-signal；In the case where flag_gen is high level, export as black data signal.
Preferably, in step 2, include by the method that flag bit flag signals carry out flag bit detection module processing：
Set the sequential of flag bit flag signals and flag bit flag_gen signals to difference 100ms.
Preferably, in step 2, state switching is realized by the rising edge and failing edge of judgement symbol position flag signals,
If the failing edge of judgement symbol position flag signals, is delayed after 100ms, low level signal is exported, if determining flag bit
The rising edge of flag signals, then export initial signal.
Preferably, the flag bit flag signals and flag bit flag_gen signals all make synchronised clock by the clk of FPGA
Source.
Through the above technical solutions, the transmission of signal can be controlled effectively, the switching of image flicker free may be implemented, in addition
It can ensure image displaying quality, it is of the invention to realize that liquid crystal display powers on the method without flower screen based on FPGA, it can make to power on aobvious
Show more attractive, and liquid crystal display can be protected.
Other features and advantages of the present invention will be described in detail in subsequent specific embodiment part.
Description of the drawings
Attached drawing is to be used to provide further understanding of the present invention, an and part for constitution instruction, with following tool
Body embodiment is used to explain the present invention together, but is not construed as limiting the invention.In the accompanying drawings：
Fig. 1 is a kind of structural frames that realizing the system of electrical picture signal control on liquid crystal display based on FPGA for illustrating the present invention
Figure；
Fig. 2 is a kind of effect that realizing the system of electrical picture signal control on liquid crystal display based on FPGA for illustrating the present invention
Figure.
Specific implementation mode
The specific implementation mode of the present invention is described in detail below in conjunction with attached drawing.It should be understood that this place is retouched
The specific implementation mode stated is merely to illustrate and explain the present invention, and is not intended to restrict the invention.
The present invention provides a kind of method for realizing electrical picture signal control on liquid crystal display based on FPGA, should be realized based on FPGA
The method of electrical picture signal control includes on liquid crystal display：
Step 1, figure card control signal is generated into flag bit flag signals after signal detection module；
Step 2, flag bit flag signals are subjected to flag bit detection module processing, output identification position flag_gen signals；
Step 3, the level state of flag bit flag signals and flag bit flag_gen signals is judged, in flag bit
In the case of flag signals are low level, output pattern card control signal；In the case where flag bit flag signals are high level,
The control signal that output timing generation module generates；It is low level, output pattern in flag bit flag_gen signals
Card data-signal；In the case where flag_gen is high level, export as black data signal.
Through the above technical solutions, the transmission of signal can be controlled effectively, the switching of image flicker free may be implemented, in addition
It can ensure image displaying quality, it is of the invention to realize that liquid crystal display powers on the method without flower screen based on FPGA, it can make to power on aobvious
Show more attractive, and liquid crystal display can be protected.
In a kind of specific implementation mode of the present invention, in step 2, flag bit flag signals are subjected to flag bit detection
The method of resume module may include：
Set the sequential of flag bit flag signals and flag bit flag_gen signals to difference 100ms.
In a kind of specific implementation mode of the present invention, in step 2, pass through the rising edge of judgement symbol position flag signals
State switching is realized with failing edge, if the failing edge of judgement symbol position flag signals, is delayed after 100ms, exports low level
Signal exports initial signal if determining the rising edge of flag bit flag signals.
In a kind of specific implementation mode of the present invention, the flag bit flag signals and flag bit flag_gen signals are all
Synchronous clock source is made by the clk of FPGA.
As shown in Figure 1, the sequence generation module is used to generate the control signal of liquid crystal display needs.The letter
Number detection module is used to acquire the control signal of graphics card generation.The flag bit detection module is produced for signal detection module
Raw flag bit.The signal switching module for realizing two kinds of signal sequence signals switching.
Figure card control signal has flag bit flag, the flag signal of no signal by mark by signal detection module
After the detection module processing of will position, output identification position flag_gen signals.Signal switching module judgement symbol position flag and flag_
Gen, if flag is low level, output pattern card control signal；If flag is high level, what output timing generation module generated
Control signal；If flag_gen is low level, output pattern card data-signal；If flag_gen is high level, output data
For black data, wherein flag_gen signals become the key of graphics control signals.If the signal switching module only passes through
Judge flag signals next switch-over control signal and data-signal simultaneously, then appearance flickers during switching, flower shields or other
Unfixed picture phenomenon, therefore flag signals are generated into flag_gen signals, flag_ by flag signal detection module
Gen and flag signals are homologous clocks, make synchronous clock source, the sequential difference of flag_gen and flag by the clk of FPGA
The time of 100ms, 100ms are equivalent to the normal picture of 6 frames.The flag bit detection module, by judging flag signals
Rising edge and failing edge realize state switching, if determining the failing edge of flag signals, are delayed after 100ms, export low electricity
Ordinary mail number exports initial signal if determining the rising edge of flag signals.
The preferred embodiment of the present invention is described in detail above in association with attached drawing, still, the present invention is not limited to above-mentioned realities
The detail in mode is applied, within the scope of the technical concept of the present invention, a variety of letters can be carried out to technical scheme of the present invention
Monotropic type, these simple variants all belong to the scope of protection of the present invention.
It is further to note that specific technical features described in the above specific embodiments, in not lance
In the case of shield, can be combined by any suitable means, in order to avoid unnecessary repetition, the present invention to it is various can
The combination of energy no longer separately illustrates.
In addition, various embodiments of the present invention can be combined randomly, as long as it is without prejudice to originally
The thought of invention, it should also be regarded as the disclosure of the present invention.
Claims (4)
1. a kind of method for realizing electrical picture signal control on liquid crystal display based on FPGA, which is characterized in that should be realized based on FPGA
The method of electrical picture signal control includes on liquid crystal display：
Step 1, figure card control signal is generated into flag bit flag signals after signal detection module；
Step 2, flag bit flag signals are subjected to flag bit detection module processing, output identification position flag_gen signals；
Step 3, the level state of flag bit flag signals and flag bit flag_gen signals is judged, in flag bit flag
In the case of signal is low level, output pattern card control signal；In the case where flag bit flag signals are high level, output
The control signal that sequence generation module generates；It is low level, output pattern card number in flag bit flag_gen signals
It is believed that number；In the case where flag_gen is high level, export as black data signal.
2. the method according to claim 1 for realizing electrical picture signal control on liquid crystal display based on FPGA, which is characterized in that
In step 2, include by the method that flag bit flag signals carry out flag bit detection module processing：
Set the sequential of flag bit flag signals and flag bit flag_gen signals to difference 100ms.
3. the method according to claim 1 for realizing electrical picture signal control on liquid crystal display based on FPGA, which is characterized in that
In step 2, state switching is realized by the rising edge and failing edge of judgement symbol position flag signals, if judgement symbol position flag
The failing edge of signal, then be delayed after 100ms, exports low level signal, if determining the rising edge of flag bit flag signals,
Export initial signal.
4. the method according to claim 1 for realizing electrical picture signal control on liquid crystal display based on FPGA, which is characterized in that
The flag bit flag signals and flag bit flag_gen signals all make synchronous clock source by the clk of FPGA.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711428386.6A CN108597461B (en) | 2017-12-26 | 2017-12-26 | Method for realizing power-on image signal control of liquid crystal display based on FPGA |
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| CN201711428386.6A CN108597461B (en) | 2017-12-26 | 2017-12-26 | Method for realizing power-on image signal control of liquid crystal display based on FPGA |
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| CN108597461A true CN108597461A (en) | 2018-09-28 |
| CN108597461B CN108597461B (en) | 2020-10-02 |
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| CN104409059A (en) * | 2014-11-21 | 2015-03-11 | 中航华东光电有限公司 | Driving circuit, display and driving method thereof |
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- 2017-12-26 CN CN201711428386.6A patent/CN108597461B/en active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1588529A (en) * | 2004-08-09 | 2005-03-02 | 友达光电股份有限公司 | Liquid crystal display and method for improving picture flash in turn-on process |
| CN1763822A (en) * | 2005-10-10 | 2006-04-26 | 深圳创维－Rgb电子有限公司 | TV set LCD time sequence controlling method during open |
| CN101378483A (en) * | 2007-08-30 | 2009-03-04 | 深圳市九洲光电子有限公司 | Digital high clear display control device and method |
| CN101646029A (en) * | 2009-06-30 | 2010-02-10 | 青岛海信电器股份有限公司 | Method for setting startup LOGO and TV set |
| CN101866637A (en) * | 2010-06-13 | 2010-10-20 | 青岛海信电器股份有限公司 | Power-on time sequence control method for liquid crystal display equipment and television |
| CN102339592A (en) * | 2011-09-29 | 2012-02-01 | 中山大学 | Video memory compression method based on LCD (liquid crystal display) controller |
| US20140125684A1 (en) * | 2012-11-07 | 2014-05-08 | Hon Hai Precision Industry Co., Ltd. | Video card and computer |
| CN203444188U (en) * | 2013-04-28 | 2014-02-19 | 睿芯信息科技（上海）有限公司 | Debugging system for liquid crystal screen |
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| CN108597461B (en) | 2020-10-02 |
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