JPH0744670B2 - Liquid crystal display - Google Patents

Description

TECHNICAL FIELD The present invention relates to a display device of a television receiver, and in particular,
The present invention relates to a liquid crystal display device using a liquid crystal panel.

[Prior Art] Conventionally, a CRT (cat
Hode-ray tube) displays have been widely used.
However, due to its structure, the CRT display cannot be reduced in depth, and the larger the screen diameter,
There is a problem that the weight is dramatically increased due to explosion-proof measures. Therefore, recently, liquid crystal display devices with various possibilities have been developed as display devices to replace CRT displays. The liquid crystal display device uses a liquid crystal panel for its image display unit.

The liquid crystal has a property that the light transmittance changes depending on the magnitude of the applied voltage. Therefore, a light source is arranged on one side of the liquid crystal panel, and a large number of transparent electrodes with a small area are arranged on the liquid crystal panel in which the liquid crystal is sandwiched by glass plates etc., and various voltages are applied to it. Depending on the magnitude of the applied voltage, an arbitrary image with light and dark is created on the panel.
Therefore, depending on the brightness of each part of the image to be reproduced, a desired image can be reproduced by applying a voltage to the electrode at the position on the panel corresponding to the brightness. The liquid crystal display device utilizes such a principle.

FIG. 6 (a) is a schematic block diagram showing an example of the configuration of a conventional liquid crystal display device in a television receiver. Referring to the figure, this liquid crystal display device has a liquid crystal panel 61 for displaying a received image, a segment driver 62 and a scan driver 63 for applying a signal voltage to the liquid crystal panel 61 to drive it, and a received video signal. A polarity reversing circuit 68 for reversing the polarity, a segment driver 62, a scan driver 63, and a timing control circuit 69 for controlling the operation timing of the polarity reversing circuit 68.

The liquid crystal panel 61 is formed by sandwiching liquid crystal with a glass plate or the like, and is divided into pixels by arranging electrodes having a minute area in a matrix in the horizontal and vertical directions on the panel. FIG. 6B is a partial schematic view showing the configuration on the liquid crystal panel 61. Referring to the figure, liquid crystal panel 61 has M data signal lines 64 arranged in parallel in the vertical direction and N scanning signal lines 65 arranged in parallel in the horizontal direction. In the figure, each M × N portion on the panel surrounded by the data signal line 64 and the scanning signal line 65 is a pixel. Each pixel is provided with a pair of pixel electrodes 67 (the illustration of the back surface of the liquid crystal panel 61 is omitted) provided across the panel. A transparent electrode is used for the pixel electrode 67. Further, a switching element 66 provided for each pixel is provided on the liquid crystal panel 61, and the liquid crystal panel 61 is a so-called active matrix LCD (liquid crystal display). The switching element 66 is provided between the corresponding pixel electrode 67 and the data signal line 64, and its ON / OFF is controlled by a signal given to the corresponding scanning signal line 65. That is, the voltage of the corresponding data signal line 64 is applied to each pixel electrode 67 when the corresponding switching element 66 is in the ON state. As a result, a voltage is applied to the liquid crystal sandwiched between the pixel electrodes, and the amount of transmitted light of the liquid crystal in that portion changes according to the applied voltage.

N scan signal lines 65 from the liquid crystal panel 61 are connected to the scan driver 63. The scan driver 63 responds to the driver control signal from the timing control circuit 69 and drives it in the same cycle as the horizontal scanning cycle of the received video signal. Specifically, in the above cycle, N scanning signal lines are provided.
A signal for turning on the corresponding switching means 66 is sequentially applied to each of the 65 (hereinafter, the scanning signal line to which such a voltage is applied is referred to as a selected scanning signal line).

To the segment driver 62, M data signal lines 64 from the liquid crystal panel 61 are connected. The segment driver 60 responds to the driver control signal from the timing control circuit 69 and drives it in the same cycle as the horizontal scanning cycle of the received video signal. Specifically, the polarity inversion circuit in the above cycle
A video signal input via 68 is sampled, sequentially transferred internally for output to the corresponding data signal line 64, and output.

The timing control circuit 69 receives the sync signal separated from the received video signal, and applies a driver control signal and a polarity reversal timing control signal corresponding thereto to the segment driver 62, the scan driver 63, and the polarity reversal circuit 68, respectively. .

The polarity inversion circuit 68 inverts the polarity of the received video signal and gives it to the segment driver 62 at a cycle according to the polarity inversion timing control signal from the timing control circuit 69. This is done for the following reasons. Generally, it is necessary to apply an AC voltage to drive the liquid crystal. Therefore, by inverting the polarity of the video signal voltage at a predetermined cycle and applying it to the liquid crystal, the polarity of the voltage applied to the liquid crystal of the same part in the liquid crystal panel is changed every time, and the voltage applied to the liquid crystal is changed to an AC voltage. To do.

The operation of this liquid crystal display device will be described below.

The received video signal is supplied to the polarity reversing circuit 68 after the sync signal contained therein is separated, and the separated sync signal is supplied to the timing control circuit 69.

The timing control circuit 69 creates a driver control signal and a polarity reversal timing control signal from the input synchronization signal and outputs the driver control signal and the polarity reversal timing control signal to the predetermined functional unit described above.

In the polarity reversing circuit 68, the polarity reversal process for the input video signal is performed at a constant cycle in synchronization with the polarity reversal timing control signal. Therefore, the polarity inversion process and the non-polarity inversion process (the inversion process is not performed) are alternately performed on the input video signal in accordance with the polarity inversion timing control signal, and the inversion process or the non-polarity inversion process is performed. The applied video signal is given to the segment driver 62.

Both the segment driver 62 and the scan driver 63 operate in synchronization with the driver control signal.

The scan driver 63 operates in synchronization with the driver control signal. Therefore, the scan driver 63 repeats the operation of sequentially selecting the N scanning signal lines one by one from the top in each horizontal scanning period of the received video signal.

On the other hand, the segment driver 62 performs the following operation in synchronization with the driver control signal. That is, for each horizontal scanning period of the received video signal, M signal voltages corresponding to each pixel of the M pixel group of one column in the liquid crystal panel 61 are input from the input video signal for one horizontal scanning period. It samples and transfers and outputs to the corresponding data signal line. of course,
In order to apply these M signal voltages to the liquid crystal of each pixel of the liquid crystal panel 61 by the corresponding data signal lines,
The switching means of each corresponding pixel must be in the ON state. Therefore, each of the M signal voltages is applied to each pixel electrode in one column provided corresponding to the scan signal line selected by the scan driver 63 at that time. As a result, the video signal for one horizontal scanning period of the received video signal is reproduced in the pixel group of one column. On the other hand, the selected scan signal line is the scan driver 63.
By the horizontal scanning cycle. The video signal input to the segment driver 62 is a serial connection of signals obtained by sequentially scanning the screen in the horizontal direction on the transmission side. Therefore,
By repeating the operation of the segment driver 62 as described above N times, the received video signal for one field is reproduced on the liquid crystal panel 61.

[Problems to be Solved by the Invention] Generally, when transmitting a television image, interlaced scanning as shown in FIG. 7 is performed. FIG. 7 is a diagram for explaining interlaced scanning. Referring to the figure, a television screen 71 on which an image to be transmitted is displayed is scanned along a total of 2n-1 scanning lines shown by a solid line and a broken line.
In the figure, the numbers (1-2n-
1) is the scanning order of each scanning line during the actual scanning. In this way, in actual scanning, the horizontal scanning lines of the television screen 71 are not scanned one by one from the top but the first scanning is performed every other scanning from the top (solid scanning lines in the figure) and the second scanning first. The horizontal scanning lines (broken lines) between the horizontal scanning lines (solid lines) scanned in the above are sequentially scanned. That is, one frame, that is, one screen is scanned by scanning twice. as a result,
In interlaced scanning, a video signal for one field created by the first scan is serially connected to a video signal for one field created by the second scan, and then transmitted. Therefore, in order to accurately reproduce the original image from such a video signal, the image reproduction process of the receiver which receives the original image must be performed as follows. That is, a rough image composed of half the scanning lines of the receiving device is made on the display screen of the receiving side by the video signal obtained by the first scanning of the transmitting side, and then the second image of the transmitting side. An image composed of the remaining half of the scanning lines is created by the video signal obtained by the scanning of. At this time, in the second image reproduction, scanning is performed so as to sew between the scanning lines scanned in the first reproduction. That is, the video signal of one screen transmitted by the two image reproduction processes is reproduced. When the display device of the receiver uses a CRT display, this method is used according to the NTSC (national television system committe) standard, and the number of effective scanning lines appearing on the screen is 440 according to the NTSC standard. It is 480.

However, in a receiver using a current liquid crystal display device, the number of scanning lines, that is, the number of pixel rows is 220 to 240 (hereinafter,
This number is referred to as N _H ). Further, in the image reproducing process, the scanning signal lines provided corresponding to the scanning lines are sequentially selected one by one from the top and a video signal is given to the corresponding pixel column. Therefore, when a video signal of the interlace standard is received by a receiver using the current liquid crystal display device, the following problems occur.

Since the number of scanning lines of the display device on the receiving side is half the number of scanning lines on the transmitting side, the positional relationship of the received image (one frame on the transmitting side) reproduced by the second image reproduction process is
The original positional relationship as scanned by the transmitting side is different. FIG. 8 is a diagram showing an image reproducing process in a television receiver using a current liquid crystal display device.
Hereinafter, description will be given with reference to the drawings. In the following description, the scanning lines are represented by sequentially attaching serial numbers from the top of the screen.

The correspondence between the video signal obtained by scanning the odd scan line and the video signal obtained by scanning the even scan line on the transmitting side and the scanning line on the display screen on the receiving side where it is reproduced is as shown in the figure. Is. That is, each odd number Od on the sending side
The video signals obtained from the scanning lines correspond to the scanning lines 82 of the display screen 81 in order from above by the first image reproduction on the receiving side. Further, the video signal obtained from each even-numbered scanning line Ev on the transmitting side also sequentially corresponds to each scanning line 82 on the display screen 81 by the second image reproduction on the receiving side. Therefore, where the odd-numbered scanning lines Od and the even-numbered scanning lines Ev on the transmitting side should appear alternately on the image receiving device, they are superposed at the same position as shown in the figure. Therefore, the reproduced image on the receiving side is considerably inferior in vertical resolution to the image (original image) on the transmitting side. In other words, although the original image is scanned with 440 to 480 scanning lines to create a video signal that is faithful to the original image, the receiving side can scan 220 to 240 scanning lines. Since the video signal for one field of the original image is reproduced, only a rough image can be obtained. In order to solve such a problem, first, the number of scanning lines of the display screen (liquid crystal panel) of the liquid crystal display device, that is,
It is necessary to increase the number of scan signal lines to the same level as the scan lines of CRT displays. However, it is difficult to manufacture a liquid crystal display screen having such a large number of scanning signal lines by the conventional liquid crystal technology, and even if such a liquid crystal display screen is manufactured, various problems remain in driving it. It was done and was not practical. However, due to recent advances in liquid crystal technology, such liquid crystal display screens have become practically usable. However, simply increasing the number of scanning signal lines on the display screen as compared with the conventional technique leaves the following problems. If the liquid crystal display device simply performs the interlaced scanning similar to that of the CRT, the following method can be considered. That is, in the operation of the scan driver,
In the conventional liquid crystal display device, the scanning signal line is 1 from the top.
By changing the method of sequentially selecting the scanning lines one by one, every other scanning signal line is selected from the upper part in the first scanning, and in the second scanning, the scanning signal lines not selected in the first scanning are also selected from the upper part. Go. That is, the odd-numbered scan signal lines are selected in numerical order, and then the even-numbered scan signal lines are selected in numerical order. However, in this method, there is always a scanning signal line that is not selected in the course of scanning, and the video signal is not reproduced at each pixel electrode provided corresponding to that signal line. It will continue to be displayed. As a result, there arises a problem in that accurate reproduction is not performed when reproducing a moving image.

An object of the present invention is to solve the above problems and provide a liquid crystal display device capable of realizing a vertical resolution comparable to that of a display device using a CRT display in a receiver.

[Means for Solving the Problems] In order to achieve the above-mentioned object, the liquid crystal display device according to the present invention has 1
The signal of the horizontal period is time-compressed to 1/2 time to double the number of horizontal scanning lines in one field period, and between the compressed signal and the signal, it is similar to any of those signals. Alternatively, it includes means for interpolating the same signal to convert it into a pseudo video signal, and scanning signal lines of the number corresponding to the number of effective scanning lines of one frame of the television signal, and arranged in a matrix of rows and columns. A panel that includes liquid crystal pixels, a scan driver that operates at a frequency twice the horizontal scanning frequency of the original video signal to drive the scan signal line of the liquid crystal panel, and a frame that constitutes one frame of the original video signal. And a second field, the timing control means for shifting the operation timing of the scan driver by a half time period of the horizontal scanning period of the original video signal and the original video signal in response to the pseudo video signal. And a segment driver for driving the liquid crystal pixel at a frequency twice the cycle of the horizontal scanning frequency of the image signal.

[Operation] Since the liquid crystal display device according to the present invention is configured as described above, a video signal for one frame on the transmission side can be received and reproduced while maintaining the original positional relationship, and high resolution display can be realized.

[Embodiment] FIG. 1A is a schematic block diagram of a liquid crystal display device showing an embodiment of the present invention. Referring to the drawing, this liquid crystal display device includes a liquid crystal panel 1, a scan driver 3, and a segment driver 2 as in the conventional case. A timing control circuit 9 and a polarity reversing circuit 8 are provided. Note that these basic functions are the same as those in the conventional liquid crystal display device. However, the number of scanning signal lines of the liquid crystal panel 1 is different from the conventional one and is a number according to the number of effective scanning lines for one frame according to the NTSC standard (440 to 480 lines, hereinafter this number is referred to as N _F lines). FIG. 1 (b) is a partial schematic view showing the configuration of the liquid crystal panel 1. Referring to the figure, this liquid crystal panel has M data signal lines 4 arranged in parallel in the vertical direction and a number twice as large as that in the conventional case arranged in parallel in the horizontal direction, that is, N _F (N _F
2N _H ) scanning signal lines 5 are provided. Further, this liquid crystal panel is provided with a pixel electrode 7 and a switching means 6 for each pixel surrounded by the data signal line 4 and the scanning signal line 5 as in the conventional case. Further, unlike the prior art, the scan driver 3 and the segment driver 2 are driven at a half cycle of the horizontal scanning cycle of the received video signal (in the text, this is referred to as an original video signal). Further, this liquid crystal display device includes a scan conversion circuit 14, which is different from the conventional one. The timing control circuit 9 outputs a driver control signal for driving the scan driver 3 and the segment driver 2 in the above-described cycle, and also outputs a signal for controlling the operation timing of the scan conversion circuit 14.

The scan conversion circuit 14 synchronizes with the scan conversion timing signal from the timing control circuit 9 to perform 1/2 time compression on the original video signal.

The operation of this liquid crystal display device will be described below.

As in the conventional case, the original video signal is separated from the sync signal contained therein. The original video signal from which the sync signal has been removed is supplied to the polarity reversing circuit 8 via the scan exchanging circuit 14 unlike the conventional case. The synchronization signal is given to the timing control circuit 9 as in the conventional case.

In the timing control circuit 9, the scan driver 3 and the segment driver 2 are fed from the input synchronizing signal.
A scan conversion timing control signal for driving the scan conversion circuit 14 is generated and output, in addition to a driver control signal for driving the polarity conversion timing control signal for driving the polarity inversion circuit. The polarity reversal timing control signal is a clock signal having a half cycle of the horizontal scanning cycle of the original video signal, and the scan conversion timing control signal is a clock signal having the same cycle as the horizontal scanning cycle of the original video signal.

Next, the scan conversion circuit 14 operates in synchronization with the scan conversion timing control signal from the timing control circuit 9. Therefore, the input original video signal is time-compressed to 1/2 for each horizontal scanning period. 2 (a) is a waveform diagram of a video signal input to the scan conversion circuit 14, and FIG. 2 (b) is a video signal output from the scan conversion circuit 14 after scan conversion (in the text, this is simulated. It is a waveform diagram of (referred to as a video signal). In the figure, H indicates the horizontal scanning period of the original video signal. As shown in the figure, the input original video signal (second
In the figure (a)), since it is time-compressed to 1/2 for each horizontal scanning period H, AA ', B- of the original video signal (FIG. 2 (a)).
The signal waveform between B ', C-C', ... Is compressed to 1/2, and the output video signal is a-in FIG. 2 (b).
The signal waveform is between a ', b-b', c-c ', .... In addition,
In the output video signal (Fig. 2 (b)), a-
Between a ', b-b', c-c ', ..., A signal identical to or similar to any of the adjacent signals is inserted as an interpolation signal. The width of this interpolation signal is also half the horizontal scanning period H of the original video signal, that is, 1 / 2H. Note that such an interpolation signal can be created by a known technique.

Next, the video signal scan-converted by the scan conversion circuit 14 as described above, that is, the pseudo video signal is input to the polarity inversion circuit 8. The polarity inversion circuit 8 inverts the polarity of the pseudo video signal input in synchronization with the polarity inversion timing control signal from the timing control circuit. Therefore, the input pseudo video signal is
The polarity is inverted every H / 2. That is, the polarity inversion process and the non-polarity inversion process are alternately performed on the input pseudo video signal every horizontal scanning period H / 2 of the pseudo video signal. The pseudo video signal subjected to such processing in the polarity reversing circuit 8 is given to the segment driver 2.

Both the segment driver 2 and the scan driver 3 operate in synchronization with the driver control signal from the timing control circuit 9.

The scan driver 3 operates in the same manner as the conventional one in synchronization with the driver control signal. That is, the scan driver 3
Selects one scanning signal line sequentially from the N _F scanning signal lines 5 connected thereto from the top every horizontal scanning period H / 2 of the pseudo video signal.

On the other hand, the segment driver 2 operates in the same manner as the conventional one in synchronization with the driver control signal. That is, for each horizontal scanning period H / 2 of the pseudo video signal, M signal voltages are sampled from the input pseudo video signal for the H / 2 period and transferred and output to the corresponding data signal line. Of course, each of these M signal voltages is applied to each pixel electrode provided corresponding to the scan signal line selected by the scan driver 3 at that time.

Since the original video signal is obtained by interlaced scanning, the operation of the segment driver as described above
By repeating N _F times, the original video signal for one field on the transmitting side is reproduced on the liquid crystal panel 1. As a result, aa ', b- of the pseudo video signal (Fig. 2 (b))
The interpolation signal (see FIG. 2 (b)) inserted between b ', c-c', ... Is reproduced in the pixel group of either the even column or the odd column on the liquid crystal panel 1.

Next, a case will be described in which the pseudo video signal input to the segment driver 2 is for one field next to the original video signal.

At this time, the operation of the scan driver 3 is started after being shifted by the horizontal scanning period H / 2 of the pseudo video signal. as a result,
The scanning signal line located between the scanning signal lines selected when reproducing the original video signal for the preceding one field is 1
It is selected when reproducing the original video signal for the field. That is, the scanning signal line selected when the interpolation signal inserted between the original video signals for one field is reproduced,
The scanning signal line selected when the interpolation signal inserted between the original video signals for one field this time is reproduced is replaced. That is, the pixel column in which the interpolation signal is reproduced this time is different from the column in which the interpolation signal is reproduced when the original video signal for one field is reproduced. FIG. 4 is a diagram showing an image reproducing process in this embodiment. On the sending side,
The correspondence between the original video signal created by scanning the odd scan lines and the original video signal created by scanning the even scan lines and the scan lines on the display screen on the receiving side where it is reproduced is shown in the figure. As is done. (In the figure, * indicates an interpolation signal inserted between the original video signals by the scan conversion circuit 14 on the receiving side.) That is, the original video signal obtained from the scanning lines of each odd number Od on the transmitting side and the interpolation between them. The signal alternately corresponds to each scanning line 22 of the display screen 21 on the receiving side. Further, the original video signal obtained from each even-numbered scanning line Ev on the transmitting side and the interpolation signal inserted therebetween also alternately correspond to each scanning line 22 on the display screen 21 on the receiving side. However, unlike the conventional case, the scanning line on the receiving side screen corresponding to the former original image signal and the scanning line on the receiving side screen corresponding to the latter original image signal do not overlap each other. That is, 1 at the sending side
The position on the liquid crystal panel 1 where each original video signal for two fields forming a frame is reproduced matches the position when interlaced scanning is performed on the CRT display.
As described above, the reproduced image becomes similar to that obtained by the receiver using the CRT display, and the vertical resolution becomes similar.

Further, in this embodiment, the polarity reversing circuit 8 inverts the input video signal every horizontal scanning period H / 2 of the converted video signal. This is because an AC voltage is applied to the liquid crystal as in the conventional case, but it also has an effect that flicker (flicker on the screen) is not generated for the following reasons. Generally, if there is a slight difference in the absolute value of the positive and negative polarities applied to the liquid crystal, the intensity of the liquid crystal transmitted light fluctuates in a cycle of the frame frequency of 30 Hz. Therefore, if the light intensity fluctuations of all the pixels are in the same phase, the light intensity fluctuations of the respective pixels emphasize each other, so that a flicker is felt when viewing a screen composed of these pixel groups. However, in this embodiment, since the polarity of the pseudo video signal is inverted every horizontal scanning period H / 2 of the pseudo video signal, the polarities of the voltages applied to the respective pixel columns of the liquid crystal panel 1 are different between the upper and lower pixel columns. It has opposite polarity. Therefore, the temporal phase change of the voltage applied to each pixel column also becomes the opposite phase for each column. this is,
This means that the temporal variation of the liquid crystal transmitted light of each pixel row, that is, the temporal variation of the light intensity has opposite characteristics in the upper and lower pixel rows. Therefore, the fluctuations in the light intensity of each pixel column are canceled by each other, and the liquid crystal panel 1 is a group of a plurality of pixels.
When looking at the reproduced image above, almost no flicker is observed.

FIG. 5A is a schematic block diagram of a liquid crystal display device showing a specific example of this embodiment. Hereinafter, description will be given with reference to the drawings.
In this specific example, the transmitted video signal is a color television signal and includes a luminance signal indicating the luminance of the pixel and a color signal indicating the color of the pixel. Further, in the receiver, the color signal and the luminance signal are once separated, and after the necessary processing is performed, an RGB signal which is a final video signal necessary for image reproduction is produced from these. R
The GB signal is a generic term for the three signals that are the basis of color, and the series of processing for the RGB signal described below is performed on all three signals.

In this liquid crystal display device, the liquid crystal panel is composed of glass plates 31 and 32 and a liquid crystal layer (not shown) sandwiched between them. FIG. 5B is a partial plan view showing the surface structure of the glass plate 31. Referring to the figure, the glass plate 31 has a number of N _F scanning signal lines 36 arranged in parallel in the horizontal direction on the surface and in the vertical direction according to the number of effective scanning lines for one frame of a television signal. It has M data signal lines 35 arranged in parallel. A TFT (thin film transistor) 37 is used as a switching means provided for each pixel electrode 38. On the glass plate 32, a counter electrode (electrode on the back side of the paper surface) of the pixel electrode 38 provided for each pixel is provided, and a predetermined counter electrode voltage is applied to the counter electrode by a counter signal line 54. To be done.

The digital circuit 39 is a circuit for performing scan conversion and polarity inversion on the received video signal as described in the previous embodiment.

The segment driver 33 and the scan driver 34 also have the functions as described in the above embodiments.

The timing control circuit 45 controls all the operations of the above functional parts and has the following functions. To receive a composite sync signal (a signal including various sync signals of horizontal and vertical sync signals) separated from the received video signal and start a series of sampling operations in the segment driver 33 in response to the composite sync signal Sample start signal, 1
A sample clock signal for performing a single sampling operation, an output transfer signal for internally transferring and outputting the sampled signal voltage to the corresponding data signal line, and one in the scan driver 34 Scan driver clock signal for selecting the scanning signal line of
The shift register start signal for performing the operation of sequentially selecting the books one by one and the digital circuit control signal for performing the predetermined scan conversion and polarity inversion in the digital circuit 39 are produced and output. Specifically, the sample start signal, output transfer signal, and scan driver clock signal are all half the horizontal scanning cycle of the original video signal.
Is a clock signal having a period of. Further, the shifter resist start signal shows a pulse waveform which is shifted by half the horizontal scanning period of the original video signal between the two fields when reproducing two fields which form one frame on the transmitting side. .

The video amplifier 44 is for amplifying the video signal, which has been subjected to the predetermined processing by the digital circuit 39, that is, the pseudo video signal, to the predetermined level and supplying the amplified signal to the segment driver 33.

The digital circuit 39 includes an A / D converter 40 for converting the received analog video signal into a digital video signal, and a memory unit 41 for storing the video signal converted into a digital signal by the A / D converter 40. A bit inverter 42 for inverting the polarity of the digital video signal read from the memory unit 41, a D / A converter 43 for converting the input digital video signal into an analog video signal, and a switching circuit 46. Composed of and. The memory unit 41
The timing control circuit 45 reads the digital video signal from the
Controlled by a timing control signal from. Also,
When the digital video signal is read from the memory section 41, the signal for one horizontal scanning period of the original video signal is continuously read twice.

The operation of this liquid crystal display device will be described below.

The composite synchronizing signal separated from the received video signal is given to the timing control circuit 45, and the RGB signal (hereinafter, referred to as the original RGB signal in correspondence with the original video signal).
Is input to the A / D converter 40 in the digital circuit 39.

The timing control circuit 45 creates the control signal as described above according to the input composite synchronizing signal and outputs it to a predetermined functional unit.

The A / D converter 40 converts the input original RGB signal into a digital signal and supplies it to the memory unit 41 for each signal of one line. In this way, the original RGB signal digitized is written in the memory unit 41. Then, the RGB signal for one line written in the memory section 41 is transferred to the timing control circuit 4
In response to the timing control signal from 5, the data is continuously read twice at twice the speed at the time of writing. As a result, the read signal for one line is temporally compressed to 1/2, and another signal identical to the compressed signal is included in the horizontal scanning period H of the original RGB signal. (See Figure 2).
Pseudo R
I will call it GB signal. That is, in this specific example, the interpolation signal is the same as the adjacent video signal.

Next, the switching circuit 46 responds to the digital circuit control signal by 1/2 of the horizontal scanning period of the original RGB signal, that is, H / 2.
The connection is alternately switched so that the output of the bit inverter 42 or the output of the memory unit 41 is given to the D / A converter 43 in the cycle.
As a result, the polarity of the pseudo RGB signal is inverted every horizontal period H / 2 of the pseudo RGB signal. In this way, the pseudo RGB signal after the inversion processing or the non-inversion processing is converted into an analog signal by the D / A converter 43 and then input to the video amplifier 44. The video amplifier 44 amplifies the input pseudo RGB signal to a predetermined level and gives it to the segment driver 33.

On the other hand, the scan driver 34 starts the next operation in synchronization with the shift register start signal from the timing control circuit 45. That is, in synchronization with the scan driver clock signal from the timing control circuit 45,
The 2N _F scanning signal lines to be connected are sequentially selected one by one from the upper part to the lower part. Therefore from the first scanning signal line in up to N _F-th scanning signal lines, successively, a high voltage of a certain level as a selection signal, to time the application of the horizontal scanning period H / 2 of the pseudo RGB signal. This voltage is applied to each gate of M transistors provided corresponding to one row of pixel electrodes on the glass plate 31 constituting the liquid crystal panel to turn them on. However, the shift register start signal is created by scanning the even scan lines when reproducing the original RGB signal created by scanning the odd scan lines on the transmission side (hereinafter referred to as the odd field time). When the reproduced original RGB signal is reproduced (hereinafter referred to as even field time), the pseudo RGB signal is shifted by the horizontal scanning period H / 2.

FIG. 3 (a) is a diagram showing a time chart of a selection signal given to each scanning signal line in an odd field, and FIG. 3 (b) is a time chart of a selection signal given to each scanning signal line in an even field. FIG. For reference, a time chart of the horizontal sync signal of the original RGB signal is entered in the figure. Referring to the figure, all of the selection signals OG1, OG3, OG5, ..., Which are given to the odd-numbered scanning signal lines among the selection signals given to the respective scanning signal lines, are all in the horizontal scanning period H of the original RGB signal in the odd field. Of the original RGB signal is output in the latter half of the horizontal scanning period H of the original RGB signal. Similarly, all the selection signals OG2, OG4, OG6 ... That are given to the even-numbered scanning signal lines are output in the latter half of the horizontal scanning period H of the original RGB signal in the odd field, and are output in the original RGB signal in the even field. It is output in the first half of the horizontal scanning period H. Therefore, the time during which the same scanning signal line is in the selected state is different between the even field and the odd field by the period of H / 2.

On the other hand, the segment driver 33 starts the next operation in synchronization with the sample start signal from the timing control circuit 45. That is, the timing control circuit 45
In synchronism with the sample clock signal from, the M signal voltages are sampled from the input pseudo pseudo RGB signal for H / 2 minutes. Next, the timing control circuit
Sampling M in response to the output transfer signal from 45
The individual signal voltages are transferred and output to the corresponding signal lines. Therefore, at this time, the M signal voltages are applied to the pixel electrodes on the liquid crystal panel 31 provided corresponding to the scanning signal lines selected by the scan driver 34. This behavior
By repeating N _F × 2 times, that is, 2N _F times, the video signal for the odd field and the video signal for the even field on the transmitting side are reproduced at the positions where they should be reproduced on the liquid crystal panel on the receiving side.

Although the polarity of the video signal after digital conversion is inverted in this embodiment, the polarity of the video signal when it is an analog signal may be inverted. Further, as the interpolation signal in the pseudo video signal, the same one as that of the adjacent video signal is used, but the following can be performed by a known method. For example, the video signal of the previous field and the video signal of the current field are selectively taken in as interpolation signals according to the movement of the image. By doing so, the vertical resolution of the reproduced image is further improved. In particular, the effect is extremely large when the transmitted image is a still image.

In this embodiment, the series of scan conversion processes for the original video signal is performed at the RGB signal stage, but the series of scan conversion processes may be performed at the luminance signal and color difference signals stage.

EFFECTS OF THE INVENTION Since the liquid crystal display device according to the present invention is configured as described above, it is possible to provide a reproduced image having an extremely excellent vertical resolution as compared with the conventional one. In addition, CRTs can be created by devising an interpolation signal that is inserted according to the movement of the image.
It is possible to obtain a reproduced image having a higher resolution than when a display is used.

[Brief description of drawings]

FIG. 1 is a block diagram of a liquid crystal display device showing an embodiment of the present invention, FIG. 2 is a waveform diagram of an original video signal and a video signal after scan conversion, and FIG. 3 is a selection given to each scan signal line. FIG. 4 is a diagram showing a time chart of signals, FIG. 4 is a diagram showing a correspondence relationship between scanning lines on the screen of the liquid crystal display device according to the present invention and scanning lines on the screen of the transmitting side, and FIG. It is a block diagram of a liquid crystal display device for explaining one embodiment more concretely. Further, FIG. 6 is a diagram showing an example of the configuration of a conventional liquid crystal display device, FIG. 7 is a diagram for explaining interlaced scanning, and FIG. 8 is a scanning line on the screen and a transmission side of the conventional liquid crystal display device. FIG. 6 is a diagram showing a correspondence relationship with scanning lines on the screen of FIG. In the figure, 1 and 61 are liquid crystal panels, 2, 33, and 62.
Is a segment driver, 3,34, and 63 are scan drivers, 4,35, and 64 are data signal lines, 5,36, and 65 are scan signal lines, 6 and 66 are switching means, and 7,38, and 67 are Pixel electrodes, 8 and 68 are polarity inversion circuits, 9 and 69 are timing control circuits, and 14 is a scan conversion circuit. Further, 31 and 32 are glass plates, 37 is a TFT transistor, 39 is a digital circuit, 40 is an A / D converter, 41 is a memory section, 42 is a bit inverter, 43 is a D / A converter, 44
Is a video amplifier, and 46 is a switching circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A liquid crystal television display device, wherein a signal of one horizontal period is time-compressed to half the original video signal of the interlace standard, and the number of horizontal scanning lines in one field period is 2. Means for interpolating a signal similar or identical to any of the signals between the compressed and doubled signals to convert into a pseudo video signal, and the number of effective scanning lines in one frame of the television signal A panel including liquid crystal pixels arranged in a matrix of rows and columns, the liquid crystal panel operating at twice the horizontal scanning frequency of the original video signal. A scan driver for driving the scan signal line, and first and second frames that form one frame of the original video signal.
Timing control means for shifting the operation timing of the scan driver between fields by a half time period of the horizontal scanning period of the original image signal; and a horizontal direction of the original image signal in response to the pseudo image signal. A liquid crystal display device comprising: a segment driver that drives the liquid crystal pixels at a frequency cycle that is twice the scanning frequency.