JPH0916131A - Liquid crystal display device and driving method for liquid crystal display element - Google Patents

Abstract

PURPOSE: To provide a device which displays a digital color image and a television image both with high picture quality. CONSTITUTION: A shift register 9 generates and supplies signals XC1...XCn which each shift in timing by a specific time to a multiplexer 10. The multiplexer 10 generates signals XS1...XSn which are different in timing between a navigation display mode and a television display mode according to a mode switching signal and the output of the shift register 9 and supplies them to a sample-and-holding circuit 12. The sample-and-holding circuit 12 samples RGB signals in the timing based on the signals XS1...XSn and supplies them to a TFT liquid crystal panel where pixels of the respective colors are arrayed in stripes as a drain deriving signal through an output buffer 13. In television display mode, the RGB signals which are shifted in timing, color by color, are sampled and in navigation display mode, the signals of the respective colors are sampled at the same time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for driving a liquid crystal display element, which can switch between a digital image such as navigation information and a television image for display.

[0002]

2. Description of the Related Art A TFT liquid crystal display element has been attracting attention as a display device of small size, light weight, low power consumption and high image quality. TFT
When displaying a digital color image on a liquid crystal display device such as a navigation display, R (red), G (green) and B
It is desirable to arrange the pixels of each of the three primary colors of (blue) so that each of the RGB colors forms a stripe shape in accordance with the pixel structure of the color CRT.

[0003]

However, in order to display not only digital color images but also television images, the T
R, G, and B pixels of the FT liquid crystal display element are usually RG.
B are arranged in a delta array (triangular mosaic array) arranged so as to form a triangle.

Digital color images were originally created from data on vertical stripes. For this reason, when pixels of each color are arranged in a delta arrangement, or when a digital color image is displayed, for example, the contour portion of the map data is emphasized, which makes it very difficult to see. As a method for solving this problem, one in which the number of pixels in the horizontal direction is increased, the pixel array is formed in a vertical stripe pattern, and the sampling timings of the R, G, and B signals are made the same, and display driving of a digital color image is approximated. As a method, a method of showing a map or the like neatly can be considered.

However, in this case, one color is always displayed by three pixels of RGB, the apparent horizontal resolution of the television image is lowered, and the quality of the displayed image is degraded.

As described above, conventionally, it has been difficult to display both a television image and a digital color image formed for CRT on the color liquid crystal display device with high image quality.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a liquid crystal display device and a method of driving a liquid crystal display element capable of displaying both a digital color image and a television image with high image quality. To do.

[0008]

In order to achieve the above object, a liquid crystal display device according to the present invention is a liquid crystal display element in which pixels of different colors are arranged in stripes, and switching between television image display and digital image display. A signal and a color image signal of each color, when the television image is displayed, the color image signal is sampled by shifting the timing for each color, and when the digital image is displayed, the color image signal of each color is simultaneously sampled, Supply means for supplying the corresponding pixels of the liquid crystal display element.

The liquid crystal display element includes, for example, switching elements arranged in a matrix, pixel capacitances connected to the switching elements, data lines connected to the switching elements, and gate lines connected to the switching elements. And, the supply means is, for example,
Gate driver means for sequentially applying a gate pulse to the gate line, receiving the switching signal and color image signals of RGB three primary colors, and shifting the timing for each of the three primary colors at the time of displaying a television image in accordance with the switching signal. Data driver means is provided for sampling a signal and sampling the color image signal simultaneously for each of the three primary colors when the digital image is displayed and applying the sampled color image signal to the data line.

The data driver means receives, for example, a shift register to which a clock signal is supplied, the switching signal and the output of each stage of the shift register, and when the television image is displayed, the output of each stage of the shift register. And a multiplexer that outputs the output of every two stages of the shift register in common to the corresponding three stages, and sample-holds the color image signals of the three primary colors according to the output of the multiplexer. It comprises a sample and hold means and a means for applying the signal held by the sample and hold circuit to the data line.

The digital image is, for example, an image including a map and characters for navigation.

The liquid crystal display device driving method according to the present invention is a liquid crystal display device driving method in which color pixels are arranged in stripes for switching between a television image and a digital image for display. According to the display switching signal, 3 is displayed when the television image is displayed.
Color image signals for three primary colors are sampled at different timings for each primary color, and when the digital image is displayed, the color image signals are simultaneously sampled for each of the three primary colors, and the supply is supplied to the liquid crystal display element. Means and are provided.

[0013]

In the liquid crystal display device having the above-described structure, the pixels of each color are arranged in a vertical stripe pattern, and when the television image is displayed, the sampling timing of each color signal such as an RGB signal is shifted for each color to display the digital image. Sometimes
Sample each color simultaneously. Therefore, good display can be performed for both digital image display such as navigation display and normal television image display.

[0014]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 shows the structure of the active matrix liquid crystal display device according to this embodiment. As shown in the figure, the active matrix liquid crystal display device of this embodiment is
Liquid crystal display element (TFT liquid crystal display panel) 1, drain driver (data driver) 2, gate driver 3
And a video processing unit 4 and a controller unit 5.

The TFT liquid crystal display element 1 includes a TFT as a switching element, a pixel capacitance connected to the TFT,
The gate line GL connected to the gate of the TFT and the TF
A drain line (data line) DL connected to the drain of T, and a pixel of each color of RGB (in other words, RG
B color filters) are arranged in vertical stripes as shown in FIG.

The controller section 5 supplies the drain driver control signal S1 to the drain driver 2 and the gate driver control signal S2 to the gate driver 3, respectively. The drain driver control signal S1 includes a sampling clock signal CLK, a shift register start signal SRT, an output enable control signal O, as will be described later with reference to FIG.
E and mode switching signal NV / TV and the like. Also,
The gate driver control signal S2 includes a shift clock signal, a shift register start signal, and the like.

The video input signal is an RGB analog signal for navigation display or an RGB analog signal obtained from an NTSC television signal. This video input signal is supplied to the video processing unit 4. Under the control of the controller unit 5, the video processing unit 4 uses the supplied video input signal as an AC-driven RGB signal (RGB analog signal whose polarity is inverted every predetermined period (for example, horizontal scanning period or frame period)) S3. Supply to the drain driver 2. The AC drive RGB signal is an R signal (R image signal) indicating the brightness of the R pixel, a G signal (G image signal) indicating the brightness of the G pixel, and a B signal (B indicating the brightness of the B pixel.
Image signal).

The drain driver 2 includes a controller section 5
In accordance with the drain driver control signal S1 supplied from S., the AC drive RGB signal S3 supplied from the video processing unit 4 is sequentially sampled for each RGB color at the same timing during navigation display. On the other hand, during television display, the AC-driven RGB signal S3 supplied from the video processing unit 4 is sequentially sampled at different timings in the RGB order.

When the drain driver 2 samples the AC drive RGB signal S3 for one horizontal scanning period, it outputs a drive signal corresponding to the sampled data to the drain line (data line) DL of the TFT liquid crystal display element 1.

The gate driver 3 operates in accordance with the gate driver control signal S2 supplied from the controller section 5,
Gate line (address line) of FT liquid crystal display element 1
A gate pulse is sequentially applied to GL.

Gate line G to which a gate pulse is applied
The TFT connected to L is turned on, and the drive signal supplied from the drain driver 2 via the drain line DL is
It is applied to the liquid crystal of each pixel through the turned-on TFT. When the gate pulse is turned off, the TFT is also turned off, and the applied voltage is held in the pixel capacitance formed by the pixel electrode, the counter electrode and the liquid crystal between them. Therefore, the alignment state of the liquid crystal is maintained, and each pixel displays the corresponding color in the designated gradation.

According to the liquid crystal display device having such a structure,
When the navigation is displayed, the drain driver 2
The AC-driven RGB signals for each of the three pixels of GB are sampled at the same timing, and during television display, the AC-driven RGB signals are sequentially sampled at different timings. That is, the navigation display and the television display have different sampling timings, and sampling is performed at appropriate timings. Therefore, both the navigation image and the television image can be displayed well.

Next, the configuration and operation of the drain driver 2 will be specifically described with reference to FIGS.

As shown in FIG. 1, the drain driver 2
Is a timing generation circuit 8 and an n-stage shift register 9
1, a multiplexer 10, a level shifter 11, a sample hold circuit 12, and an output buffer 13.

The reference clock signal CLK, the shift register start signal SRT and the output enable signal OE are supplied to the timing generation circuit 8 from the controller section 5. The timing generation circuit 8 outputs 3 signals from these signals.
Phase clock signals CK-A, CK-B, and CK-C are generated and supplied to the shift register 9 together with the shift register start signal SRT. Further, the timing generation circuit 8
The output enable signal OE is supplied to the sample hold circuit 12.

The shift register 9 shifts the timing by one clock in accordance with the signal supplied from the timing generation circuit 8 and has a signal XC having a pulse width of 3 clocks.
1, XC2 ... XCn are sequentially generated and supplied to the multiplexer 10.

A mode switching signal NV / TV for switching between a navigation display mode which is a digital image display and a television display mode is supplied to the multiplexer 10 from the controller section 5.

The multiplexer 10 operates in accordance with the mode switching signal NV / TV to display the navigation display mode (NV
/ TV = "1"), signals XS1, XS2 ... XSn
Are output at the same timing, and in the television display mode, the signals XS1, XS2 ... XSn are sequentially output.

The level shifter 11 is a multiplexer 10
Output signals XS1, XS2, ...
The liquid crystal display device 1 is converted into a drive level and output.

The sample and hold circuit 12 includes an AC drive RG composed of R, G and B signals from the video processing section 4.
B signal is provided. The sample-hold circuit 12 samples the R signal at the timing based on the signals XS1, XS4 ... XSn-2, samples the G signal at the timing based on the signals XS2, XS5 ... XSn-1, and outputs the signal XS.
3, the B signal is sampled at the timing based on XS6 ... XSn. For example, the sample hold circuit 12
The RGB signals immediately before these signals become L level are held.

The sample and hold circuit 12 outputs the sampled and held signal according to the output enable signal OE supplied from the timing generation circuit 8 to the output buffer 13.
Xn are supplied to the TFT liquid crystal display element 1 via the drain line DL as drain drive signals X1, X2 ... Xn.

The operation of the drain driver having the above structure is shown in FIG.
A specific description will be given with reference to the timing chart shown in FIG. The timing generation circuit 8 uses the three-phase clock signal CK- from the reference clock signal CLK and the start signal SRT.
Create A, CK-B and CK-C. Based on these three-phase clock signals CK-A, CK-B, and CK-C, the n-stage shift register 9 corresponding to the number n of pixels on the horizontal scanning line operates, and XC1 to XC4 shown in FIG. As described above, the signals XC1 to XCn whose timings are sequentially shifted by one clock and the pulse width is three clocks are generated.

Output signals XC1 to XCn of the shift register 9
Are supplied to the multiplexer 10. Multiplexer 1
0 is the mode switching signal NV / from the signals XC1 to XCn.
The signals XS1 to XSn corresponding to the TV are generated.

That is, when the mode switching signal NV / TV is at "1" level indicating the navigation display mode, the output signals XS1 to XS3 of the multiplexer 10 are the same as the output signal XC1 of the shift register 9. Similarly, the multiplexer 10 outputs signals XS (3m-2), XS (3m-1), XS
As 3m, the same signal as the output signal XC (3m-2) of the shift register 9 is output. That is, in the navigation display mode, the respective signals are output so that the sampling timings for three consecutive R, G, and B pixels are the same.

On the other hand, when the mode switching signal NV / TV is "0" indicating the television display mode, the output signals XC1 to XCn of the shift register 9 are directly output as the output signals XS1 to XSn of the multiplexer 10. That is, in the television display mode, the sampling timings of the R, G, and B pixels are shifted from each other by a predetermined phase.

The sample and hold circuit 12 includes the signals XS1, XS4 ...
In response to XSn-2, the AC driving signal of R is sampled, and in response to signals XS2, XS5 ... XSn-1, G
Of the AC drive signal of the
Signal XS3, XS6 ... XSn whose level is converted by
In response to, the AC drive signal of B is sampled.
When the output enable signal OE is supplied from the timing generation circuit 8, the sampled signal is supplied to the drain lines X1 to Xn of the TFT liquid crystal display element 1 via the output buffer 13.

In this manner, the color pixels are arranged in a vertical stripe pattern, and in the case of digital color image display such as navigation display, RGB for continuous RGB 3 pixels are used.
By making the sampling timings of the signals the same, the digital color pixels can be displayed in the original display mode. On the other hand, in the case of TV image display, three consecutive RGs
The color of B3 dots may be expressed in some cases, and the color of continuous BGR3 dots may be expressed in other cases. In this embodiment, in the case of displaying a television image, an AC driven RG is used.
Since the sampling timing of the B signal is made different for each pixel, the originally designated color can be displayed on that pixel.

Next, FIG. 3 shows a detailed configuration example of the shift register 9 and the multiplexer 10. Shift register 9
Is composed of n stages of registers FF connected in cascade. The register FF is supplied with three-phase clock signals CK-A, CK-B, and CK-C as a set of three, respectively, and is started by the start signal SRT and one cycle of the reference clock signal CLK. Deviation and 3
The signals XC1 to XCn corresponding to the period are generated.

The multiplexer 10 outputs the output signal XC (3m-2) of the (3m-2) th stage register as it is.
In addition, the output signal XC (3
m-2) is supplied to AND gates A1 and A3 which are opened and closed by the mode switching signal NV / TV. In addition, the third (3m-
The output signal XC (3m-1) of the 1) th stage register is supplied to an AND gate A2 which is opened / closed by a signal obtained by inverting the mode switching signal NV / TV by an inverter INV. Also,
The output signal XC3m of the register of the 3m-th stage is supplied to the AND gate A4 which is opened / closed by a signal obtained by inverting the mode switching signal NV / TV by the inverter INV.

The outputs of the AND gates A1 and A2 are supplied to the OR gate OR1 and the output of the OR gate OR1 outputs the signal XS (3
m-1) is output. The outputs of the AND gates A3 and A4 are supplied to the OR gate OR2, and the output of the OR gate OR2 is output as the signal XS3m.

According to this structure, when the mode switching signal NV / TV is at "1" level, the AND gate A1
And A3 are opened, AND gates A2 and A4 are closed, and OR gates OR1 and OR2 respectively output the same signal as the signal XC (3m-2). On the other hand, the mode switching signal NV / TV is "
At the 0 "level, AND gates A2 and A4 are opened, AND gates A1 and A3 are closed, and OR gates OR1 and OR2 output signals XC (3m-1) and XC3m, respectively.

Therefore, according to the configuration shown in FIG. 3, three sampling timing signals are output at the same timing during navigation display, and the sump timing signal is deviated by a predetermined phase during television display. Output at different timings.

The TFT liquid crystal display element 1 may use an element other than RGB as the three primary colors, and may use an active element other than the TFT as an active element. Further, the present invention can be applied not only to a color liquid crystal display element for performing navigation display and television display, but also to any digital image such as multimedia display and display.

[0044]

As described in detail above, according to the present invention, both a digital color image and a television image can be satisfactorily displayed by using a liquid crystal display element in which pixels of respective colors are arranged in a stripe pattern.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a drain driver of an active matrix liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the active matrix liquid crystal display device of FIG.

3 is a circuit diagram showing a configuration of a shift register and a multiplexer shown in FIG.

FIG. 4 is a block diagram showing a configuration of an active matrix liquid crystal display device.

FIG. 5 is a diagram showing an arrangement of pixels of RGB colors.

[Explanation of symbols]

1 ... TFT liquid crystal display element, 2 ... drain driver, 3
... Gate driver, 4 ... Video processing unit, 5 ... Controller unit, 8 ... Timing generation circuit, 9 ... Shift register, 10 ... Multiplexer, 11 ... Level shifter,
12 ... Sample and hold circuit, 13 ... Output buffer,
A1 to A4 ... AND gate, OR1, OR2 ... OR gate, INV ... Inverter

Claims (4)

[Claims] 1. A liquid crystal display element in which pixels of different colors are arranged in a stripe pattern, a switching signal for displaying a television image and a digital image, and a color image signal of a plurality of colors are received, and when the television image is displayed, each color is displayed. The color image signal is sampled at a different timing, and when the digital image is displayed, the color image signal of each color is simultaneously sampled and is supplied to the corresponding pixel of the liquid crystal display element. Liquid crystal display device. 2. The liquid crystal display device comprises switching elements arranged in a matrix, pixel capacitors connected to the switching elements, data lines connected to the switching elements, and gate lines connected to the switching elements. The supply means is connected to the gate line, receives the switching signal and color image signals of RGB three primary colors, the gate driver means for sequentially applying a gate pulse to the gate line, and according to the switching signal, When the television image is displayed, the color image signals are sampled at different timings for each of the three primary colors, and when the digital image is displayed, the color image signals are sampled at the same time for each of the three primary colors, and the data is applied to the data line. The device according to claim 1, further comprising a driver unit. The liquid crystal display device. 3. The data driver means receives a shift register to which a clock signal is supplied, an output of the switching signal and each stage of the shift register, and outputs each stage of the shift register when the television image is displayed. And a multiplexer that outputs the output of every two stages of the shift register in common to each corresponding three stages when displaying the digital image, and sample-holds the color image signals of the three primary colors according to the output of the multiplexer. The liquid crystal display device according to claim 2, further comprising: a sample hold unit; and a unit that applies the signal held by the sample hold unit to the data line. 4. A method for driving a liquid crystal display device in which color pixels are arranged in stripes for switching between a television image and a digital image for display, and in accordance with a television image display / digital image display switching signal, when the television image is displayed. The color image signals of the three primary colors are sampled and supplied to the liquid crystal display element by shifting the timing for each of the three primary colors, and at the time of the digital image display, the color image signals of the three primary colors are simultaneously sampled. A method of driving a liquid crystal display element, comprising: a supply unit that supplies the liquid crystal display element.