JPH02211784A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To obtain vertical resolution not inferior to a display device using a CRT display in a receiver by applying 1/2 time compression to an original video signal synchronously with a scanning conversion timing signal from a timing control circuit in a scanning conversion circuit. CONSTITUTION:A scanning conversion circuit 14 is operated synchronously with a scanning conversion timing control signal from a timing control circuit 9. Thus, the inputted original video signal is subjected to 1/2 time compression at every horizontal scanning period. Then the position on a liquid crystal panel 1 when each original video signal by 2 fields forming one frame is regenerated at a transmission side is made coincident with the case of applying interlace scanning on the CRT display device. Thus, the reproduced picture is similar to that obtained by the receiver using the CRT display device and the vertical resolution is made similar.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a display device for a television receiver, and in particular,
The present invention relates to a liquid crystal display device using a liquid crystal panel.

[Prior Art] CRT has traditionally been used as a display device for television receivers.
(cathode-ray tube) displays have been widely used. However, due to its structure, the depth of the CRT display cannot be reduced, and as the screen diameter increases, the weight increases dramatically due to explosion-proof measures. Therefore, recently CRT
2. Description of the Related Art Various liquid crystal display devices with great potential have been developed as display devices to replace displays. A liquid crystal display device uses a liquid crystal panel for its image display section.

Liquid crystals have the property that their light transmittance changes depending on the magnitude of the applied voltage. Therefore, by placing a large number of transparent electrodes with a small area on the liquid crystal panel, which has a structure in which a light source is placed on one side of the liquid crystal panel and the liquid crystal is sandwiched between glass plates, etc., and voltages of various magnitudes are applied to these electrodes, the voltage can be applied. An arbitrary bright or dark image is created on the panel depending on the magnitude of the applied voltage.

Therefore, by applying a voltage to the electrodes at the corresponding positions on the panel according to the brightness of each part of the image to be reproduced, the desired image can be reproduced. Liquid crystal display devices utilize this principle.

FIG. 6(a) is a schematic block diagram showing an example of the configuration of a conventional liquid crystal display device in a television receiver. Referring to the figure, this liquid crystal display device includes a liquid crystal panel 61 for displaying received video, a segment driver 62 and a scan driver 63 for applying a signal voltage to the liquid crystal panel 61 to drive it, and a received video signal. a polarity inversion circuit 68 for inverting the polarity of the segment driver 62 . Scan driver 63 and polarity inversion circuit 68
It is composed of a timing control circuit 69 for controlling operation timing.

The liquid crystal panel 61 is formed into a panel shape by sandwiching liquid crystal between glass plates or the like, and is divided into pixels by arranging electrodes of minute area in a matrix in the horizontal and vertical directions on the panel. FIG. 6(b) is a partial schematic diagram showing the configuration on the liquid crystal panel 61. FIG.

Referring to the figure, a liquid crystal panel 61 has M data signal lines 64 arranged in parallel in the vertical direction and N scanning signal lines 65 arranged in parallel in the horizontal direction. In the figure, each of M×N parts on the panel surrounded by the data signal line 64 and the scanning signal line 65 is a pixel. Each pixel has a pair of pixel electrodes 67 provided across the panel.
(The illustration of the back surface of the liquid crystal panel 61 is omitted) is provided. A transparent electrode is used for the pixel electrode 67. Further, a switching element 66 provided for each pixel is provided on the liquid crystal panel 61, and the liquid crystal panel 61 is a so-called active matrix LCD (liquid cry
stal display). The switching element 66 is provided between the corresponding pixel electrode 67 and the data signal line 64, and its ON10FF is controlled by a signal applied to the corresponding scanning signal line 65. That is, the voltage of the corresponding data signal line 64 is applied to each pixel electrode 67 when the corresponding switching element 66 is in the ON state. As a result, a voltage is applied to the liquid crystal sandwiched between each pixel electrode, and the amount of light transmitted through the liquid crystal at that portion changes depending on the applied voltage.

N scanning signal lines 65 from the liquid crystal panel 61 are connected to the scan driver 63 . Scan driver 63
responds to a driver control signal from the timing control circuit 69 and is driven at the same period as the horizontal scanning period of the received video signal.

Specifically, in the above period, a signal is sequentially applied to each of the N scanning signal lines 65 to turn on the corresponding switching means 66 (hereinafter, a scanning signal line to which such a voltage is applied is selected). ).

The segment driver 62 receives M from the liquid crystal panel 61.
A real data signal line 64 is connected thereto. The segment driver 60 responds to a driver control signal from the timing control circuit 69 and is driven at the same period as the horizontal scanning period of the received video signal. Specifically, the video signal input through the polarity inverting circuit 68 is sampled at the above-mentioned period, and is sequentially internally transferred and outputted to the corresponding data signal line 64.

The timing control circuit 69 receives the synchronization signal separated from the received video signal, and provides a corresponding driver control signal and polarity inversion timing control signal to the segment driver 62, scan driver 63, and polarity inversion circuit 68, respectively. .

The polarity inversion circuit 68 is a timing control circuit 69
The segment driver 6 inverts the polarity of the received video signal at a cycle according to the polarity inversion timing control signal from the segment driver 6.
Give to 2. This is done for the following reasons. Generally, in order to drive a liquid crystal, it is necessary to apply an alternating current voltage. Therefore, by reversing the polarity of the video signal voltage at a predetermined period and applying it to the liquid crystal, the polarity of the voltage applied to the same part of the liquid crystal in the liquid crystal panel can be changed each time, and the voltage applied to the liquid crystal can be changed to an AC voltage. do.

The operation of this liquid crystal display device will be explained below.

The received video signal is separated from the synchronization signal contained therein and applied to a polarity inversion circuit 68 , and the separated synchronization signal is applied to a timing control circuit 69 .

The timing control circuit 69 generates a driver control signal and a polarity inversion timing control signal from the input synchronization signal and outputs them to the predetermined function section described above.

The polarity inversion circuit 68 performs polarity inversion processing on the input video signal at regular intervals in synchronization with the polarity inversion timing control signal. Therefore, polarity inversion processing and non-polarity inversion processing (no inversion processing is performed) are performed alternately on the input video signal according to the polarity inversion timing control signal, and either inversion processing or non-polarity inversion processing is performed. The processed video signal is given to the segment driver 62.

Both segment driver 62 and scan driver 63 operate in synchronization with driver control signals.

The scan driver 63 operates in synchronization with the driver control signal. Therefore, the scan driver 63 repeats the operation of sequentially selecting one of the N scanning signal lines from the top every horizontal scanning period of the received video signal.

On the other hand, the segment driver 62 performs the following operation in synchronization with the driver control signal. That is, for each horizontal scanning period of the received video signal, M signal voltages corresponding to each pixel of M pixel groups in one column on the liquid crystal panel 61 are calculated from the inputted video signal for one horizontal scanning period. Sample it and transfer it to the corresponding data signal line. Of course, in order for these M signal voltages to be applied to the liquid crystal of each pixel of the liquid crystal panel 61 through the corresponding data signal lines, the switching means of each corresponding pixel must be in the ON state. Therefore, each of the M signal voltages is applied to each pixel electrode in one column provided corresponding to the scanning signal line selected by the scan driver 63 at that time.

As a result, video signals for one horizontal scanning period of the received video signals are reproduced in one row of pixels. On the other hand, the selected scanning signal line is sequentially shifted by the scan driver 63 in a horizontal scanning period. The video signal input to the segment driver 62 is obtained by sequentially scanning the screen in the horizontal direction on the transmitting side, and is a serial series of signals. Therefore, by repeating the operation of the segment driver 62 as described above N times, the received video signal for one field is reproduced on the liquid crystal panel 61.

Problems to be Solved by the Invention] Generally, when transmitting television images, interlaced scanning as shown in FIG. 7 is performed. FIG. 7 is a diagram for explaining interlaced scanning. Referring to the figure, a television screen 71 on which an image to be transmitted is displayed is scanned along n-1 scanning lines indicated by solid lines and broken lines. In the figure, the number (1 to 2) marked on each scanning line is
n-1) is the scanning order of each scanning line during actual scanning. In this way, in actual scanning, the horizontal scanning lines of the television screen 71 are not scanned one by one from the top, but every other horizontal scanning line is scanned from the top the first time (solid scanning lines in the figure), 2
The horizontal scanning lines (broken lines) between the horizontal scanning lines (solid lines) scanned earlier in the first scan are sequentially scanned. In other words, one frame, that is, one screen, is scanned in two scans. As a result, in interlaced scanning, one field of video signals created by the first scan is followed by one field of video signals created by the second scan, which are serially connected and transmitted. Therefore, in order to accurately reproduce the original image from such a video signal, the image reproduction process of the receiver that receives the video signal must be performed as follows. That is, a rough image consisting of half the number of scanning lines existing on the receiving device is created on the display screen of the receiving side using the video signal obtained by the first scanning on the transmitting side, and then the second scanning on the transmitting side is performed. An image consisting of the remaining half of the scanning lines is created using the video signal obtained by scanning. At this time, during the second image reproduction, scanning is performed so as to weave between the scanning lines scanned during the first reproduction. That is, the video signal of one screen transmitted through these two image reproduction processes is reproduced. If the display device of the receiver uses a CRT display, it is NTSC (national television).
This method is used according to the NTSC standard, and the number of effective scanning lines appearing on the screen is 440 to 480 according to the NTSC standard.

However, in current television receivers using liquid crystal display devices, the number of scanning lines, that is, the number of pixel columns, is 220 to 240 (
Hereinafter, this number will be referred to as N (books). Further, in the image reproduction process, scanning signal lines provided corresponding to the scanning lines are sequentially selected one by one from the top, and a video signal is applied to the corresponding pixel column. Therefore, when receiving an interlaced video signal with a current receiver using a liquid crystal display device, the following problems occur.

Since the number of scanning lines on the receiving side display device is half the number of scanning lines on the transmitting side, the positional relationship of the received image (for one frame on the transmitting side) reproduced by the second image reproduction process is as follows.
The positional relationship will be different from the original positional relationship as scanned on the transmitting side. FIG. 8 is a diagram showing an image reproduction process in a television receiver using a current liquid crystal display device.

This will be explained below with reference to the drawings. In the following description, the scanning lines will be represented by serial numbers sequentially starting from the top of the screen.

The correspondence relationship between the video signal obtained by scanning the odd-numbered scanning lines and the video signal obtained by scanning the even-numbered scanning lines on the transmitting side and the scanning lines on the display screen on the receiving side where they are reproduced is as shown in the figure. It is. That is, each odd number O on the sending side
The video signal obtained from the scanning line d sequentially corresponds to each scanning line 82 of the display screen 81 from the top by the first image reproduction on the receiving side. Further, the video signals obtained from the scanning lines of each even number Ev on the transmitting side also correspond to the scanning lines 82 of the display screen 81 sequentially from the top by the second image reproduction on the receiving side. Therefore, although the scanning lines of odd numbers Od and the scanning lines of even numbers Ev on the transmitting side should appear alternately on the image receiving device, they are superimposed at the same position as shown in the figure.

Therefore, the vertical resolution of the reproduced image on the receiving side is considerably inferior to that of the image (original image) on the transmitting side. In other words, although the original image is scanned with 440 to 480 scanning lines to create a video signal faithful to the original image, on the receiving side only 220 to 240 scanning lines are scanned. Since the video signal for one field of the original image is reproduced, only a rough image can be obtained.

In order to solve this problem, it is first necessary to increase the number of scanning lines on the display screen (liquid crystal panel) of a liquid crystal display device, that is, the number of scanning signal lines to the same extent as the number of scanning lines on a CRT display. However, with conventional liquid crystal technology, it is difficult to manufacture a liquid crystal display screen with such a large number of scanning signal lines, and even if such a liquid crystal display screen were manufactured, various problems remained in driving it. was not practical. However, recent advances in liquid crystal technology have made it possible to actually use liquid crystal display screens as described above. However, simply increasing the number of scanning signal lines on the display screen compared to the conventional method leaves the following problems unsolved. If interlaced scanning similar to CRT is simply performed in a liquid crystal display device, the following method can be considered.

In other words, in the operation of the scan driver, the method of selecting the scanning signal lines one by one from the top in the conventional liquid crystal display device has been changed, and in the first scan, every other scanning signal line is selected from the top. In the second time, the scanning signal lines that were not selected in the first time are selected from above (in other words, the odd-numbered scanning signal lines are selected in numerical order, and then the even-numbered scanning signal lines are selected in numerical order). However, with this method, there is always a scanning signal line that is not selected during the scanning process, and the video signal is not reproduced in each pixel electrode provided corresponding to that signal line. continues to be displayed as is.This causes problems such as inaccurate playback when playing back videos with rapid movement.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide a liquid crystal display device that can achieve a vertical resolution comparable to that of a display device using a CRT display in a television receiver.

[Means for Solving the Problems] In order to achieve the above objects, the liquid crystal display device according to the present invention has a
Time-compresses the horizontal period signal to 1/2 the time, doubles the number of horizontal scanning lines within one field period, and creates a signal similar to one of those signals between the compressed signals. or a means for interpolating the same signal to convert it into a pseudo video signal, and a number of scanning signal lines corresponding to the number of effective scanning lines of one frame of a television signal, and arranged in a matrix of rows and columns. a panel including liquid crystal pixels; a scan driver that operates at twice the horizontal scanning frequency of the original video signal to drive the scanning signal line of the liquid crystal panel; and a first scan driver that constitutes one frame of the original video signal. and the operation timing of the scan driver during the second field is set to 17 in the horizontal scanning period of the original video signal.
The present invention includes a timing control means for shifting by a time period of 2, and a segment driver for driving the liquid crystal pixels at a frequency cycle twice the horizontal scanning frequency of the original video signal in response to the pseudo video signal.

[Function] Since the liquid crystal display device according to the present invention is configured as described above, it is possible to receive and reproduce video signals for one frame on the transmitting side while maintaining the original positional relationship, and high resolution display can be realized.

Embodiment FIG. 1(a) is a schematic block diagram of a liquid crystal display device showing an embodiment of the present invention. Referring to the figure, this liquid crystal display device includes a liquid crystal panel 1, a scan driver 3, and a segment driver 2 as in the conventional case.

It includes a timing control circuit 9 and a polarity inversion circuit 8. Note that these basic functions are the same as in conventional liquid crystal display devices. However, the number of scanning signal lines on the liquid crystal panel 1 is different from the conventional one, and is based on the number of effective scanning lines for one frame according to the NTSC standard (440 to 480 lines).
The number of books is hereinafter referred to as N (books). Figure 1 (
b) is a partial schematic diagram showing the configuration of the liquid crystal panel 1. FIG. Referring to the figure, this liquid crystal panel has M data signal lines 4 arranged in parallel in the vertical direction and double the number of conventional data signal lines 4 arranged in parallel in the horizontal direction, that is, N, (N).

#2N, ) scanning signal lines 5 are provided. Furthermore, this liquid crystal panel has a data signal line 4 and a scanning signal line 5, as in the conventional case.
A pixel electrode 7 and a switching means 6 are provided for each pixel surrounded by. Further, unlike the conventional case, the scan driver 3 and the segment driver 2 are driven at a period of 1/2 of the horizontal scanning period of the received video signal (hereinafter referred to as the original video signal). Furthermore, unlike the conventional liquid crystal display device, a scan conversion circuit 14 is provided. Note that the timing control circuit 9 is connected to the scan driver 3.
It outputs a driver control signal for driving the segment driver 2 at the above-described period, and also outputs a signal for controlling the operation timing of the scan conversion circuit 14.

The scan conversion circuit 14 performs time compression of 1/2 on the original video signal in synchronization with the scan conversion timing signal from the timing control circuit 9.

The operation of this liquid crystal display device will be explained below.

As in the past, the original video signal is separated from the synchronization signal contained therein. The original video signal from which the synchronization signal has been removed is applied to the polarity inversion circuit 8 via the scan conversion circuit 14, unlike the conventional method. The synchronization signal is given to the timing control circuit 9 as in the conventional case.

In the timing control circuit 9, the scan driver 3 and the segment driver 2 are controlled based on the input synchronization signal.
In addition to the driver control signal for driving the scan conversion circuit 14 and the polarity inversion timing RAa signal for driving the polarity inversion circuit, a scan conversion timing control signal for driving the scan conversion circuit 14 is generated and output. The polarity reversal timing control signal is a clock signal with a period that is 1/2 of the horizontal scanning period of the original video signal, and the scan conversion timing control signal is a clock signal with the same period as the horizontal scanning period of the original video signal.

Next, the scan conversion circuit 14 operates in synchronization with the scan conversion timing control signal from the timing control circuit 9. Therefore, the input original video signal is time-compressed to 1/2 for each horizontal scanning period. FIG. 2(a) is a waveform diagram of the video signal input to the scan conversion circuit 14, and FIG. 2(b) is a waveform diagram of the video signal output from the scan conversion circuit 14 after scan conversion (this is a pseudo FIG. 2 is a waveform diagram of a video signal (referred to as a video signal). In the figure, H indicates the horizontal scanning period of the original video signal. As shown in the figure, since the input original video signal (Fig. 2(a)) is time-compressed by 1/2 every horizontal scanning period H, the input original video signal (Fig. 2(a)) is A
-A'B-B' C-C...The signal waveform between is 1
/2 and the output video signals are a-a', bb', c-c', respectively in FIG. 2(b).
...The signal waveform will be between. In addition, in the output video signal (Fig. 2 (b)), a-a', bb'
, c-c', -, a signal that is the same as or similar to one of the adjacent signals is inserted as an interpolation signal. Note that the width of this interpolation signal is also half of the horizontal scanning period H of the original video signal, that is, 1/2H. Note that such interpolation signals can be created using known techniques.

Next, the video signal scan-converted by the scan conversion circuit 14 as described above, that is, the pseudo video signal, is input to the polarity inversion circuit 8. The polarity inversion circuit 8 inverts the polarity of the pseudo video signal inputted in synchronization with the polarity inversion timing control signal from the timing control circuit.

Therefore, the polarity of the manually inputted pseudo video signal is reversed every H/2 of the horizontal scanning period. That is, polarity inversion processing and non-polarity inversion processing are alternately performed on the input pseudo video signal every H/2 horizontal scanning period of the pseudo video signal. The pseudo video signal subjected to such processing in the polarity inversion circuit 8 is provided to the segment driver 2.

Both segment driver 2 and scan driver 3 operate in synchronization with a driver control signal from timing control circuit 9.

The scan driver 3 performs the same operation as the conventional one in synchronization with the driver control signal. That is, scan driver 3
selects one scanning signal line from the N number of connected scanning signal lines 5 sequentially from the top every H/2 horizontal scanning period of the pseudo video signal.

On the other hand, the segment driver 2 performs the same operation as the conventional one in synchronization with the driver control signal. That is, every H/2 horizontal scanning period of the pseudo video signal, M signal voltages are sampled from the input pseudo video signal for H/2 period and transferred and output to the corresponding data signal line. Of course, each of these M signal voltages is applied to the scan driver 3 at that time.
is applied to each pixel electrode provided corresponding to the scanning signal line selected by.

Since the original video signal is obtained by interlaced scanning, the operation of the segment driver as described above is repeated N times, so that one field of the original video signal on the transmitting side is reproduced on the liquid crystal panel 1. Ru. As a result, a-a' of the pseudo video signal (Fig. 2(b))
The interpolated signal inserted between b-b'c-c', . . . (see FIG. 2(b)) is reproduced to the pixel group in either the even or odd columns on the liquid crystal panel 1. .

Next, a case will be described in which the pseudo video signal input to the segment driver 2 corresponds to one field next to the original video signal.

At this time, the operation of the scan driver 3 is started with a shift of H/2 during the horizontal scanning period of the pseudo video signal. As a result, the scanning signal lines located between the scanning signal lines selected when reproducing the previous original video signal for one field are selected when reproducing the original video signal for one field this time. In other words, the scanning signal line selected when the interpolated signal inserted between the previous one field's worth of original video signals is played back, and the interpolated signal inserted between the current one field's worth of original video signals is played back. The scanning signal line selected when the signal is selected is switched. In other words, the pixel column in which the current interpolation signal is reproduced is different from the column in which the interpolation signal was reproduced when the original video signal for one field was previously reproduced.

FIG. 4 is a diagram showing the image reproduction process in this embodiment. Correspondence between the original video signal created by scanning odd-numbered scanning lines and the original video signal created by scanning even-numbered scanning lines on the transmitting side and the scanning lines on the display screen on the receiving side where they are reproduced. is as shown in the figure. (In the figure, * indicates an interpolation signal inserted between the original video signals by the scan conversion circuit 14 on the receiving side.) In other words, the original video signal obtained from each odd-numbered scanning line Od on the transmitting side and the interpolation signal between them. The signals alternately correspond to each scan line 22 of the display screen 21 on the receiving side. In addition, both the original video signal obtained from each even-numbered scanning line Ev on the transmitting side and the interpolated signal inserted therebetween are also used for each scanning line 22 on the display screen 21 on the receiving side.
correspond to alternately.

However, the scanning lines of the receiving side screen corresponding to the former original video signal and the scanning lines of the receiving side screen corresponding to the latter original video signal do not overlap with each other, unlike in the conventional art.

In other words, the positions on the liquid crystal panel 1 at which the two fields of original video signals constituting one frame are reproduced on the transmitting side correspond to the positions on the liquid crystal panel 1 when interlaced scanning is performed on a CRT display. As described above, the reproduced image is similar to that obtained in a receiver using a CRT display, and the vertical resolution is also comparable.

Further, in this embodiment, the polarity inversion circuit 8 inverts the input video signal every H/2 horizontal scanning period of the converted video signal. This is to apply an alternating voltage to the liquid crystal as in the conventional case, but it also has the effect of not causing flicker (flickering of the screen) for the following reason. Generally, if there is even a slight difference in the absolute values of the positive and negative polarity voltages applied to the liquid crystal, the intensity of the light transmitted through the liquid crystal fluctuates at a frame frequency of 30 Hz. Therefore, if the light intensity fluctuations of all pixels are in the same phase, the light intensity fluctuations of each pixel will emphasize each other, and flicker will be felt when viewing a screen made up of a group of pixels. However, in this embodiment, in order to invert the polarity of the pseudo video signal every H/2 horizontal scanning period of the pseudo video signal, the liquid crystal panel 1
The polarities of the voltages applied to each pixel column are opposite to each other in the upper and lower pixel columns. Therefore, the temporal phase change of the voltage applied to each pixel column also has an opposite phase for each column. This means that the characteristics of temporal fluctuations in light transmitted through the liquid crystal of each pixel column, that is, the characteristics of temporal light intensity fluctuations, are opposite to each other in the upper and lower pixel columns. Therefore, the light intensity fluctuations of each pixel column cancel each other out, and when viewing a reproduced image on the liquid crystal panel 1, which is a group of a plurality of pixels, almost no flicker is observed.

FIG. 5(a) is a schematic block diagram of a liquid crystal display device showing a specific example of this embodiment. This will be explained below with reference to the drawings.

In this specific example, it is assumed that the transmitted video signal is a color television signal, and includes a luminance signal indicating the luminance of the pixel and a color signal indicating the color of the pixel. Further, in the receiver, the color signal and the luminance signal are once separated, and after being subjected to necessary processing, an RGB signal, which is the final video signal necessary for image reproduction, is created from them.

The RGB signal is a general term for three signals that are the basis of color, and the series of processing for the RGB signals described below is performed on all three signals.

In this liquid crystal display device, the liquid crystal panel includes a glass plate 31
and 32, and a liquid crystal layer (not shown) provided between these. FIG. 5(b) shows the glass plate 3
FIG. 1 is a partial plan view showing the surface structure of No. 1; Referring to the diagram,
The glass plate 31 has a number N corresponding to the number of effective scanning lines for one frame of a television signal arranged in parallel to the horizontal direction on its surface.
F scanning signal lines 36 and M lines arranged in parallel in the vertical direction
It has two data signal lines 35. Furthermore, a TPT (thin film transistor) 37 is used as a switching means provided for each pixel electrode 38.

Further, on the glass plate 32, a counter electrode (an electrode on the back side of the paper) of the pixel electrode 38 provided for each pixel is provided, and a predetermined counter electrode voltage is applied to this counter electrode by a counter signal line 54. be done.

The digital circuit 39 is a circuit for performing scan conversion and polarity inversion as described in the previous embodiment on the received video signal.

The segment driver 33 and scan driver 34 also have the same functions as described in the previous embodiment.

The timing control circuit 45 controls all the operations of the above functional sections and has the following functions. A sample for starting a series of sampling operations in the segment driver 33 in response to a composite synchronization signal (a signal containing various synchronization signals of horizontal and vertical synchronization signals) separated from the received video signal. A start signal, a sample clock signal for performing one sampling operation, an output transfer signal for internally transferring and outputting the sampled signal voltage to the corresponding data signal line, and a scan driver. 34, a scan driver clock signal for selecting one scanning signal line, a shift register start signal for sequentially selecting scanning signal lines one by one from the top, and a digital circuit 39 for predetermined scanning conversion. It also generates and outputs a digital circuit control signal for polarity reversal. Specifically, the sample start signal, output transfer signal, and scan driver clock signal are all clock signals having a cycle that is half the horizontal scanning cycle of the original video signal. Furthermore, when reproducing two fields constituting one frame on the transmitting side, the shift register start signal shows a pulse waveform that is shifted by 1/2 of the horizontal scanning period of the original video signal between the two fields. .

The video amplifier 44 is for amplifying a video signal that has been subjected to predetermined processing by the digital circuit 39, that is, a pseudo video signal, to a predetermined level and providing it to the segment driver 33.

The digital circuit 39 includes an A/D converter 40 for converting the received analog video signal into a digital video signal, and a memory section 41 for storing the video signal converted into a digital signal by the A/D converter 40. , a bit inverter 42 for inverting the polarity of the digital video signal read out from the memory section 41, and a D/D converter for converting the input digital video signal into an analog video signal.
It is composed of an A converter 43 and a switching circuit 46. Note that the reading of the digital video signal from the memory section 41 and the operation timing of the switching circuit 46 are controlled by a timing control signal from the timing control circuit 45. Further, when reading the digital video signal from the memory section 41, the signal for one horizontal scanning period of the original video signal is read out twice in succession.

The operation of this liquid crystal display device will be explained below.

The composite synchronization signal separated from the received video signal is given to the timing control circuit 45, which converts the RGB signal (
This signal (hereinafter referred to as the original RGB signal in correspondence with the original video signal) is input to the A/D converter 40 in the digital circuit 39.

The timing control circuit 45 generates a control signal as described above in accordance with the input composite synchronization signal and outputs it to a predetermined functional section.

The A/D converter 40 converts the input original RGB signal into a digital signal, and stores each line of the signal in the memory section 4.
Give to 1. In this way, the digitized original RG
The B signal is written into the memory section 41. Subsequently, one line of RGB signals written in the memory section 41 is read out twice in succession at twice the writing speed in response to a timing control signal from the timing control circuit 53.

As a result, the read signal for one line becomes 1/1 in time.
2, and another signal identical to the compressed signal is included within the horizontal scanning period H of the original RGB signal (see FIG. 2). The signal obtained in this manner will be referred to as a pseudo RGB signal in contrast to the original RGB signal. That is, in this specific example, the interpolation signal is the same as the adjacent video signal.

Next, in response to the digital circuit control signal, the switching circuit 46 connects the D/A converter 43 to the bit inverter 4 at a period of 1/2 of the horizontal scanning period of the original RGB signal, that is, H/2.
The connection is alternately switched so as to provide the output of 2 or the output of the memory section 41.

As a result, the polarity of the pseudo RGB signal is inverted every horizontal period H/2 of the pseudo RGB signal. In this way, the pseudo RGB signal after inversion processing or non-inversion processing is converted into an analog signal by the D/A converter 43 and then input to the video amplifier 44. The video amplifier 44 amplifies the input pseudo RGB signal to a predetermined level and supplies it to the segment driver 33.

On the other hand, the scan driver 34 starts the next operation in synchronization with the shift register start signal from the timing control circuit 45. That is, in synchronization with the scan driver clock signal from the timing control circuit 45, the connected 2N scan signal lines are sequentially selected one by one from the top to the bottom. For this purpose, from the scanning signal line of the single opening to the scanning signal line of the main opening,
Sequentially, a high voltage of a certain level is applied as a selection signal for a horizontal scanning period H/2 of the pseudo RGB signal. This voltage is applied to each gate of M transistors provided corresponding to one row of pixel electrodes on the glass plate 31 constituting the liquid crystal panel to turn them on. However, the shift register start signal can be generated either when reproducing the original RGB signal created by scanning odd-numbered scanning lines on the transmitting side (hereinafter referred to as odd-numbered field time) or by scanning even-numbered scanning lines. When the original RGB signal is reproduced (hereinafter referred to as even field time), the pseudo RGB signal is shifted by the horizontal scanning period H/2.

FIG. 3(a) is a time chart showing a selection signal applied to each scanning signal line during an odd field, and FIG. 3(b) is a time chart of a selection signal applied to each scanning signal line during an even field. FIG. Note that a time chart of the horizontal synchronization signal of the original RGB signal is included in the figure for reference. Referring to the figure, among the selection signals applied to each scanning signal line, selection signals OGI, OG3 . OG5... are all output in the first half of the horizontal scanning period H of the original RGB signal during odd fields, and are output during the second half of the horizontal scanning period H of the original RGB signals during even fields. Similarly, the selection signal O given to the even-numbered scanning signal line
G2. OG4. OG6... are all output in the second half of the horizontal scanning period H of the original RGB signal in odd-numbered fields, and in the first half of the horizontal scanning period H of the original RGB signals in even-numbered fields. Therefore, the time when the same scanning signal line becomes selected is different by a period of H/2 between an even field and an odd field.

On the other hand, the segment driver 33 starts the next operation in synchronization with the sample start signal from the timing control circuit 45. That is, in synchronization with the sample clock signal from the timing control circuit 45, M signal voltages are sampled from the inputted pseudo RGB signal of H/2 of the horizontal scanning period. Subsequently, in response to the output transfer signal from the timing control circuit 45, the M sampled signal voltages are transferred and outputted to the respective corresponding signal lines. Therefore, M signal voltages are applied to pixel electrodes on the liquid crystal panel 31 provided corresponding to the scanning signal line selected by the scan driver 34 at this time. By repeating this operation NFX twice, that is, 2N times, the video signal for the odd field and the video signal for the even field on the transmitting side are reproduced at the positions where they should originally be reproduced on the liquid crystal panel on the receiving side.

In this embodiment, polarity inversion was performed on the video signal after digital conversion, but polarity inversion may be performed on the video signal when it is an analog signal. Further, as the interpolation signal in the pseudo video signal, the same one as that of the adjacent video signal was used, but the following can also be done using a known method. For example, the video signal of the previous field and the video signal of the current field are selectively taken in as interpolation signals depending on the movement of the image. By doing so, the vertical resolution of the reproduced image is further improved.

This effect is particularly great when the transmitted image is a still image.

In this embodiment, a series of scan conversion processes are applied to the original video signal at the stage of RGB signals, but the series of scan conversion processes may be performed at the stage of luminance signals and color difference signals.

[Effects of the Invention] Since the liquid crystal display device according to the present invention is configured as described above, it is possible to provide a reproduced image with extremely superior vertical resolution compared to the conventional device. Furthermore, by devising interpolation signals inserted according to image movement, etc., CRT
It is possible to obtain reproduced images with higher resolution than when using a display.

[Brief explanation of the drawing]

Fig. 1 is a configuration diagram of a liquid crystal display device showing an embodiment of the present invention, Fig. 2 is a waveform diagram of an original video signal and a video signal after scanning conversion, and Fig. 3 is a selection given to each scanning signal line. FIG. 4 is a diagram showing a signal time chart, and FIG. 4 is a diagram showing the correspondence between the scanning lines on the screen of the liquid crystal display device according to the present invention and the scanning lines on the transmitting side screen. FIG. FIG. 1 is a configuration diagram of a liquid crystal display device for explaining one embodiment in more detail. Furthermore, FIG. 6 is a diagram showing an example of the configuration of a conventional liquid crystal display device, FIG. 7 is a diagram for explaining interlaced scanning, and FIG. 8 is a diagram showing the scanning lines on the screen and the transmission side of a conventional liquid crystal display device. FIG. 3 is a diagram showing the correspondence relationship between the image data and the scanning lines on the screen. In the figure, 1 and 61 are liquid crystal panels, 2, 33, and 62 are segment drivers, and 3, 34, and 63 are segment drivers.
4, 35° and 64 are data signal lines, 5, 36. and 65 are scanning signal lines, 6 and 6
6 is a switching means; 7. 38. and 67 are pixel electrodes, 8 and 68 are polarity inversion circuits, 9 and 69 are timing control circuits, and 14 is a scan conversion circuit. Further, 31 and 32 are glass plates, 37 is a TPT transistor, 39 is a digital circuit, 40 is an A/D converter, 41 is a memory section, 42 is a bit inverter, and 43 is a D/D converter.
A converter, 44 is a video amplifier, and 46 is a switching circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A liquid crystal television display device, which compresses the signal of one horizontal period to 1/2 time for an original video signal of interlace standard, and reduces the number of horizontal scanning lines within one field period. Means for converting into a pseudo video signal by interpolating a signal similar to or the same as one of the signals between the doubled and compressed signals, and an effective scanning line of one frame of the television signal. a panel including liquid crystal pixels arranged in a matrix of rows and columns; a scan driver that drives the scan signal line of the panel; and first and second scan drivers constituting one frame of the original video signal.
timing control means for shifting the operation timing of the scan driver between fields by a time period that is 1/2 of the horizontal scanning period of the original video signal; A liquid crystal display device comprising: a segment driver that drives the liquid crystal pixels at a frequency cycle twice the scanning frequency.