JP2748201B2 - LCD panel drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit provided in a television / video equipment or the like, which can display an image on a color liquid crystal panel for an NTSC broadcast system while an input video signal is in a PAL broadcast system. Liquid crystal panel drive circuit.

[0002]

2. Description of the Related Art A liquid crystal panel driving circuit of this kind is provided with an ordinary C
The main difference from the RT drive circuit is that it is necessary to apply an AC voltage instead of a DC voltage to pixels in order to prevent the liquid crystal from being deteriorated due to an electrochemical reaction. The point is that it is necessary to regularly thin out the lines so that the number of horizontal lines matches the number of lines in the vertical direction of the color liquid crystal panel for the NTSC broadcasting system.

A conventional liquid crystal panel driving circuit will be described with reference to FIGS. In the circuit example given here, from the viewpoint of preventing flicker on the screen, the polarity of the voltage applied to the pixels of the color liquid crystal panel is inverted for each field and for each line, and the lines thinned out between the odd field and the even field are used. I'm different. Specifically, the sixth line of every nine lines in the odd field and the third line of every nine lines in the even field are thinned out (hereinafter, for convenience of explanation, this is referred to as a thinned line).

FIG. 6 is a block diagram of a liquid crystal panel drive circuit. An input video signal of the PAL broadcast system is introduced to a video demodulation circuit 1. The video demodulation circuit 1 demodulates the input video signal to generate an RGB signal (see FIG. 8) and outputs the signal to the inverting circuit 2. The inverting circuit 2 inverts the polarity of the R, G, and B signals to generate R ', G', and B 'signals (see FIG. 8).
The signal is output to the RGB alternation circuit 3 together with the RGB signals.

[0005] The RGB alternation circuit 3 is composed of three analog switches, and includes an RGB signal and an R'G 'signal.
The B ′ signal is alternately switched with the CLY signal (1) described later, and is output to the RGB rotation circuit 4 as R / R ′, G / G ′, B / B ′ signals.

[0006] The RGB rotation circuit 4 is also composed of analog switches and the like, and R / R '· G /
Together replaced at the timing indicated by the D _X signal described later the order of G '· B / B' signal, and outputs the X driver circuit 5 as VID1 · 2 · 3 signals.

[0007] The X driver circuit 5 and the Y driver circuit 6 are connected to a color liquid crystal panel 7. FIG. 7 is a circuit diagram of a peripheral circuit of the color liquid crystal panel. The color liquid crystal panel 7 will be described with reference to FIG.

The color liquid crystal panel 7 is of a TFT active matrix type, which is arranged in a horizontal direction (X direction).
A plurality of RGB pixels are arranged in the vertical direction (Y direction). The first line in the horizontal direction is 2 in RGB order.
The third line is arranged in the order of GBR / BRG, and the subsequent lines are arranged in a matrix of pixels by repeating the above.

Each of the X driver circuits 5 comprises an X shift register 51 and a sample holder 52 having the same number of circuits as the number of pixels in the horizontal direction (X direction) of the color liquid crystal panel 7. The X shift register 51, a D _x signals and shift the transfer clock is shifted start pulse CL
While the X1 to X4 signals are introduced, the sample holder 52
Has a set of three circuits corresponding to the RGB pixels.
ID1, 2 and 3 signals are respectively introduced.

Each of the Y-triver circuits 6 comprises a Y-shift register 61 and a buffer 62 having the same number of circuits as the number of pixels of the color liquid crystal panel 7 in the vertical direction. The Y shift register 61, CLY signal has been introduced a D _Y signal and the shift transfer clock is shifted start pulse.

On the other hand, the input video signal is input not only to the video demodulation circuit 1 but also to a synchronization signal generation circuit 8 as shown in FIG. The synchronizing signal generation circuit 8 outputs H from the input video signal.
The SYNK signal (horizontal synchronization signal) and the V SYNK signal (vertical synchronization signal) are extracted and output to the reference pulse generation circuit 90.

The reference pulse generating circuit 90 receives the H SYNK signal and V
Reference pulse, i.e., D _x signals as described above for operating the X · Y driver circuits 5 and 6 or the like based on the SYNK signal, C
LX1~4 signal, D _Y signal, CLY signal, a digital circuit for generating CLY (1) signal and the like.

FIG. 8 is a timing chart of main signals in the liquid crystal panel drive circuit, which also includes a signal generated by the reference pulse generation circuit 90. D _x signal, as shown in the figure is a pulse that is substantially synchronized with the H SYNK signal has a signal pulse has been erased in the thinning lines. The CLY signal is basically a clock inverted at the timing indicated by the H SYNK signal, but is a signal obtained by delaying the clock by 1H (H: horizontal scanning period) in the thinning line. The _DY signal is a signal that outputs a pulse every time the field changes. Although not shown in FIG. 8, the CLY (1) signal is a signal obtained by inverting the CLY signal every time the field changes.

Next, the operation of the liquid crystal panel drive circuit configured as described above will be described. First, when the H SYNK signal becomes active on the first line of the odd field on the input video signal, the CLY signal and the CLY signal (1)
And the _Dx signal changes. At this time, the CLY signal and CL
Since the Y signal (1) is L, the signals output from the RGB alternation circuit 3 are the RGB signals. In addition, the RGB signals appear in the VID 1, 2, and 3 signals output from the RGB rotation circuit 4.

After the R, G, and B signals are once taken into the sample holder 52, the X signals that operate in accordance with the CLX1 to 4 signals are output.
The shift register 51 sequentially reads the sample holder 52 from left to right in the drawing, and applies the voltages of the R, G, and B signals to the R, G, and B pixels of the first line on the color liquid crystal panel 7 respectively. Is done.

Next, for the second line of the odd field on the input video signal, when the H SYNK signal becomes active again, the CLY signal changes to H, so that the output from the RGB alternation circuit 3 is R '. -It becomes G'-B 'signal. At the same time, the _Dx signal becomes active,
As a result of the change of the contact point of the B rotation circuit 4, G ', B', R '
A signal appears. The voltage of this signal is applied to the color liquid crystal panel 7.
The process applied to the second line above is the same as above. However, although the pixel arrangement of the second line is different from that of the first line, since the order of the signals is changed by the RGB rotation circuit 4, the GBR of the second line is changed.
The corresponding G ', B', R 'signal voltage is applied to each pixel.

The same applies to the third and subsequent lines of the odd field on the input video signal, so that the sixth line which is a thinned line will be described. 6 line is different from other lines, CLY signal and D _x signal does not change. Therefore, from the fifth line to the sixth line, the Y shift register 6 is not shifted and is held in the immediately preceding state, while the RGB signals latched in the sample holder 52 are read out again. The data is written again on the fifth line on the color liquid crystal panel 7. In this way, the sixth line of the odd field of the input video signal is thinned.

On the other hand, the even field is the same as the odd field, except that the thinning line is different and the CLY signal (1) is inverted every time the field changes. By comparison, the polarities of the voltages applied to the RGB pixels of the color liquid crystal panel 7 are inverted.

[0019]

However, in the case of the above-mentioned conventional example, although the voltage applied to each pixel of the color liquid crystal panel 7 is inverted for each field and for each line, FIG. As shown, there is a disadvantage that the positive voltage may be applied to the RGB pixels of the color liquid crystal panel 7 for a period of 2H in the thinned line on the input video signal and the line immediately before the thinned line. Therefore, if a still image is continuously displayed for a long time, there is a problem that not only the RGB pixels of the color liquid crystal panel 7 are deteriorated, but also a long-time afterimage occurs, which affects the image quality.

The present invention has been made under the above-mentioned background, and an object of the present invention is to provide a liquid crystal panel driving circuit which does not cause the above-mentioned disadvantages.

[0021]

According to the liquid crystal panel driving circuit of the present invention, the input video signal is in the PAL broadcasting system, but the nth line of the field is regularly thinned out, so that the NTSC broadcasting system is used. A liquid crystal panel display circuit for displaying an image on a color liquid crystal panel for color display and for inverting the polarity of a voltage applied to the pixels of the color liquid crystal panel for each field and for each line. A synchronizing signal generating circuit for separating the vertical synchronizing signal and outputting the separated signal; an XY driver circuit having an XY shift register connected to the color liquid crystal panel;・ Y
A circuit for generating a pulse signal for operating a shift register or the like, wherein when an input video signal is an n-th line of a field, an X shift register start pulse is stopped and this signal is used as a _DX signal. Is delayed by one horizontal scanning period to be a CLY signal. When the input video signal advances from the (n-1) th line to the nth line of the field, the CLY signal is A reference pulse generating circuit that generates a signal inverted before and after this and each time the field changes and outputs the inverted signal as a CLY (2) signal, and a video demodulator that demodulates an input video signal to generate an RGB signal. A circuit, an inverting circuit for inverting the polarity of the R, G, and B signals to generate an R ′, G, and B ′ signal;
B signal and R'G'B signal are alternately switched at the timing indicated by the CLY (2) signal, and the switched signal is
RGB output as / R'G / G'B / B 'signal
In order to provide an alternating circuit and a signal corresponding to RGB pixels arranged differently for each line on the color liquid crystal panel, R
/ R '· G / G' · B / B ' the order of the signal interchange with the timing indicated by the D _X signal, VID1 · replacement signal
And an RGB rotation circuit for outputting RGB signals of the color liquid crystal panel via the X driver circuit as 2.3 signals.

A liquid crystal panel driving circuit according to a second aspect of the present invention provides a color liquid crystal panel for the NTSC broadcasting system by regularly thinning out the nth line of the field while the input video signal is in the PAL broadcasting system. A liquid crystal panel display circuit for displaying an image and inverting the polarity of a voltage applied to the pixels of the color liquid crystal panel for each field and for each line, and separates a horizontal / vertical synchronization signal from the input video signal. A synchronizing signal generating circuit for outputting the signal, and an X connected to a color liquid crystal panel.
An XY driver circuit having a Y shift register, and a circuit for generating a pulse signal for operating the XY shift register or the like based on a horizontal / vertical synchronization signal, wherein an input video signal is an nth line of a field , Then X
While this stops the shift register start pulse and D _X signal, the Y and Y shift register transfer clock to be introduced into the shift register delay by one horizontal scanning period which was the CLY signal, Alternatively, the input video signal While generating an MK signal that becomes active at the time of the n-th line of the field, every time the field changes, the CK signal is generated.
A reference pulse generation circuit for generating an inverted LY signal and outputting the inverted signal as a CLY (2) signal; a video demodulation circuit for demodulating an input video signal to generate an RGB signal;
An inverting circuit for inverting the polarity of the G / B signal to generate an R ′, G ′, B ′ signal, and an R, G, B signal and an R ′, G ′,
The B ′ signal is alternately switched at the timing indicated by the CLY (1) signal, and the switched signal is changed to R / R ′ · G / G ′ · B /
An RGB alternation circuit for outputting as a B 'signal;
A mute circuit that forcibly clamps the voltage of the G / G '/ B / B' signal to the common voltage at the timing indicated by the MK signal, and signals corresponding to RGB pixels arranged differently for each line on the color liquid crystal panel To give R / R '
G / G '· B / B ' sequence of the signal replacement at the timing indicated by D _X signals, interchanged signals respectively output the RGB pixels of the color liquid crystal panel via the X driver circuit as VID1 · 2 · 3 signals A liquid crystal panel drive circuit, comprising:

[0023]

Embodiments of a liquid crystal panel drive circuit according to the present invention will be described below with reference to the drawings. The circuit of the embodiment described here is basically the same as the conventional circuit, and therefore, there are some parts that are redundantly described. However, the same circuit configuration is indicated by the same numeral and will be described in detail below.

The circuit of the present embodiment reverses the polarity of the voltage applied to the pixels of the color liquid crystal panel for each field and for each line from the viewpoint of preventing flickering of the screen, etc. Also, the third circuit of every nine lines in the even field is thinned out (hereinafter, for convenience of explanation, this is referred to as a thinned line) in the same manner as the conventional circuit.

FIG. 1 is a block diagram of a liquid crystal panel drive circuit. An input video signal of the PAL broadcast system is introduced to a video demodulation circuit 1. The video demodulation circuit 1 demodulates the input video signal to generate R, G, and B signals, and converts the signal to a characteristic of the color liquid crystal panel 7 by a built-in clamp circuit, white balance circuit, and gamma correction circuit. And outputs the result to the inverting circuit 2.

The inverting circuit 2 inverts the polarity of the R, G and B signals to generate R ', G' and B 'signals, and converts the signals to R, G and B signals.
Output to the RGB alternation circuit 3 together with the B signal. In addition,
_Assuming that V _cc is the power supply voltage, in the case of normally white, 1
/ 2V _cc ~V voltage between _c is negative, the voltage between the 0 to 1 / 2V _cc a positive electrode, the positive polarity signal and a negative polarity signal 1
/ _Vcc is symmetrical. On the other hand, in the case of normally black, the above is completely opposite.

FIG. 2 is a circuit diagram showing peripheral circuits of the RGB alternation circuit. As shown in this figure, the RGB alternation circuit 3
A circuit having three 2-input / 1-output analog switches, wherein an R / G / B signal and an R '/ G' / B 'signal are alternately switched at a timing indicated by a CLY signal (2) described later. The signal is output to the RGB rotation circuit 4 as an R / R'.G / G'.B / B 'signal. As shown in FIG. 2, when the CLY signal (2) is at the H level, the R ', G', and B 'signals are output. Similarly, when the CLY signal (2) is at the L level, the R, G, and B signals are output. Output.

The RGB rotation circuit 4 comprises three-input and one-output analog switches 41, 42, 43 and a flip-flop 44 as shown in FIG. 2, and R / R'.G as shown in FIG. / G '· B / B' the order of the signals with interchanged at the timing indicated by the D _x signal described later, VI
The signals are output to the X driver circuit 5 as D1, 2 and 3 signals.

The RGB rotation circuit 4 will be described in detail with reference to FIG. When D _x signal becomes active, the signal is flip-flop 44 holds, whenever the D _x signal becomes active, the analog switches 41, 42 and 43
Are toggling in the order of a, b, and c. When the analog switches 41, 42 and 43 are a contacts,
R / R ', G / G', B / B 'signals are VID1, 2, 3
Signal, and similarly, at the time of the b contact, VID3.1.
2 signals, and VID2.3.1 signals when the contact is c. The RGB rotation circuit 4 applies corresponding RGB signals to the RGB pixels arranged on the color liquid crystal panel 7.

The X driver circuit 5 and the Y driver circuit 6 are connected to a color liquid crystal panel 7. The X driver circuit 5 and the Y driver circuit 6 have an X shift register and a Y shift register. The color liquid crystal panel 7 is for the NTSC broadcasting system, and the R, G, and B pixels are arranged in the vertical direction (X Direction) and a horizontal direction (Y direction) to form a mosaic structure. Note that the X driver circuit 5, the Y driver circuit 6, and the color liquid crystal panel 7 are the same as the conventional circuit described with reference to FIG.

The input video signal is input not only to the video demodulation circuit 1 but also to a synchronization signal generation circuit 8 as shown in FIG. The synchronization signal generation circuit 8 is a synchronization separation circuit, and the input video signal is converted from the input video signal to the H SYNK signal (
A horizontal synchronizing signal) and a V SYNK signal (vertical synchronizing signal) are separated and output to the reference pulse generating circuit 9.

The reference pulse generating circuit 9 has an H-PLA 91,
A digital circuit comprising a V-PLA 92, a clock signal generation circuit 93, and a thinning controller 94,
XY driver circuit 5 based on the signal and the V SYNK signal,
A reference pulse for operating the six X / Y shift registers 51, 61, etc. is generated.

More specifically, the H SYNK signal and the V SYNK signal are guided to the clock signal generation circuit 93 via the H-PLA 91 and the V-PLA 92. The clock signal generation circuit 93
Recognizing the current field and the scanning lines on the basis of the H SYNK signal and V SYNK signal, D _x signal, CLX1～4
Signal, D _Y signal, and generates a CLY signal or the like. On the other hand, the data of the thinning line is stored in the thinning controller 94 in advance, and the CLY (2) signal is generated based on the signal derived from the clock signal generating circuit 93.

FIG. 3 is a timing chart of main signals in the circuit of the embodiment. Although there is no difference from the conventional circuit except for the CLY signal (2) signal, the reference pulse generating circuit 9 will be described with reference to FIG. The top row of FIG. 3 shows the numbers of the horizontal lines of the field on the input video signal.

[0035] D _x signal is a pulse that is substantially synchronized with the H SYNK signal, not shown, has a deleted signal pulses to be output at a thinning line. The signal is guided to the RGB rotation circuit 4. However, the X shift register 51
The shift start input of (see Fig. 7)
A pulse synchronized with the signal is guided.

The CLY signal is a clock inverted at the timing indicated by the H SYNK signal, and is a signal obtained by delaying the clock by 1H (H: horizontal scanning period) on the thinning line. Of the shift transfer clock input. Incidentally, CLX1～4 signal generated by the reference pulse generating circuit 90, so the description about D _Y signal is the same as the conventional omitted.

On the other hand, the CLY (2) signal is basically a CLY signal.
Although the signal is synchronized with the signal, the signal is changed in the thinning line. That is, the signal is forcibly changed between the fifth and sixth lines of the odd field and between the second and third lines of the even field, and the signal is inverted every time the field changes. Let me.

The characteristic operation of the circuit of the embodiment configured as described above will be described. On the sixth line of the odd field on the input video signal, like the conventional circuit,
Since CLY signal and D _x signal does not change, Y shift register 6 well into the sixth line is held in the state immediately before is not shifted, as a result, the lines are thinned out. This is the same as the conventional circuit. However, the difference from the conventional circuit is that when the line proceeds from the fifth line to the sixth line in the odd field, the contact of the RGB alternation circuit 3 changes with the change of the CLY (2) signal at this point, and the sixth line Is that the R ', G', and B 'signals are written again to the fifth line on the color liquid crystal panel 7 via the sample holder 52. That is, for the fifth line and the sixth line of the odd field on the input video signal, the signal voltage is applied to the RGB pixels of the fifth line on the color liquid crystal panel 7 in an overlapping manner. Unlike the conventional circuit, the same polarity voltage is applied to each pixel of the color liquid crystal panel 7 because the R, G, and B signals have a positive polarity, while the latter has a R, G, and B 'signal, which is a negative polarity. It is no longer applied during the 2H period.

In FIG. 3, the VID 1, 2,... Signals on the fifth and sixth lines on the input video signal appear to have the same polarity, but the color liquid crystal panel to which the voltage is applied. There is no problem because the line on 7 is different. The same applies to the other thinned lines of the odd field and the thinned lines of the even field.

Next, a modified example of the circuit of the embodiment will be described with reference to FIGS. FIG. 4 is similar to FIG.
FIG. 5 is a circuit diagram showing a peripheral circuit of the alternating circuit, and FIG. 5 is a timing chart of main signals of the liquid crystal drive panel as in FIG.

The circuit of this modified example is different from that of the above-described embodiment in that the RGB alternation circuit 3 can be switched by the CLY (1) signal used in the conventional circuit instead of the CLY (2) signal. And the point that the reference pulse generation circuit 9 newly generates an MK signal that becomes active in the thinning line instead of the CLY (2) signal, and that R / R ′ · G / G ′ · B at the timing indicated by the MK signal. The point is that a mute circuit 10 for clamping the voltage of the / B 'signal to the common voltage is newly added. Here, the common voltage is a center voltage between the positive electrode and the negative electrode, specifically, 1/2 V _CC .

That is, since the RGB alternation circuit 3 is switched at the timing indicated by the CLY (1) signal, it is output from the RGB alternation circuit 3 at the fifth and sixth lines of the odd field on the input video signal. The signal becomes an RGB signal. When the sixth line, which is a thinning line, is reached, the mute circuit 10 operates. Therefore, the voltage applied to the fifth line of RGB pixels on the color liquid crystal panel 7 is substantially It becomes upper zero. The same applies to the other thinning lines, so that the same advantages as the circuit of the embodiment can be obtained.

The liquid crystal panel drive circuit according to the present invention is not limited to the above embodiment, but can be applied to any type of liquid crystal panel.

[0044]

As described above, the liquid crystal panel driving circuit according to the first and second aspects of the present invention provides a liquid crystal panel driving circuit for a color liquid crystal panel on a thinned line on an input video signal and a line immediately before the thinned line.
Since the same polarity voltage is not applied to the B pixel for 2H period, unlike the conventional circuit, the pixel on the color liquid crystal panel may be deteriorated even if the still image is continuously displayed for a long time. Since there is no residual image, the image quality is good, and the performance as a circuit can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of a circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a peripheral circuit of an RGB alternating circuit.

FIG. 3 is a timing chart of main signals in the example circuit.

FIG. 4 is a diagram corresponding to FIG. 2 for describing a modification of the circuit of the embodiment.

FIG. 5 is a diagram corresponding to FIG. 3;

FIG. 6 is a block diagram of a conventional liquid crystal panel drive circuit.

FIG. 7 is a circuit diagram of a peripheral circuit of the color liquid crystal panel.

FIG. 8 is a view corresponding to FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Video demodulation circuit 2 ... Inversion circuit 3 ... RGB alternation circuit 4 ... RGB rotation circuit 5, 6 ... X and Y driver circuit 7 ... Color liquid crystal panel 8 ... Synchronous signal generation circuit 9 ... Reference pulse generation circuit

Claims (2)

(57) [Claims] An image is displayed on a color liquid crystal panel for the NTSC broadcasting system by regularly thinning out the nth line of the field while the input video signal is in the PAL broadcasting system, and the color liquid crystal panel is used for the display. A liquid crystal panel display circuit for inverting the polarity of the voltage applied to the pixels for each field and for each line, separating a horizontal / vertical synchronization signal from the input video signal and outputting the signal; An XY driver circuit having an XY shift register connected to a color liquid crystal panel, and a circuit for generating a pulse signal for operating the XY shift register or the like based on a horizontal / vertical synchronization signal, when the input video signal is a n-th line of the field, whereas it stops the X shift register start pulse and D _X signal, The Y shift register transfer clock to be introduced into the Y shift register is delayed by one horizontal scanning period, and this is used as a CLY signal. Apart from this signal, the input video signal advances from the (n-1) line to the nth line in the field. Occasionally, the CLY signal is inverted before and after this, and an inverted signal is generated each time the field changes.
(2) A reference pulse generation circuit that outputs a signal, a video demodulation circuit that demodulates an input video signal to generate an RGB signal, and a R ′ • B signal that inverts the polarity of the RGB signal.
An inverting circuit for generating the G 'and B' signals, and the R, G and B signals and the R ', G' and B 'signals are alternately switched at the timing indicated by the CLY (2) signal. R '・
An RGB alternation circuit for outputting the signals as G / G 'and B / B' signals, and R / R 'and R / R' signals for providing signals corresponding to RGB pixels arranged differently for each line on the color liquid crystal panel.
G / G '· B / B ' sequence of the signal replacement at the timing indicated by D _X signals, interchanged signals respectively output the RGB pixels of the color liquid crystal panel via the X driver circuit as VID1 · 2 · 3 signals A liquid crystal panel drive circuit, comprising: 2. An image is displayed on an NTSC broadcast color liquid crystal panel by regularly thinning out an nth line of a field while an input video signal is in a PAL broadcast method, and the color liquid crystal panel is used. A liquid crystal panel display circuit for inverting the polarity of the voltage applied to the pixels for each field and for each line, separating a horizontal / vertical synchronization signal from the input video signal and outputting the signal; An XY driver circuit having an XY shift register connected to a color liquid crystal panel, and a circuit for generating a pulse signal for operating the XY shift register or the like based on a horizontal / vertical synchronization signal, when the input video signal is a n-th line of the field, whereas it stops the X shift register start pulse and D _X signal, The transfer clock for the Y shift register introduced into the Y shift register is delayed by one horizontal scanning period, and this is used as a CLY signal. Apart from this, an MK signal that becomes active when the input video signal is the nth line of the field is generated. On the other hand, a reference pulse generating circuit that generates a signal obtained by inverting the CLY signal every time the field changes and outputs it as a CLY (2) signal, and a video demodulation that demodulates an input video signal to generate an RGB signal. Circuit and invert the polarity of the R, G, B signals to produce R ', G',
An inverting circuit for generating a B ′ signal;
G / B ′ signals are alternately switched at the timing indicated by the CLY (1) signal, and the switched signals are R / R ′ · G /
An RGB alternation circuit for outputting as a G ′ · B / B ′ signal;
A mute circuit for forcibly clamping the voltage of the R / R ', G / G', B / B 'signal to the common voltage at the timing indicated by the MK signal, and a RGB circuit arranged differently for each line on the color liquid crystal panel. To give a signal corresponding to the pixel,
The order of R / R '· G / G ' · B / B ' signals interchanged at the timing indicated by the D _X signal, a replacement signal VID1
A liquid crystal panel drive circuit, comprising: an RGB rotation circuit that outputs each of the signals as RGB signals to RGB pixels of the color liquid crystal panel via the X driver circuit.