JPH05313614A - Driving circuit for dot matrix type liquid crystal display panel - Google Patents

Abstract

PURPOSE:To enable an alternating-current driving by which polarities of respective scanning lines of a dot matrix type liquid crystal display panel are inverted for every field without using a complicated circuit configuration. CONSTITUTION:The driving circuit of a display panel 16 which performs successively scanning display based on jumping scanning video signals is providced with a first and a second sampling/holding circuit groups 42 and 44, which samples and holds the non-inverted and inverted jump scanning video signals, and a changeover switch group 46, which switches the holding data of the groups 42 and 44 in accordance with the output timing of the scanning signals of a vertical driver 18 and outputs them to a signal electrode group. Display data of each scanning line corresponding to odd and even fields are outputted to the signal electrode group as display data in which polarities of continuous two scanning lines are inverted and a display based on the display data in which polarities of respective scanning lines are inverted for every field.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a drive circuit of a dot matrix type liquid crystal display panel for performing progressive scanning (non-interlaced) display based on an interlaced video signal. Is.

[0002]

2. Description of the Related Art Conventionally, a driving circuit of this type of dot matrix type liquid crystal display panel has been constructed as shown in FIG. That is, the sample hold circuit group 12 of the horizontal driver (for example, source driver) 10 is shown in FIG.
The display data 1 (-), 2 (+), 3 (-), ... Of one scanning line of the interlaced scanning video signal sample-held during one horizontal scanning period (1H) as shown in ,
The figure for the vertical driver 18 to scan two scanning lines during one horizontal scanning period (1H) while outputting to the signal electrode group of the dot matrix type liquid crystal display panel 16 via the output circuit group 14. By outputting scanning signals (1), (2), (3), ... As shown in FIG. 5B to the scanning electrode group of the dot matrix type liquid crystal display panel 16,
Sequential scanning display is performed based on the interlaced scanning video signal.

For example, an NTSC signal having 262.5 scanning lines in one field is approximately doubled to a 480 dot (line) vertical dot matrix type liquid crystal display panel (horizontal is 64).
(0 dot) 16 was displayed. The dot matrix type liquid crystal display panel 16 is formed in an active matrix type in which a TFT (thin film transistor) group as a switch element is provided at an intersection of a signal electrode group and a scanning electrode group, and a signal electrode is provided at a source of each TFT. The gate is connected to the scan electrode, and the drain is connected to the common power source.

Interlaced NT
In SC signal, 1 scan line (1 line) in even field and odd field to make flicker inconspicuous
It is necessary to shift the minute display position. That is, as shown in FIG. 6, NT having 262.5 scanning lines in one field
Regarding the odd field of the SC signal, the scanning lines 1 and 2 of the dot matrix type liquid crystal display panel 16 display the display data 1, the scanning lines 3 and 4 display the display data 2, and so on. For the dot matrix type liquid crystal display panel 16, the scanning lines 2 and 3 display the display data 263, the horizontal scanning lines 4 and 5 display the display data 264, and so on.

Further, it is necessary to drive the liquid crystal cell of the dot matrix type liquid crystal display panel 16 by alternating current in order to reduce the residual DC voltage to the liquid crystal cell and prevent the deterioration of the liquid crystal. That is,
As shown in FIG. 4A, the signal processing circuit 20 provided in the preceding stage of the horizontal driver 10 inverts the polarity of the interlaced scanning video signal for each scanning line to convert it into an alternating current, and the converted video signal is converted into an alternating current. Display data obtained by sample hold 1
(−), 2 (+), 3 (−), ... Are output to the signal electrode group of the dot matrix type liquid crystal display panel 16. In FIG. 4A, 22 is a horizontal synchronizing signal H.V. S and vertical sync signal V.S. A timing signal generation circuit that outputs a predetermined timing signal to the horizontal driver 10 and the vertical driver 18 based on S and the like.

[0006]

However, the sample and hold circuit group 12 and the output circuit group 14 of the horizontal driver 10 are conventionally arranged in the signal electrodes of the dot matrix type liquid crystal display panel 16 as shown in FIG. 4B. Sample and hold circuit 12 provided corresponding to each of the groups
_1, 12 _2, ... and the output circuit 14 _1, 14 _2, consists of ..., the output circuits 14 _1, ... non-inverting buffer 24, because consists of ..., interlaced input to the sample-hold circuit group 12 Even if the scanning video signal is converted into alternating current by reversing the polarity for each scanning line, scanning lines whose polarities are not reversed are formed in the dot matrix type liquid crystal display panel 16, and the deterioration of the liquid crystal cell corresponding to these scanning lines occurs. However, there is a problem in that it progresses and the life is shortened.

That is, the switches Sa ₁ and Sa ₂ are alternately turned on and off in a cycle of one horizontal scanning period (1H) to sample a video signal whose polarity is inverted for each scanning line to form a capacitor C ₁ accumulated alternately C _2, the display data 1 accumulated in the capacitor C ₁ and C ₂ (-), ₂
(+) 3 (-), ..., and 1 horizontal scanning period (1H) alternately turned on at a period of off switches Sb ₁ and Sb ₂ dot matrix type via the output circuit 14 ₁ is switched alternately on the LCD The output is made to the gate of the TFT of the display panel 16.

Therefore, the polarities of the display data output to the scanning lines of the odd field and the even field forming one frame of the dot matrix type liquid crystal display panel 16 are as shown in FIG. The polarity of the scanning lines 5, 4, ... Is reversed, but the polarity of the scanning lines 2, 4, 6, ... Is not reversed.

In addition to the above configuration, display data for one scanning line is written into a memory and read from this memory at a speed twice as high as the writing time to obtain display data for two scanning lines. Minute display data is created as two types of polarities, inverted and non-inverted, and the display data corresponding to the two types of polarities are switched at the timing of 1/2 horizontal scanning period (1 / 2H). Some output signals are output to the display electrodes, but the circuit configuration is complicated.

The present invention has been made in view of the above problems, and a dot matrix type liquid crystal display panel capable of AC driving in which the polarities of all scanning lines are inverted for each field without complicating the circuit configuration. It is intended to provide a driving circuit.

[0011]

According to the present invention, a vertical driver scans two scanning lines while a horizontal driver outputs display data for one scanning line of an interlaced scanning video signal to a signal electrode group. In the drive circuit of the dot matrix type liquid crystal display panel, which is configured to perform sequential scanning display based on the interlaced scanning video signal by outputting a scanning signal for scanning to the scanning electrode group, the horizontal driver includes the interlaced scanning. A vertical sampling driver for sampling and holding a scanning video signal; and a second sampling and holding circuit for sampling and holding an inversion signal of the interlaced scanning video signal. The data held in the first sample hold circuit and the second sample hold circuit are switched according to the output timing and output to the signal electrode group. And it is characterized in that formed by providing the selector switch because.

[0012]

The first sample and hold circuit of the horizontal driver samples and holds the interlaced scanning video signal, and the second sample and hold circuit samples and holds the inverted signal of the same interlaced scanning video signal, and these samplings are performed. The data is alternately switched by the changeover switch and output to the signal electrode group of the dot matrix type liquid crystal display panel. The changeover switch is switched in accordance with the output timing of the scan signal output to the scan electrode group for the vertical driver to scan two scan lines.

Therefore, the non-inverted first sampling data for one scanning line and the inverted second sampling data sampled and held by the first and second sample and hold circuits are switched at the output timing of the scanning signal. Output to the signal electrode group. Therefore, on the display screen of the dot matrix type liquid crystal display panel, the display data of each scanning line corresponding to each of the odd field and the even field of the interlaced scanning video signal is signaled as the display data of two continuous scanning lines. The display data output to the electrode group, and the display data of the two continuous scanning lines have a relationship in which the polarities are inverted to each other. Further, the display data corresponding to the odd field and the even field is displayed for one scanning line (one line). Since the positions are deviated, it is possible to perform display with display data in which the polarities are inverted for each scanning line for each field. That is, AC driving becomes possible.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a drive circuit for a dot matrix type liquid crystal display panel according to the present invention will be described below with reference to FIG. 1, the same parts as those in FIG. 4 are designated by the same reference numerals. In FIG. 1A, reference numeral 30 is a signal processing circuit for performing a predetermined signal processing (for example, amplitude level conversion processing). The signal processing circuit 30 does not invert the interlace scanning video signal and supplies the first video signal supply line. Non-inverting buffer 34 for outputting to 32
And an inversion buffer 38 which inverts the interlaced scanning video signal and outputs the inverted video signal to the second video signal supply line 36.

Reference numeral 40 denotes a horizontal driver (eg, source driver). The horizontal driver 40 samples the non-inverted video signal supplied to the first video signal supply line 32 with a predetermined dot clock to carry out one horizontal scanning period. The first sample-and-hold circuit group 42 which holds for (1H) and the inverted video signal supplied to the second video signal supply line 36 are sampled by a predetermined dot clock and held for one horizontal scanning period (1H). Second sample hold circuit group 44
And the first and second sample and hold circuit groups 42 and 44
And a output circuit group 14 connected to the output side of the changeover switch group 46. The dot matrix type liquid crystal display panel is provided on the output side of the output circuit group 14. 16 signal electrode groups are combined,
Each signal electrode is coupled to the source of each TFT provided in each pixel.

First and second sample and hold circuit group 4
2, 44, as shown in FIG. 1B, the first and second sample and hold circuits 42 ₁ , 42 ₂ , ..., 44 ₁ , 44 ₂ ,
It consists of ... The first sample hold circuit 42
₁ is switches Sa ₁₁ and Sa ₁₂ that are alternately turned on and off in a cycle of one horizontal scanning period (1H), and this switch S
and a _11, a non-inverted video signal supplied to the first video signal supply line 32 is sampled during on of Sa _12, capacitor C _11, C ₁₂ for storing a first sampling data,
In order to alternately output the first sampling data accumulated in the capacitors C ₁₁ and C ₁₂ , one horizontal scanning period (1H)
Switches Sb ₁₁ and Sb ₁₂ that are turned on and off alternately in a cycle of
It consists of The sample and hold circuit 42 ₂ ,
Also has the same configuration as the sample hold circuit 42 ₁ .

The second sample and hold circuit 44 ₁ is
Switches Sa ₂₁ and Sa ₂₂ which are alternately turned on and off in a cycle of one horizontal scanning period (1H) and these switches Sa ₂₁ and Sa.
Capacitors C ₂₁ and C ₂₂ for sampling the inverted video signal supplied to the second video signal supply line 36 and storing it as second sampling data when ₂₂ is turned on, and this capacitor C _21
21 and C ₂₂ are composed of switches Sb ₂₁ and Sb ₂₂ which are alternately turned on and off in a cycle of one horizontal scanning period (1H) in order to output the second sampling data. The second sample and hold circuits 44 ₂ , ... Have the same structure as the sample and hold circuit 44 ₁ .

The changeover switch group 46 includes the first sampling data of the first sample and hold circuits 42 ₁ , 42 ₂ , ... And the second sample and hold circuits 44 ₁ , 44 ₂ .
Changeover switches 46 ₁ and 4 for switching to the second sampling data of ... and supplying to the output circuits 14 ₁ , 14 ₂ ,.
It consists of 6 ₂ ,. The changeover switches 46 ₁ and 46
₂ , ... Are configured to be switched according to the output timing of a scanning signal (for example, a gate scanning signal) described later. The output circuits 14 ₁ , 14 ₂ , ... Are composed of non-inverting buffers 24, 24 ,.
Is formed.

18 is a vertical driver (gate driver)
In the vertical driver 18, based on the timing signal from the timing signal generation circuit 50, the horizontal driver 40 has two scanning lines in which the display data of one scanning line of the interlaced scanning video signal are inverted in polarity from each other. While being output as display data to the signal electrode side (that is, the source side of the TFT) of the dot matrix type liquid crystal display panel 16, a scanning signal for scanning two scanning lines is supplied to the dot matrix type liquid crystal display panel 16. Output to the scan electrode group. The timing signal generating circuit 50 outputs a horizontal synchronizing signal H.H. S and vertical sync signal V.S. Based on S, a predetermined timing signal is output to the horizontal driver 40 and the vertical driver 18.

Next, the operation of the above embodiment will be described with reference to FIGS. (A) The vertical driver 18 scans two scanning lines (two lines) in one horizontal scanning period (1H), as in the conventional example, as shown in FIG. ,
, (2), (3), ... Are output to the scanning electrode group of the dot matrix type liquid crystal display panel 16 to perform scanning in the vertical direction.

(B) The first sample and hold circuit group 42 of the horizontal driver 40 samples the non-inverted video signal supplied to the first video signal supply line 32 at a predetermined dot clock, and then the (a) of FIG. As shown in, the first sampling data 1 (+), 2 (+), and 3 which hold the video data of one scanning line for one horizontal scanning period (1H).
Output (+), ...

That is, the sample hold circuit 42 ₁ ,
42 ₂ , ..., Each of switches Sa ₁₁ and Sa _{12 is set} to 1
By alternately turning on and off in the cycle of the horizontal scanning period (1H), the non-inverted video signal is sampled and alternately stored in the capacitors C ₁₁ and C ₁₂ , and this capacitor C ₁₁
And a switch S for alternately turning on and off the first sampling data stored in C ₁₂ in a cycle of one horizontal scanning period (1H).
The output is switched alternately between b ₁₁ and Sb ₁₂ .

(C) The second sample and hold circuit group 44 of the horizontal driver 40 samples the inverted video signal supplied to the second video signal supply line 36 with a predetermined dot clock, and is shown in FIG. As described above, the second sampling data 1 (−), 2 (−), 3 which holds the image data of one scanning line for one horizontal scanning period (1H).
(-), ... Is output.

(D) The changeover switches 46 ₁ , 46 ₂ , ... Of the changeover switch group 46 are output by the vertical driver 18 as shown in FIG.
Scanning signals (1), (2), as shown in (d) of
(3), the display data 1 (-), 1 as shown in (c) of FIG.
(+), 2 (-), 2 (+), ... Are output to the signal electrode group (that is, each source side of the TFT group) of the dot matrix type liquid crystal display panel 16 via the output circuit group 14.

Therefore, the polarities of the display data of the respective scanning lines corresponding to the odd field and the even field of the interlaced scanning video signal are as shown in FIG. That is, the display data 1 corresponding to the video signal for interlaced scanning
(+), 2 (+), 3 (+), ... And 263 (+), 26
4 (+), 265 (+), ... Display data 1 (−), 1 (+), 2 (−), and 2 (−) of continuous two scanning lines, respectively.
2 (+), 3 (−), 3 (+), ... And 263 (−), 2
63 (+), 264 (-), 264 (+), 265
(-), 265 (+), ... Is output to the signal electrode group,
Moreover, the display data of the two continuous scanning lines are in a relationship in which the polarities are inverted with each other, and the display data corresponding to the odd field and the even field are shifted in display position by one scanning line (one line). As shown in FIG. 3, the display data of each scanning line has the polarity inverted for each field, and the AC drive is performed in which the polarity is inverted for each field.

In the above-described embodiment, each pixel formed at the intersection of the signal electrode group and the scanning electrode group has a T as a switch element.
The case where the present invention is applied to the drive circuit of the active matrix type dot matrix type liquid crystal display panel provided with the FT has been described, but the present invention is not limited to this, and the dot matrix type liquid crystal display panel other than the active matrix type. It can also be used for a drive circuit of (for example, a simple matrix type dot matrix type liquid crystal display panel).

[0027]

As described above, the dot matrix type liquid crystal display panel drive circuit according to the present invention, while the vertical driver outputs a scanning signal for scanning two scanning lines to the scanning electrode group, The changeover switch is switched in accordance with the output timing of the scanning signal, and the non-inverted display data and the inverted display data of one scanning line of the interlaced scanning video signal sampled and held by the first and second sample hold circuits are displayed. Since the data is switched and output to the signal electrode group, the following effects can be achieved.

On the display screen of the dot matrix type liquid crystal display panel, the display data of each scanning line corresponding to each of the odd field and the even field of the interlaced scanning video signal is displayed as the display data of two continuous scanning lines. The display data output to the signal electrode group and the display data of the two continuous scanning lines are in a relationship in which the polarities are inverted to each other. Further, the display data corresponding to the odd field and the even field corresponds to one scanning line (one line). Since the display positions are deviated, it is possible to display the display data in which the polarity is inverted for each field on each scanning line of the screen.

That is, it is possible to perform AC driving with the polarity reversed for each scanning line in each field. Therefore, without complicating the circuit configuration, it is possible to perform AC drive by the display data in which the polarity is inverted for each field for most of the scanning lines of the screen of the dot matrix type liquid crystal display panel, so that the deterioration of the liquid crystal cell is prevented. The life can be extended.

[Brief description of drawings]

1A and 1B show an embodiment of a drive circuit of a dot matrix type liquid crystal display panel according to the present invention, FIG. 1A is a block diagram, and FIG. 1B is a configuration diagram showing a part of FIG. 1A.

FIG. 2 is a timing chart for explaining the operation of FIG.

FIG. 3 is an explanatory diagram illustrating the operation of FIG. 1.

FIG. 4 shows a conventional example, (a) is a block diagram,
(B) is a block diagram which shows a part of (a).

FIG. 5 is a timing chart illustrating the operation of FIG.

FIG. 6 is an explanatory diagram illustrating an operation of FIG.

FIG. 7 is an explanatory diagram illustrating an operation of FIG.

[Explanation of symbols]

14 ... Output circuit group, 14 ₁ , 14 ₂ ... Output circuit, 16 ...
Dot matrix type liquid crystal display panel, 18 ... Vertical driver, 30 ... Signal processing circuit, 34 ... Non-inverting buffer, 38 ... Non-inverting buffer, 40 ... Horizontal driver,
42 ... 1st sample hold circuit group, 42 ₁ , 42 ₂ ... 1st sample hold circuit, 44 ... 2nd sample hold circuit group, 44 ₁ , 44 ₂ ... 2nd sample hold circuit,
46 ... Changeover switch group, 46 ₁ , 46 ₂ ... Changeover switch,
50 ... Timing signal generating circuit, C ₁₁ , C ₁₂ , C ₂₁ ,
C ₂₂ ... Capacitor, H. S ... Horizontal sync signal, V. S ...
Vertical sync signal, Sa ₁₁ , Sa ₁₂ , Sa ₂₁ , Sa ₂₂ , Sb
₁₁ , Sb ₁₂ , Sb ₂₁ , Sb ₂₂ ... ON / OFF switch.

Claims (2)

[Claims] 1. While the horizontal driver is outputting display data for one scanning line of an interlaced scanning video signal to a signal electrode group,
A driving circuit of a dot matrix type liquid crystal display panel, in which a vertical driver outputs a scanning signal for scanning two scanning lines to a scanning electrode group to sequentially perform scanning display based on an interlaced scanning video signal. The horizontal driver includes a first sample and hold circuit that samples and holds the interlaced scanning video signal, and a second sample and hold circuit that samples and holds an inverted signal of the interlaced scanning video signal. Then, the first driver is synchronized with the timing at which the vertical driver outputs a scanning signal.
A drive circuit for a dot matrix type liquid crystal display panel, comprising a changeover switch for switching the data held by the sample hold circuit and the second sample hold circuit and outputting the data to the signal electrode group. 2. A dot matrix type liquid crystal display panel,
2. The dot matrix liquid crystal display panel drive circuit according to claim 1, wherein the pixel is formed at the intersection of the signal electrode group and the scanning electrode group and each pixel is provided with a TFT as a switch element.