JP3371319B2 - Display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device using an active matrix type liquid crystal display panel or the like as a display. More specifically, it relates to a switching control technique between dot inversion driving and column inversion driving.

[0002]

2. Description of the Related Art In a liquid crystal display panel used as a display of a display device, the polarity of a signal voltage is inverted every field period of an image to prevent deterioration of liquid crystal characteristics. Since the field frequency is usually 60Hz, the reversal frequency is 30
It becomes Hz. Therefore, flicker of 30 Hz cycle is likely to occur. As measures against this, there are column inversion drive, row inversion drive, dot inversion drive, and the like. In each case, the flicker frequency is spatially doubled to make it inconspicuous by reversing the inversion polarity in adjacent pixels.

FIG. 10 is a schematic diagram showing column inversion driving. The liquid crystal display panel 1 has pixels 11 arranged in a matrix. In the column inversion drive, two systems of signal voltages, which are inverted in polarity for each field and have an opposite phase relationship to each other, are alternately supplied to each column of the pixels 11. As a result, the polarity of the signal voltage written in each pixel 11 is not inverted in the row (row) direction but is alternately inverted only in the column (column) direction. The polarities of the two systems of signal voltages are inverted every field period. Therefore, as the flicker characteristic, the luminance changes in the two-system signal voltage in every two field cycles. In the column inversion drive, since the flicker characteristics are spatially added together, the brightness of the display panel 1 changes as a whole in one field cycle. That is, since the flicker frequency is doubled, it can be made inconspicuous.

FIG. 11 is a schematic diagram showing row inversion driving. In this case, one horizontal period (1H) is applied to each column of the pixels 11.
A signal voltage of one system whose polarity is inverted is applied at. Further, the polarity of this signal voltage is inverted every frame. As a result, in the row inversion drive, the polarity of the signal voltage written in each pixel 11 is not inverted in the column direction but is alternately inverted only in the row direction. This inversion period is 1
H, which is shorter than the column inversion drive shown in FIG.

FIG. 12 is a schematic diagram showing dot inversion driving. The polarities are inverted every horizontal period and the phases are 180 degrees relative to each other.
° Pixel 11 with two different (reverse phase) signal voltages and
Are alternately supplied to each column. As a result, in the dot inversion drive, the polarities of the signal voltages written in the respective pixels 11 are alternately inverted in the row direction and the column direction. In other words, the phase of 18
The signal voltages different by 0 ° are distributed in a checkered pattern to each pixel (dot), and the flicker is the most inconspicuous.

[0006]

Of the three types of inversion drive methods described above, dot inversion drive is generally the most optimal in terms of image quality, followed by column inversion drive and row inversion drive. However, in practice, the optimum method differs depending on the structure of the liquid crystal display panel 1 and individual characteristic variations. For example, in the case of a display panel in which leaks between columns of pixels are large and vertical line defects are likely to occur, row inversion drive is more suitable than dot inversion drive. On the contrary, when the horizontal line defect is likely to occur due to the inter-row leakage of the pixels, the column inversion drive is more suitable than the dot inversion drive. In any of the inversion driving methods, the signal voltage supplied to the pixel column is supplied from the external column driving circuit. If the dot inversion drive and the column inversion drive or the dot inversion drive and the row inversion drive can be switched on the drive circuit side, the above-mentioned line defect can be made inconspicuous. However, in reality, it has been difficult to realize switching of the inversion driving method in the driving circuit from the viewpoint of cost and reliability. For example, when switching between dot inversion drive and row inversion drive, the former requires two systems of column drive circuits, while the latter uses only one system. Therefore, when switching to the row inversion drive mode,
A specification that can withstand the load of the liquid crystal display panel is required with only one column drive circuit. When switching between dot inversion drive and column inversion drive, the former must invert the signal voltage in the horizontal cycle, whereas the latter must invert in the vertical cycle (field cycle). Therefore, it is necessary to keep the center potential of the signal voltage constant at two different periods, which complicates the circuit configuration. 2 in the column drive circuit
Although it is possible to increase the yield of liquid crystal display panels if a built-in flicker countermeasure function that can switch between different types of inversion drive can be built, in reality, incorporating a flicker countermeasure function causes a significant increase in the cost of the column drive circuit and is difficult to realize. Met.

[0007]

Means for Solving the Problems The following means have been taken in view of the above-mentioned problems of the conventional technique. That is, the display device according to the present invention includes a display panel, a row driving circuit, and a column driving circuit as a basic configuration. The display panel has pixels arranged in rows and columns. The row driving circuit sequentially selects each row of pixels for each horizontal period. The column driving circuit alternately supplies signal voltages of at least two systems whose polarities are inverted every horizontal period and which are in an opposite phase relationship to each column of pixels. As a feature, an external inversion period conversion circuit is interposed between the column drive circuit and the display panel. The inversion period conversion circuit can be switched between the non-conversion state and the conversion state according to the control signal. In the non-conversion state, the inversion period conversion circuit supplies the two systems of signal voltages to the display panel as they are, and performs the dot inversion drive in which the polarities of the signal voltages written in each pixel are alternately inverted in the row direction and the column direction. . On the other hand, in the conversion state, the inversion period conversion circuit rearranges the signal voltages of the two systems and removes the polarity inversion of the horizontal period to supply the signal voltages of the two systems of opposite polarities to the display panel and write them to each pixel. Column inversion drive is performed in which the polarity of the signal voltage is not inverted in rows and is alternately inverted only in columns.
Specifically, the inversion period conversion circuit comprises a pair of multiplexers, and is in a non-conversion state when the control signal is at a constant level, and is in a conversion state when the control signal is level-inverted in a horizontal period. In one application example, the column driving circuit includes a serial / parallel conversion circuit that serial / parallel converts an externally input video signal to generate signal voltages of a plurality of systems. In this case, the inversion period conversion circuit processes the signal voltages of these plural systems to switch between dot inversion drive and column inversion drive.

According to the present invention, a signal voltage output from a column drive circuit is obtained by separately adding an inversion period conversion circuit composed of a pair of analog multiplexers to a display device originally provided with a dot inversion drive type column drive circuit. The dot inversion and column inversion can be freely switched while maintaining the inversion cycle of the horizontal period. This makes it possible to remove horizontal line defects by switching the liquid crystal display panel to column inversion, which is apt to cause horizontal line defects in dot inversion at the adjustment site of the display device. The dot inversion is a spatial inversion of a column inversion of a field period and a row inversion of a horizontal period. The dot inversion means that the polarities of the signal voltages are alternately reversed every 1 to 3 pixel columns. And column inversion are the same. Therefore, in order to convert the dot inversion into the column inversion, it suffices to remove the horizontal period component from the two systems of dot inversion drive signal voltages. For this purpose, the present invention adds an inversion period conversion circuit.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION The best mode for carrying out the present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of a display device according to the present invention. As shown in the figure, the display device includes a display panel 1, a row drive circuit 2, a column drive circuit 3, and an inversion period conversion circuit 4. The display panel 1 has pixels 11 arranged in a matrix in its screen. Each pixel 11 is arranged at the intersection of the row electrode X and the column electrode Y. These electrodes X and Y are exposed at the terminal portion 19 of the display panel 1. The row drive circuit 2 has each row electrode X.
, And each row of the pixels 11 is sequentially selected in each horizontal cycle. On the other hand, the column drive circuit 3 includes a pair of first column drive circuit 31 and second column drive circuit 32. These column drive circuits 31 and 32 have two systems of signal voltages A and B whose polarities are inverted every horizontal cycle and which are in an opposite phase relationship to each other.
Are alternately supplied to each column of the pixels 11. That is, the first column drive circuit 31 supplies the signal voltage A to the odd-numbered column electrodes Y, while the second column drive circuit 32 outputs the signal voltage B to the even-numbered column electrodes Y.

The inversion period conversion circuit 4, which is a characteristic element of the present invention, is interposed between the pair of column drive circuits 31, 32 and the display panel 1. The inversion period conversion circuit 4 can be switched between a non-conversion state and a conversion state according to a control signal supplied from the outside. When the inversion period conversion circuit 4 is in the non-conversion state, it supplies the two-system signal voltages A and B to the display panel 1 as they are, and the polarities of the signal voltages written in the respective pixels 11 are alternately inverted in rows and columns. Dot inversion drive. On the other hand, when in the conversion state, the inversion period conversion circuit 4 rearranges the signal voltages A and B of the two systems to remove the signal inversions of the two systems having the opposite polarities of the horizontal period and eliminates the polarity inversion of the horizontal period. The column inversion drive in which the polarity of the signal voltage supplied to each pixel 11 is not inverted in rows but is alternately inverted only in columns is performed.

FIG. 2 is a polarity reversal timing chart of the signal voltages A and B. The polarity of one signal voltage A is inverted every horizontal period. Also, the phase is 180 for each field.
° Switch. For example, the phases of the m field and the m + 1 field are 180 ° opposite to each other. The polarity of the other signal voltage B is also inverted every horizontal period, and the phase is switched by 180 ° for each field. Furthermore, the signal voltages A and B of the two systems are always in antiphase relation with each other.

FIG. 3 shows an inversion period conversion circuit 4 shown in FIG.
A specific configuration example of is shown. In this example, the inversion period conversion circuit 4 is composed of a pair of analog multiplexers 41 and 42, which are in a non-conversion state when the two-phase control signals C1 and C2 are at constant levels, and the control signals C1 and C2 are horizontal. When the level is inverted at the cycle, it is placed in the conversion state. One multiplexer 41 has two input terminals and one output terminal. Similarly, the other multiplexer 42
Also has two input terminals and one output terminal. The signal voltage A is applied to the input terminal of the multiplexer 41.
Is supplied, and the signal voltage B is supplied to the input terminal.
The output terminal selects either one of the input terminal and the input terminal according to the control signal C1. When C1 is high level, the output terminal is connected to the input terminal, and when C1 is low level, the output terminal is connected to the input terminal. Similarly, the signal voltage A is supplied to the input terminal of the multiplexer 42, and the signal voltage B is supplied to the input terminal. The output terminal is connected to the input terminal when the control signal C2 is at the high level, and is connected to the input terminal when the control signal C2 is at the low level. In the inversion period conversion circuit 4 having such a configuration, when C1 is fixed to the high level and C2 is fixed to the low level as shown in the figure, one multiplexer 41 receives the input signal voltage A as it is and outputs the output signal voltage A. Pass as'. Similarly, the multiplexer 42 passes the input signal voltage B as it is as the output signal voltage B ′. On the other hand, when the two-phase control signals C1 and C2 are level-inverted in the horizontal cycle, the signal voltages A and B of the two systems are rearranged to remove the polarity inversion component of the horizontal cycle, and the signal voltages A of the two systems of opposite polarities are removed. 'And B'are supplied to the display panel side.

FIG. 4 shows an inversion period conversion circuit 4 shown in FIG.
3 is a timing chart used for explaining the operation of FIG. As shown, when the control signals C1 and C2 are at a constant level,
The inversion period conversion circuit 4 outputs the two systems of signal voltages A and B as they are. On the other hand, when the control signals C1 and C2 are level-inverted in the horizontal period, one multiplexer 41 outputs the signal voltage A '. The horizontal periodic component is removed from the signal voltage A ′, all m fields have positive polarity, and the next m + 1 fields all have negative polarity.
The other multiplexer 42 outputs the signal voltage B '.
This signal voltage B'is negative in all m fields,
The m + 1 fields are all positive. In this way, the inversion period conversion circuit 4 rearranges the input signal voltages A and B of the two systems to generate the output signal voltages A ′ and B ′ of the two systems having mutually opposite polarities by removing the polarity inversion of the horizontal period. In the m field of the output signal voltage A ′, as shown by the white circles, the positive polarity components are alternately extracted from the two systems of input signal voltages A and B every horizontal period and arranged in order. On the other hand, in the m-th field of the output signal voltage B ′, as shown by the black circles, only the negative component is alternately extracted from the two-system input signal voltages A and B every horizontal period and arranged in sequence. As described above, the inversion period conversion circuit 4 of this embodiment is characterized in that the input signal voltages A and B of the two systems are recombined for each horizontal period by using a pair of analog multiplexers. As a result, the output signal voltages A'and B'of the two systems are respectively field-inverted and have an opposite phase relation to each other. By supplying such two-system signal voltages A ′ and B ′ to the display panel, the column inversion drive as shown in FIG. 10 becomes possible.

FIG. 5 shows an inversion period conversion circuit 4 shown in FIG.
Shows a modified example of. Corresponding parts are designated by corresponding reference numerals to facilitate understanding. The difference is that the signal voltage A is supplied to the input terminal of one multiplexer 41 and the signal voltage B is supplied to the other input terminal, whereas the multiplexer 42 supplies the input voltage B to one input terminal and the other input terminal of the multiplexer 42. The input voltage A is supplied to the input terminal. By connecting in this way, the pair of analog multiplexers 41 and 42 can be controlled by the common control signal C. In this case, as the control signal C, either one of the two-phase control signals C1 and C2 shown in FIG. 4 may be used. As described above, the inversion period conversion circuit shown in FIG. 3 uses a two-phase control signal, while the inversion period conversion circuit shown in FIG. 5 uses a single-phase control signal.

FIG. 6 is a block diagram showing an application example of the present invention. In this application example, an active matrix type liquid crystal display panel of a dot sequential scanning system is used as the display panel 1. The dot-sequential scanning method usually employs simultaneous driving of a plurality of pixels (dots). That is, signal voltages of a plurality of systems are simultaneously written to a plurality of dots in one driving cycle. This example is an example of simultaneous driving of 12 pixels (dots). That is, assuming that the three dots to which red, green, and blue (RGB) are respectively assigned are one trio, in this example, 12 system signal voltages are simultaneously written to four trios. In order to perform such 12-dot simultaneous driving, this application example includes the sample-and-hold circuit 35, the dot inversion circuit 36, and the inversion period conversion circuit 4 in addition to the display panel 1 described above. The sample and hold circuit 35 and the dot inversion circuit 36 form a column drive circuit. The dot inversion circuit 36 and the inversion period conversion circuit 4 operate according to the two-phase control signals C1 and C2.

Next, the operation of this application example will be described. The sample-and-hold circuit 35 is a kind of serial / parallel conversion circuit, which converts the video signals R, G, B, which are divided into three primary colors and input from the outside, into serial / parallel signals, and a total of 12 systems of signals. Generate voltage. That is,
The video signal R is serial / parallel converted to generate four systems of signal voltages R1, R2, R3 and R4. Similarly, the video signal G is serial / parallel converted to generate four systems of signal voltages G1, G2, G3, and G4. Further video signal B
To serial / parallel conversion to obtain four signal voltages B1,
B2, B3 and B4 are generated. For example, the dot data included in the video signal R is sequentially sampled in accordance with sampling pulses SH1, SH2, SH3, SH4 supplied from an external timing generator (not shown), and then held to hold the signal voltages R1 to R4 of four systems. Serial / parallel conversion to R4. The fifth sampling pulse SH5 is a resampling pulse for performing accurate sampling / holding. The total twelve systems of signal voltages R1 to B4 thus obtained are applied to the dot inversion circuit 3 of the next stage.
6, the polarity is inverted every horizontal period, and the level is amplified to a level required for driving the display panel 1. Corresponding to the twelve system signal voltages R1 to B4 input to the dot inversion circuit 36, the twelve system output signal voltages that have been AC-converted and amplified are represented by R1 ′ to B4 ′. R
The polarities of 1 ', R2', R3 'and R4' are inverted in the horizontal period. Further, R1 'and R2' are in opposite phase relation to each other, and R3 'and R4' are also in opposite phase relation to each other. R
1'and R3 'have an in-phase relationship, and R2' and R4 'also have an in-phase relationship. The same applies to the set of G1 'to G4' and the set of B1 'to B4'. The twelve systems of signal voltages R1 'to B4' thus formed for dot inversion driving are input to the inversion period conversion circuit 4 in the next stage, and the horizontal period component contained in each signal voltage is removed as necessary. Thus, the dot inversion drive can be switched to the column inversion drive. Twelve system signal voltages R1 ′ to B4 ′ input to the inversion period conversion circuit 4.
Corresponding to, the output signal voltage is represented by R1 ″ to B4 ″. These twelve lines of output signal voltages R1 ″ to B
4 ″ is supplied to the display panel 1. Inversion period conversion circuit 4
Includes six pairs of analog multiplexers shown in FIG. For example, the first pair of multiplexers rearranges the signal voltages R1 'and R2' having opposite phases to each other and converts them into output signal voltages R1 "and R2". Similarly,
The second pair of multiplexers are R3 'which are in opposite phase relation to each other.
And R4 'are multiplexed to form R3 "and R3".
4 ″. Similarly, the multiplexer of the sixth pair processes B3 ′ and B4 ′ which are in the opposite phase to each other and converts them into B3 ″ and B4 ″.

By the way, in this application, the video signal input from the outside is sampled / held and then multiplexed. In this sample / hold, for example, in the case of the video signal R, the dot data is distributed to the first signal voltage R1 according to the first sampling pulse SH1. The dot data is sequentially set to R2 according to SH2.
The dot data is distributed to R4 according to SH3, and the dot data is distributed to R4 according to SH4. The same applies to the video signals G and B. In this way, the dot data is serial / parallel converted and distributed to R1 to R4 in accordance with the pixel (dot) arrangement order along the row direction. Thereafter, when column inversion is performed instead of dot inversion, R1 and R2 are rearranged by a multiplexer every horizontal period. R3 and R4 are also rearranged every horizontal cycle. Therefore, when R1 to R4 pass through the multiplexer, the arrangement order of the dot data previously set in the sample / hold is R for each line (one pixel row).
It will be replaced by 1 "and R2". Similarly, there is a switch between R3 ″ and R4 ″. In order to prevent this replacement in advance, an analog switch 37 is provided in this application example.
SH1 for each line (for each horizontal cycle) according to the control signal C1
And SH2 are alternately switched, and SH3 and SH4 are similarly alternately switched.

FIG. 7 is a modification of the application example shown in FIG. 6. Corresponding parts are designated by corresponding reference numerals to facilitate understanding. In this example, the signal voltages R1 to B4 of the twelve systems output from the dot inversion circuit 36 are first subjected to multiplexing processing in the inversion period conversion circuit 4 and then sampled.
It is input to the AND-hold circuit 35. Like this
If a multiplexer is inserted before sample / hold, it is not necessary to switch between SH1 and SH2 and SH3 and SH4 for each line, and the circuit configuration can be simplified as compared with the circuit configuration shown in FIG.

FIG. 8 is a circuit diagram showing a specific configuration example of the display panel 1 shown in FIGS. 6 and 7. As shown in the figure, in the screen of the display panel 1, column electrodes Y and row electrodes X are arranged in a cross manner. A pixel 11 is arranged at each intersection of the column electrode (signal line) Y and the row electrode (scanning line) X. Each pixel is composed of a combination of a fine liquid crystal cell LC and a switching element. In this example, the switching element is composed of a thin film transistor Tr, the gate electrode thereof is connected to the corresponding row electrode X, the source electrode thereof is connected to the corresponding column electrode Y, and the drain electrode constitutes one terminal of the corresponding liquid crystal cell LC. Connected to the pixel electrode. A counter electrode 12 that constitutes the other terminal of the liquid crystal cell LC is provided. A predetermined voltage Vcom is externally applied to the counter electrode 12. A storage capacitor Cs is also connected in parallel with the liquid crystal cell LC. A V shift register 13 is connected to one end of the row electrode X, and sequentially outputs a gate pulse every horizontal period according to a timing signal supplied from an external timing generator (not shown). In response to the gate pulse, the thin film transistor Tr becomes conductive, and each row of pixels is sequentially selected. Each column electrode Y is connected to the video line 14 via a horizontal switch HSW as a set of 12 electrodes. The video line 14 is divided into 12 lines, and the signal voltages R1 ″ to B4 ″ of the twelve lines supplied from the inversion period conversion circuit side.
Accept. As described above, the 12 systems of signal voltages R1 ″ to B4 ″ are subjected to a predetermined sample / hold process in order to simultaneously drive 12 pixels. The horizontal switch HSW is controlled to be opened and closed by the write pulse sequentially output from the H shift register 15, and the signal voltages R1 ″ to B
The dot data included in 4 ″ is simultaneously taken in and written in the corresponding pixel row in synchronization with the above-described sequential selection. The H shift register 15 sequentially outputs write pulses in accordance with the timing signal supplied from the timing generator. .

FIG. 9 shows the sample shown in FIGS. 6 and 7.
A specific configuration example of the AND-hold circuit 35 is shown. In the figure, only the portion corresponding to the input video signal R is shown. The sample-and-hold circuit 35 sequentially samples and holds the dot data included in the original video signal R in accordance with the sampling pulse SH, distributes the sampled data to four systems, and the phase of the dot data contained in the signal voltages R1 to R4 of each system. Is adjusted in advance according to the pixel arrangement pitch. The circuit 35 has four channels corresponding to four channels. A pre-stage unit (S / H) 35 for sampling and holding dot data by giving a phase difference to each channel according to a sampling pulse assigned separately
a and a post-stage unit (S / H) 3 for simultaneously sample-holding the dot data once sampled and held again in response to a common sampling pulse among the four channels
5b in series connection. For example, in the first channel, the former unit 35a samples and holds the dot data according to the sampling pulse SH1, and the latter unit 35b samples and holds the dot data once sampled and held according to the common sampling pulse SH5.

The above-mentioned application example is intended for the dot-sequential drive type active matrix type liquid crystal display panel.
The present invention is not limited to this, but can be applied to an active matrix type liquid crystal display panel of a line sequential drive system. In this case, the dot data included in the video signal is serial / parallel converted collectively for the number of column electrodes and supplied to the liquid crystal display panel side. In particular, in a liquid crystal display panel capable of column inversion, signal voltages of two systems are always prepared and input to the column electrodes from above and below in the shape of a comb. Therefore, a pair of column drive circuits are provided separately on the upper and lower sides. These column drive circuits are connected to the column electrodes by TAB, for example. In this line-sequential drive system, signal voltages are applied to adjacent column electrodes from different column drive circuits (TAB drivers) which are different in the vertical direction. When the present invention is applied to such a line-sequential type liquid crystal display panel, it is necessary to interpose an inversion period conversion circuit such as a multiplexer in the preceding stage of the TAB driver. Therefore, the grayscale signal voltage before AC conversion or the signal voltage that has been amplified and AC converted before serial / parallel conversion is input to the multiplexer. Specifically, the signal voltage A in FIG. 3 may correspond to the upper TAB driver input, and the signal voltage B may correspond to the lower TAB driver input.

[0022]

As described above, according to the present invention, the dot inversion drive and the column inversion drive can be freely switched by adding an inversion period conversion circuit including a multiplexer or the like in addition to the column drive circuit. It will be possible. As a result, in the liquid crystal display panel in which the leakage between the row electrodes is large due to manufacturing variations and the like, the column inversion drive can be adopted to eliminate the horizontal line defect, and as a result, the yield of the liquid crystal display panel can be improved. Even when switching to column inversion, the column drive circuit itself needs to generate a signal voltage that inverts in a horizontal cycle as in the dot inversion drive. Therefore, a circuit for keeping the center potential of the signal voltage constant can be simplified. It is configurable.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a display device according to the present invention.

2 is a polarity reversal timing chart of a signal voltage output from the column drive circuit shown in FIG.

FIG. 3 is a circuit diagram showing a configuration example of an inversion period conversion circuit shown in FIG.

FIG. 4 is a timing chart for explaining the operation of the inversion period conversion circuit shown in FIG.

FIG. 5 is a circuit diagram showing another example of the inversion period conversion circuit.

FIG. 6 is a block diagram showing an application example of a display device according to the present invention.

FIG. 7 is a block diagram showing another application example of the display device according to the present invention.

8 is a circuit diagram showing a specific configuration example of a display panel incorporated in the application example shown in FIGS. 6 and 7. FIG.

9 is a circuit diagram showing a specific configuration example of a sample-and-hold circuit included in the application example shown in FIGS. 6 and 7. FIG.

FIG. 10 is a schematic diagram showing column inversion driving.

FIG. 11 is a schematic diagram showing row inversion driving.

FIG. 12 is a schematic diagram showing dot inversion driving.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Display panel, 2 ... Row drive circuit, 3 ... Column drive circuit, 4 ... Inversion period conversion circuit, 11 ... Pixel, 31 ... 1st column drive circuit, 32 ... 2nd column drive circuit, 41 ... Multiplexer, 42 ... Multiplexer

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) G09G 3/36 G09G 3/20 621 G02F 1/133 550

Claims (3)

(57) [Claims] 1. A display panel having pixels arranged in rows and columns, a row driving circuit for sequentially selecting each row of pixels for each horizontal period, and at least two electrodes having polarities inverted and inverted in each horizontal period. In a display device including a column drive circuit that alternately supplies a signal voltage of a system to each column of pixels, a non-conversion state is provided between the column drive circuit and the display panel and in accordance with a control signal. It has an inversion period conversion circuit that can be switched depending on the state, and when in the non-conversion state, the inversion period conversion circuit supplies the signal voltages of two systems to the display panel as they are and the polarity of the signal voltage written to each pixel is Dot inversion driving in which rows and columns are alternately inverted is performed. When in the conversion state, the inversion period conversion circuit recombines the signal voltages of the two systems to remove the polarity inversion of the horizontal period, and the two of the opposite polarities are removed. A display device characterized by performing column inversion driving in which a signal voltage of a system is supplied to a display panel and the polarity of a signal voltage written in each pixel is not inverted in rows but is inverted only in columns. 2. The inversion period conversion circuit comprises a pair of multiplexers, and is in a non-conversion state when the control signal is at a constant level, and is in a conversion state when the control signal is level-inverted in a horizontal period. The display device according to claim 1. 3. The column driving circuit includes a serial / parallel conversion circuit that serial / parallel converts an externally input video signal to generate a plurality of systems of signal voltages, and the inversion period conversion circuit includes a plurality of these serial / parallel conversion circuits. 2. The display device according to claim 1, wherein the signal voltage of the system is processed to switch between dot inversion driving and column inversion driving.