SU744943A1 - Pulse shaper - Google Patents

Description

I

The invention relates to the field of computing, namely to a pulse shaper with interference suppression.

A pulse shaper is known that contains two triggers, a delay line and a coincidence circuit that provides protection against input noise after the output pulse is issued and before it ends 1. However, the driver can be triggered by short noise pulses and produce a false output pulse, since it does not control the duration input pulses. In addition, if the duration of the input pulse is longer than the duration of the pulse emitted by the driver, the driver starts up again and generates a second output pulse, which is false, which causes the range of durations of the input pulses to be limited - the duration of the input pulse must be less than the duration of the pulse output shaper.

The closest in nature to the invention is a pulse shaper, containing two triggers and two delay devices that control input trigger pulses.

ON duration and protected from exposure to single short-term interference 2. The known expander does not control the input drop pulses, i.e. it is not protected from the effects of zero short-term interference. If the duration of the input pulse exceeds the duration of the pulse emitted by the device, then after the end of the output of the output pulse, a short-term zero interference is perceived as a drop in the input pulse and after it ends a second (false) output pulse is formed. This consideration forces the duration of the input pulses to be limited — it must be less than the duration of the pulses emitted by the device.

The aim of the invention is to increase the noise immunity of the driver over the control input (from zero interference, causing a false output pulse) and expanding the range of durations of the input pulses.

This is achieved due to the fact that the pulse driver containing the output trigger, whose single input is connected through the first delay device

the control pulse bus and the zero input to the output of the second delay device, whose inputs are connected to the output of the output trigger, and the input trigger, are entered into a third delay device and an inverter whose input is connected to the control bus of the QiHX pulses, and the output to the input initial installation of the third delay device, the second input of which is connected to the output of the trigger input, and the output is connected to the zero input of the input trigger, whose single input is connected to the output of the first delay device, and the inverse output to the second input of the first delay unit, the clock inputs of flip-flops of input and output, and the first and third delay devices connected to the bus clock, and input and output triggers reset inputs connected to a bus initial installation.

In this case, the first delay device is designed to control the duration of single input signals, and the third delay device is designed to control the duration of zero input signals.

The drawing shows a functional diagram of the shaper.

The proposed pulse shaper includes an input trigger 1, an output trigger 2, a first delay device 3, a second delay device 4, a third delay device 5, an inverter 6, a trigger 7 for the first delay device, a trigger 8 for the second delay device, a counter 9, and a decoder 10. impulses arrive at the bus 11, clock - on the bus 12.

In the initial state, on the bus 13 of the initial installation, the zero signal, triggers 1 and 2 are in the zero state, on the bus 14 — the generator output is a zero signal, on the single output 15 a zero signal arriving at the installation input “1 trigger 8. On the decline of the next the clock pulse trigger 8 is set to the zero state, and the subsequent clock pulses confirm its zero state. The output signal of the trigger 8 is fed to the input 16 of the installation “About the trigger 1. Since the bus 11 has a zero signal, then the output of the inverter 6 is a single signal and the switching of the trigger 8 is allowed, and the switching of the trigger 7 is prohibited and its output 17 has a zero signal inputs 18 and 19 of the installation “triggers 1 and 2, respectively. At the output of the decoder 10 a bullet signal arriving at the input 20 of the setting "About trigger 2. After a single signal is applied to the bus 13, switching is triggered. Triggers 1 and 2, but both of them do not switch, since the inputs 18, 16 and 11, 20 have zero signals . Shaper is ready to go.

After a single signal is fed to bus 1, switching of trigger 8 is prohibited and switching of trigger 7 is permitted. Since sia at input 21 of installation 1 of trigger 7 is a single signal coming from inverted output 22 of trigger 1, then the first 1th clock pulse decays

) the triggering of the trigger 7 occurs to the unit state — at the output 7 of the trigger 7, a single signal. By the decay of the next clock pulse, trigger 7 switches p, the zero state (in counting mode), and triggers I m 2 switch to one state, since inputs 18 and 19 have a single signal, and outputs 16 and 20 have zero signals. After that, the following clock pulses confirm the zero state of trigger 7, since at its input 21

zero signal. The flip-flop 1 saves the single state, since its inputs 18 and 16 have zero signals, and the flip-flop 2 saves the single state, as there are zero signals on the one hundred inputs 19 to 20. The state on bus 14 is maintained to those

® until the counter 9 counts the pre-selected number of clock pulses, which determines the duration of the,) travel pulse. The decoder 10 at this moment gives out a single signal, arriving at input 20

5 trigger 2. As the next clock pulse 2 decays, it returns to the zero state and the output pulse ends. Upon termination of a single signal on bus 1, trigger switching 7 is disabled and trigger switching 8 is enabled.

0 and, since at its installation turn 23, 1 there is a single signal, then according to the decay of the next clock pulse, the trigger 8 switches to the one state — at the output 24 a single signal. By the decline of the next

, the clock pulse of the trigger 8 switches to the zero state (in the counting mode) and the trigger 1 switches to the zero state, since there is a single on eio input 16

signal, and the input 18 - zero signal.

The former was returned to the initial state 0.

If the pulse shaper, which is in the initial state, is interfered with, then the first arrival of the clock pulse decays the trigger 7 to the single state, and after the end of the first pulse, the trigger 7 goes to the initial zero state, as pa input 25 zero signal. Since the output pulse on the bus 14

D can start no earlier than the decay of the second clock pulse after the arrival of a single signal on bus 1, then the input pulse; having a duration shorter than the period of the clock pulses, they cannot start the driver. Thanks to this

 noise immunity of the driver from single interferences, the duration of which is less than the period of pulses, is provided.

Let the shaper be affected by a null disturbance when the shaper has already issued an output pulse, but the input pulse on bus 11 has not yet ended. Then, by the decay of the next clock pulse, the ONE trigger state 8 is switched ON, which, at the end of the interference pulse, switches to the zero state, since the input 26 has a zero signal. In order for the trigger 1 to switch to the zero state, it is necessary that the second clock pulse passes before the end of the interference pulse. Thus, zero pulses on the bus 11, having a duration shorter than the period of the clock grid, are not perceived by the driver as the end of a single input signal. If short-term zero pulses would be perceived by the driver as the end of a single input pulse, the driver would start issuing a second (false) output pulse. Due to the fact that a delay device 5 is inserted into the driver, the duration of zero pulses is monitored and if a short-term zero-noise disturbance is applied to the device input, the driver does not produce a false output pulse.

Thus, the proposed shaper suppresses short-term single and zero interference and can be used not only in cases where the duration of the input signal is shorter than the duration of the pulse emitted by the shaper, but also when the duration of the input pulse is greater than the duration of the pulse emitted shaper.

With a specific use of the proposed shaper, the intensity of single and zero interference (in duration) should be estimated and, depending on this, the period of clock pulses applied to the delay device 5 or 3 can be increased by 2, 4, etc. than the period of clock pulses arriving at the synchronization input of trigger 2. This makes it possible to increase the noise immunity from single or zero interference.

Due to the fact that the switching of the trigger 2, which forms the output pulse, to a single state, and then to the zero state, as described above, occurs on the decline of the clock pulses, the duration of the output pulse is very stable and is determined by the stability of the clock generator, the quality of which can be selected crystal oscillator.

Claims (2)

1. USSR Author's Certificate No. 586631, cl. H 03 K 5/04, 1977. 2. USSR author's certificate for. DGo 2361395, cl. H 03 K 5/04, 1977.