SU369683A1 - FREQUENCY-PULSE FUNCTIONAL GENERATOR - Google Patents

Description

one

The invention relates to devices of pulsed technology and can be used to study the dynamic characteristics of transducers operating with frequency sensors.

The known frequency-pulse function generators, containing the main reference frequency generator, connected to the main controlled frequency divider, and the memory register, have a low reproduction stability of the output frequency-pulse signal.

In order to increase it, the proposed frequency-pulse function generator additionally introduces a reference frequency generator, a controlled frequency divider, a decoder, and the output of the additional reference frequency generator is connected to the first input of an additional controlled frequency divider, the outputs of which are connected to the decoder inputs, and the decoder outputs are connected with memory register inputs, the outputs of which are connected to the inputs of the main controlled frequency divider, the output of the main controlled time divider The pins are connected to the second input of the additional controlled frequency divider.

FIG. 1 shows the structural scheme of the proposed generator; in fig. 2 shows a controlled frequency divider circuit.

The generator contains the generators 1 and 2 of the reference frequency, connected to the controlled dividers of the 3rd and 4th frequencies, the decoder 5, the inputs of which are connected to the triggers of the counter of the controlled divider 4 frequencies. The inputs of the storage device 6 are connected to the decoder 5, and the outputs to the triggers of the register of the controlled divider 3 frequencies. The output of the controlled frequency divider 3 is connected to the counting input of the counter of the controlled frequency divider 4, the output of which is the generator output.

The generator works as follows.

The pulses of the oscillator 1 of the reference frequency, the following with frequency / s are fed to the input of the controlled divider 3 frequencies. The controlled frequency divider consists of the splitter counter 7, register 8, keys 9 and 10, the circuit OR P, and has control inputs.

The division factor of the divider specified by the Ni code selected by the first address from the storage device 6 is equal to

  where / Umaks - the capacity of the register.

"Max

The pulses of the oscillator 2 of the reference frequency, the next with the frequency / 2, are fed to the input of the controlled divider 4 frequencies. In this divider, the counter plays the role of a register, and the input of which is pulsed from the output

controlled divider 3 frequency. With a constant fNI

new frequency / s-b pulses, postL max

barking on the counter controlled frequency divider 4 frequency; The code "M in this counter is a linear function of time. Because

/ o / 2 - where / o-pulse frequency

L1 „ax

at the output of the generator, Mmax is the capacity of the counter, then the frequency of the output pulses also varies linearly. When the M code reaches a predetermined value, the decoder 5 excites the second address bus of the zadomoyuschy device 6, from where the next NZ code is written into the register of the controlled frequency divider 3 frequency. This leads to a change in the frequency fs and the rate of change of the frequency fsbix. At the end of the cycle, all generator nodes are reset.

Thus, the proposed generator provides a change in the output frequency according to the piecewise-linear law, which approximates the given law / output (0 (/ output -function of time) under the condition of monotonicity of this function.

The number of approximation sites and the size of counters and registers are determined by the required accuracy of signal generation.

Subject invention

A pulse frequency function generator, containing a main reference frequency generator, connected to a main controlled frequency divider, a memory register, characterized in that, in order to increase the reproducibility of the output frequency pulse signal, it additionally introduces a reference frequency generator, controlled by a frequency divider, a decoder, and the output of the additional generator of the reference frequency is connected to the first input of the additional controlled divider. the frequencies whose outputs are connected to the inputs of the decoder, the outputs of the decoder are connected to the inputs of the memory register, the outputs of which are connected to the inputs of the main controlled frequency divider, the output of the main controlled frequency divider connected to the second input of the additional controlled frequency divider.

Soij

about//

Fig 1

R

. .2