SU1698992A2 - Pulse length-to-digital code converter - Google Patents

Abstract

The invention relates to information technology, is designed to convert analog signals into a digital code and allows you to measure both the duration of the pulses and the period of the pulse. The purpose of the invention is the expansion of the field of use - achieved by introducing an NAND element, an inverter, a third trigger, and a switch; for example, the counter is set to the mode of measuring the pulse period in a digital code. 2 Il.

Description

The invention relates to information technology and is intended to convert analog signals into a digital code.

A device is known for converting a time interval into a digital code comprising an RS flip-flop, a clock generator, an AND-3 scheme and a counter.

However, this device has low noise immunity and the dependence of measurement accuracy on the pulse width of the reference frequency,,

It is known devices for time interval transformations and a digital code containing a pulse generator of a reference frequency, an AND element, a pulse counter and a first trigger whose installation input 1 is an input of the device, the output of the AND element is connected to a counting input of a pulse counter whose outputs are outputs the device, the installation input in the On trigger is the input to the preparation of the device for operation.

However, this device does not allow to convert the period of the pulse output to a digital shoe.

The most mucous h grrdlagomu to the technical essence; It is the converter of the duration of an impulse a into a digital code consisting of h: mb; poa - PI-NO 1,2, RS-triperose 3,4 and mid-r-wxa c, RS-flip-flop 3 is a HART-flip-flop- - because when it is switched over, the operation of the counter 5 begins, R5-trigger 4 is a table-trigger, since when it is switched off, the operation of the counter 5 stops.

The converter has great functionality and has a high noise immunity in the absence of dependence of the conversion error on the pulse duration of the reference frequency.

However, this converter does not allow converting the pulse-to-digital period.

The purpose of the invention is to expand the use of the converter analog signals to digital code due to

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possible 1 / conversion to pulse period code,

Delivered is achieved by the fact that a long pulse pulse converter with a digital code containing a first and a second trigger; in, the settings in O of which are combined and are the input of the installation of the O converter, the input of the device in 1 of the first trigger is the information inputs of the converter and the counter, the outputs of which are BRINGED by the outputs of the converter, the inverse output of the first trigger is connected to the first input of the first window IL-AND-NOT and the installation input of the looper, the second input and output of the first zl. enthe ML ML AND-NOT are connected with the information input of the converter, we enter the settings in 1 of the second trigger, the second move of the second element OR NOT does not include the clock input of the converter, the output of the counter IKODRM, the additional elements 2I4-HE, inverter, trigger, switch, and information input are added the converter is connected to the second motor of the IS-NE element, the output of which is connected via an inverter to the installation input at 1 third; / g «-eoz. the direct output of which is connected with a memory switch and the input of the item is NOT connected with ip4iv; bif. i output of the second trigger and the second contact of the switch; the third contact of the switch is connected to the first input of the second element SH1M-IE, the installation input to O of the third trigger is connected to the installation input to the O converter.

Phm.1 shows the proposed transducer of the duration and period of the pulse following the digital code; 2 shows timing diagrams for his work.

The transducer of the pulse duration and the period of their follow-up. The digital code contains the third, fourth, eighth triggers, the settings of which are connected are the input of the set to convert, the input of the installation and 1 of the third trigger are information input of the converter and are connected to the second input of the first element OR NOT and the second input of the sixth element AND-NOT, the inverse output of the trigger 3 is connected to the first input of the first element OR NOT and the installation input to O of the counter 5, the installation input to the G trigger 4 is connected to the output n The first OR-HC element, the direct output of the trigger 4 is connected to the first input of the sixth I-NE element and the second contact of the switch, the sixth element of the INE element is connected via inverter 7 to the input of the installation of 1 trigger 8, the direct output of which is connected to the first contact of the switch the second input of the second element

5 OR NOT is the clock input of the converter, the first input is connected to the third contact of the switch, and the output is connected to the counting input of counter 5. The converter of the duration and period of pulse following to the digital code works as follows.

The reference frequency signals are constantly present at the clock input of the converter. Signal Reset Triggers 3.4 and 8

5 are set to the O state (time tc, Fig. 2), the inverse output of trigger 3 is level 1, the forward output of triggers 4 and 8 is level O, Element OR NOT 1 is closed, there is a level at its output

0 O. The AND-HE element 6 is open, at its output there is level 1, respectively, at the output of inverter 7 there will be level O (Fig. 2k, L). The element OR-NOT 2 is open, at its output there are pulses of the reference frequency, which go 5 to the counting input C of the counter 5, but the estimator 5 does not count; since it is closed and held in the initial zero state at the input R of the initial setup by a signal 1 from the inverse output of the trigger 3

0 {fig, 2g, d), the transducer switch the standby mode of the input pulse or a sequence of pulses, the duration or frequency of which, respectively, should be converted to digital

5 code. To measure the period of the pulse, switch 9 is set to the closed position of 1-3 contact.

At the moment of appearance at the tx output of the pulse train.

0 (FIG. 2c), on the front of the first pulse of the trigger 3, switches to the 1G state. At the inverse of the trigger output 3, level O appears (Fig. 2d), the estimator 5 opens at the entrance R, and since at his counting input

5 a reference frequency signal is present, it begins to read these pulses (FIG. 2i).

At the output of the element OR NOT 1 under the action of the level G of the input pulse, there is still a level O (fig.2d),

0 which is held for the duration of the input pulse (fmg.2c).

At the input of the element AND-NOT 6, under the action of the level 1 of the input mm pulse, there will still be a level D (Fig. 2k), which

5 will be held until the second pulse arrives.

Accordingly, the state at the output of the inverter 7 and the trigger 8 does not change.

At the end of the first input pulse, cut it (moment of time: to, fig 2) on

the output of an OR-NOT 1 element occurs level 1 (fig.2d), under the action of which trigger 4 on input S switches to a state in which level 1 appears at its direct output and arrives at the first input of the AND-NOT circuit b, at the second input of which the state is O, as a result of which the state at the output of the circuit IS-NE 6 does not change (Fig. 2c, e, k).

This state of the circuit is preserved until the arrival of the second pulse, on the front of which (moment tM, Fig.2) under the influence of 1 at the output of the element YLI-NOT 1 there will be a state O

Under the action of 1 input pulse tx, at the output of the element AND-HE 6 at the time tn there will be a state O (FIG. 2k), which through inverter 7 will turn the trigger 8 into one state (FIG. 2L, m). Level 1 from the direct output of the trigger 8 through the switch will close the OR-NOT 2 element, at the output of which the pulses of the reference frequency will disappear (time tn, figure 2). Counter 5 stops working, it records the code Rt of the converted period of the input pulse sequence Tx in the number system in which the counter 5 operates. This completes the cycle of the converter operation. It goes into standby mode Reset.

If now at the end of the conversion at the input tx of the converter a level 1 pulse is received, then the counter 5 will not change its state, since the logical level of the trigger 8 that appears at the output of the AND-NO element does not affect the state of the trigger 8, Therefore the element OR NOT 2 does not open, the reference frequency pulses do not pass to counter 5 and

the contents of the latter will not change, i.e. it still contains an Rt code equivalent to the period Tx.

For the next cycle of operation, the converter is prepared by a pulse reset, after the occurrence of which the above operation process is repeated.

The invention, without compromising the parameters of the prototype, significantly expands its functionality, i.e. thanks to the introduction of the NAND circuit, the inverter and the trigger, it was possible to measure the pulse duration.

However, the functionality of the device is much broader. For example, knowing the duration of a pulse in a sequence and the period of a sequence, one can calculate the interval between pulses Tx-txxx.

Claims (1)

Claims Converter pulse duration to a digital code for auth. St. Nb 1372618, characterized in that, in order to expand the scope of use by converting a pulse sequence into the period code, an AND-NE element, an inverter, a third trigger and a switch are inserted into the disconnect between the forward output of the second trigger and NOT. the second input of the switch is connected to the direct output of the third trigger, the installation input to Oh which is combined with the installation input to O of the second trigger, and the installation input to 1 through the inverter connected to the output of the NAND element, the first input of which is connected to the forward output of the second trigger and the second input is from the input one. srig.1 Editor N.Gorvat Tehred M. Morgenthal Order 4402DiscountSubscription VNIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, Raushsk nab 4/5 Proofreader O. Tsiple