SU1695509A1 - Decoder of time-pulse code - Google Patents

Abstract

The invention relates to automation, computing, 1 radio engineering, communications, namely, devices for decoding pulse code sequences and can be used in information processing devices. The purpose of the invention is to expand the scope of the decoder by decoding several pulse sequences and blocking its own channel. The decoder contains the first 1 and second 2 shift registers, the element NOT 3, the elements OR 4, the decoder 5, the sensor 6 code, the group of 7 elements AND, the group 8 of pulse conditioners, the first 9 and the second 10 drivers of pulses, the element 11 delay, information 12 and clock 13 inputs, outputs 14 decoder 2 Il.

Description

(L

WITH

oh oh ate oh u

The invention relates to automation, computing, radio engineering, communications, and specifically to devices for decoding pulsed code sequences, and can be used in information processing devices.

The purpose of the invention is to expand the scope of use of the decoder by decoding several pulse sequences and blocking the private channel.

FIG. 1 is a functional diagram of the device; FIG. 2 - timing diagrams, explaining the principle of operation of the decoder.

The decoder contains the first 1 and second 2 shift registers, the element NOT 3, the elements OR 4, the decoder 5, the sensor 6 codes, the group of 7 elements I, the group 8 of pulse formers, the first 9 and the second 10 formers, the element 11 of delay, information 12 and clock 13 inputs, outputs 14 of the decoder.

The device works as follows.

At the clock input of the decoder received pulses of type square wave. At the output of the element NO 3 there will be a meander shifted relative to the input at the time

Dg t / 2,

where r is the period of the following clock pulses.

Further, these meanders arrive at the clock inputs of the first 1 and second 2 shift registers. Simultaneously, the combined information inputs of these registers through the first driver 9 pulses, which normalizes the input pulses in duration, and the delay element 11 receives a signal decoding, and is recorded in the corresponding registers, and later under the influence of clock pulses, it shifts and appears at the outputs of the registers through time T, determined by the formula

TC-G

where K is the number of the corresponding register bit.

From the outputs of the shift registers, the signals arrive at the corresponding inputs of the OR 4 elements, where they are combined. From the outputs of the OR 4 elements to the outputs of the device, signals from those AND 7 elements pass through the formers of 8 pulses, which are selected using the decoder 5 with the code 6 of the sensor. The formers 8, the first 9 and the second 10 formers form the signals of a certain duration

under the action of signals at their inputs. The first driver 9 generates pulses of duration

g / 2 tf1 t,

which provide their record at least in one of the registers.

The second driver 10 of the input signals generates short GFA pulses, drivers 8 - pulses, the duration of which GF is determined by the error L T of the digital delay line (first 1 and second 2 shift registers, elements OR 4) and can be determined by the following formula

TF 2 D T.

The delay element 11 is used to adjust the delay of the input signal within half the length of the clock period.

Signals are formed at the outputs 14 of the decoder from the And 7 elements coinciding in time at the first and second inputs of the element, i.e. delayed for a certain time and current signals, which will correspond to certain code intervals.

Thus, the resolution of the decoder At, defined as the minimum allowable distance between two consecutive pulses of a certain duration at the input of the device, which can be distinguished at the output, is determined by the formula

At (p-1) t + TV, 7 where g is the duration of the input pulse.

If a device with a higher resolution is required, then the values of r and r should be chosen from the condition of the minimum pulse duration (ru t / 2).

This condition ensures the recording of a pulse with a duration of at least one address.

Signals at the output of the device are delayed for a certain time T, while one of the elements AND is closed, which is selected using the decoder 5 by the number code recorded in the sensor 6 of the code.

FIG. 2 shows diagrams explaining the principle of operation of the device, where diagram a shows the duration-normalized pulses at the output of the first driver 9, which have a different temporal position, diagrams b and c show the meanders arriving at the clock inputs of the first and second registers 1 and 2 shifts, and on the diagrams the hydraulic signals at their outputs, respectively, in diagram E, the output signals of one

of the elements OR 4, the diagram g shows the output signals of one of the drivers 8, the diagram C shows the decoder input signals arriving at its input through time t + T, where T is the time corresponding to the code interval, the diagrams and signals at the output the second shaper 10, the diagram K presents the output signals of one of the elements And 7.

It can be seen from the diagram that the pulses 12 and 13 are written in one address (cell) of the second register (122) and the first register (13i), respectively (diagrams d and e), since they intersect with one (p1) recording edge.

It can be seen from the diagrams that when the input pulse 14 is written to the device, the number of intersections of the input pulse by the recording front is p 2. This means that the pulse is written to two addresses (14i and 142).

With the output of the registers, the pulses 12, 13, 14i and 14z arrive at the OR element, where they are combined at its output (pulses 12z, 13zi14z).

From the diagram k it follows that pulses 12 and 14, which coincided with pulses 15 and 16 (pulses 15 e 16 e) pass at the output of the decoder.

Pulse 13 does not appear at the output of the device, since at time t + T there is no similar signal at the input of the device.

Thus, the use of the proposed technical solution allows the implementation of a multi-code decoder for temporal impulse codes, while simultaneously decoding several impulse sequences arriving over a single channel is provided by dividing them into several

channels with the subsequent blocking of the own code interval

Claims (1)

The invention of the decoder pulse code time, 5 containing the first shift register, the clock input of which is combined with the input element NOT and is the clock input of the decoder, the output of the element is NOT connected to the clock input of the second register OR, code sensor, pulse formers, the input of the first pulse generator is an information decoder input, characterized in that, in order to expand the field of application of fratora due to decoding several pulse sequences and block Nogo sobstven0 channel group introduced therein pulse shapers, and the group of elements, the decoder and the delay element, the first pulse shaper output is connected to inputs of the delay element and 5 of the second pulse generator, the output of the delay element is connected to the information inputs of the first and second shift registers; whose exits 5 is connected to the second inputs of the corresponding AND elements of the group, the output of the second shaper is connected to the third inputs of the AND elements of the group, the outputs of which are the corresponding outputs of the device. j P . Spirit / Au / t + r P t .V