SU1298759A1 - Information input-output device - Google Patents

Abstract

The invention relates to telemechanics, in particular to input / output information devices used in control point x of telemechanics systems. The device is intended to receive a serial code from a communication line and convert it into a machine word entered into a computer by a parallel code, and vice versa, convert a machine word obtained from a computer with a parallel code into a serial code issued to the communication line. The purpose of the invention is to increase the speed of the device. The goal is achieved by introducing into the device a register 5 for storing a code for the exchange of information, a multiphase generator 7 of pulse sequences, a multiplexer 9, a delay 4, a second ..1 and a third 3 triggers, a decoder 13. The introduced elements allow for systems with distributed objects to produce input and output of information at various speeds. T il. o SL C lg-5 y from 00 SP with X

Description

The invention relates to telemechanics, namely, information input / output devices used in control points of telemechanics systems, and is intended to receive a serial code from communication lines and convert it to a computer word entered into a computer by a parallel code, and vice versa, computer word conversion received from a computer by a parallel code, into a serial code issued to the communication line.

The purpose of the invention is to increase the speed of the device.

The drawing shows a block diagram of the device.

The device contains triggers 1-3, delay element 4, register 5, shift register 6, multiphase generator 7, group of elements AND 8, multiplexer 9, element OR 10, fourth element AND 11, counter 12, code 13, element NOT 14, elements 15 to 17, inputs from the computer beginning the exchange 18, the end of the exchange 19, receiving 20, reading 21, writing 22, parallel information 23, choosing the exchange rate 24; outputs, computer output: readiness to receive 25, readiness for transmission 26, information group 27, information output 28 to the communication line, information input 29 from the communication line, outputs 30 of the exchange rate.

The device works as follows.

At the beginning of the exchange from the computer to the register

5, through inputs 23, an exchange rate code is output, which is gated by a signal from the computer to input 24. The signal from the corresponding output of register 5 allows the pulse sequence with the selected frequency to pass from the multiphase generator 7 to the input of element 11 and to the clock input of trigger 2. After that from the computer via inputs 23 to the register

6, the output information is received. It is recorded in the shift register 6 according to the parallel recording resolution signal from the device input 22 and the parallel recording base signal from the output of the delay element 4. Next, from the computer, via input 18, a signal is received to start the exchange, which sets trigger 1 to one state. As a result, a reset signal is removed from the R input of trigger 1 and

the reset input of the counter 12 through the element OR 10, as well as the trigger 3 is set to one. On the leading edge of the pulse from the code of the multiplexer 9, the trigger 2 is set to one and allows the passage of pulses through the element 11 to the counting input of the counter 12. One-time pulses

from the output of the element 11, arrive at the shift input of the register 6 (register 6 is in the shift mode, since the resolution of the parallel recording from the input 22 is removed) and causes a shift of its contents. The information word is bit-wise from the high bit of register 6 arrives at the first input of the element 15. The sequential b. Information output to the line is resolved by a single signal arriving at the third input of the element 15 from the output 1 3, and is clocked by pulses arriving at the second , the input element And 15 from the output element And 11. The counter 12 counts the number of ticks corresponding to the length of the transmitted in line from the register 6 words. This number is decrypted in the decoder 13 and the signal in the pause after the transfer of the last bit in the word from the output of the element And 16 enters the computer, evidence of the completion of the transfer of the information word to the line. In the case of continuing the transmission of information to the computer line in the same pause, the next word is output from register 6 (this is possible due to the fact that the speed of the computer many times exceeds the device exchange rate

with the communication line). In this case, the counter 12 is cleared by the recording signal from input 22 through the element OR 10. The transmission cycle to the line of this word (n the following words) is carried out as described above.

To transfer the device to the mode of receiving information from the line, its input 20 in the first after the last word transmission of the clock sequence pause is received from the computer. The trigger 3 is set to the zero state, C1 clears counter 12 through the element OR 10. The signals in the communication line act on the serial input of the register 6. The sequential reception of signals in the register 6 is clocked by pulses received from the output of the element 11 on

shift input register 6 shift. Counter 12 counts the number of ticks corresponding to the word width received in register 6. After a certain number of ticks, the signal from the output of the decoder 13 goes to the second input of the element 17. And the third input of the element 17 receives the receive enable signal from the inverse output of the trigger 3, Signal from the output of the element NOT 14 in the first after the completion of the reception of the word, the pause of the clock sequence enters through the element 17 and the code 26 into the computer, the certificate of the end of reception of the word on the line. A computer in the same pause enters information from register 6 through a group of elements AND 8 using a read signal fed to the input 21 of the device. The counter 12 is then cleared through the element OR 10 and prepared to count the length of the next word. The next word is received in the same way as described.

Upon completion of the exchange cycle from the computer, an end-of-exchange signal is sent to input 19, resetting trigger 1 to the zero state. The signal from the inverse output of the trigger 1 resets et and locks the trigger 2, and also through the element OR 10 clears and locks the counter 12.

The signals for selecting the exchange rate from the outputs of the device 30 can be used in devices and nodes that monitor the exchange rate along the line.

The implementation of the proposed device will allow to obtain a positive effect by increasing the speed of information exchange on the telemechanics system as a whole by providing the possibility of varying the speed of information exchange between the device and the communication line.

Claims (1)

Invention Formula A device for input-output information containing the shift register, the counter, the first trigger, the element NOT, the three elements AND, the group of elements AND, the element OR, the information outputs of the register of the shift are connected to the first inputs of the group of elements AND, one of the information codes of the registration of the shift connected to the first input of the first element AND, the output of which is the information output of the device, the serial input of the shift register is the information input of the device, the second inputs from the group of elements AND are combined and are input tyvani device element output is coupled to the first input of the second AND gate, characterized in that, in order 0 speed of the device, a register, two triggers, a delay element, a fourth AND element, a multiplexer, a register, a multiphase generator, whose outputs are connected to the information inputs of the multiplexer, parallel inputs of the shift register and information inputs of the register, are entered in it On, the control input of the register is the input of the device exchange rate selection, the outputs of the register are connected to the address inputs of the multiplexer and are the outputs of the speed 5 of the device exchange, the output of the element is NOT connected to the first input of the third element I, the output of the multiplexer is connected to the first input of the fourth element I and the clock input of the first 0 flip-flop, the output of which is connected to the second input of the fourth element I, the output of which is connected to the counting input of the counter, the second input of the first element I, the input of the element 5 and NOT and the register input shift, D-input and R-input of the first trigger are connected to the direct and inverse outputs of the second trigger, respectively, the inverse output of the second trigger is connected to the first input of the OR element, the output of which is connected to the reset input of the counter, which is connected to the decoder inputs, the output of which connected to 5 second inputs of the second and third elements AND whose outputs are ready for receiving and ready for transmitting the device, respectively, the S inputs of the second and third flip-flops are the start-exchange input of the device, the reset input of the second trigger is the input of the end of the device exchange , the reset input of the third trigger is connected to the second 5 is the input of the OR element and is the input of the device, the direct and inverse outputs of the third trigger are connected to the third inputs of the second and third elements AND, respectively 12987596 but, the direct output of the third trigger delay is the recording input connected to the third input of the first terrain, the output of the delay element of the AND element, the third input of the element ILIDinen with the input of the gates parallel is the input of the device recording the shift register, output, the resolution input parallel to the group of elements of the elements And are records of the shift register, a quarter-group of information exits, the output of the element OR, and the input of an element.