SU1368884A1 - Information input-output device - Google Patents

Abstract

The invention relates to automation and computing, in particular, to information input / output devices for receiving information in a serial code and converting it into a parallel one, convenient for input into a computer, as well as for

Description

transforming machine words into a serial code followed by placing it into a communication line. The aim of the invention is to expand the scope of application by ensuring the autonomous operation of the device in the modes of input and output of information without control from the computer. The device contains a control unit 1, a register 2, a counter 3, a group of 6 elements AND, an element 4 and a one-shot 5. The goal is achieved by organizing a sequence of actions with the help of a control unit that allows you to implement an algorithm for receiving information from the communication line, converting it transfer to the computer in the input mode and input of information from the computer, conversion and transfer to the communication line in the output mode. 1 hp f-ly, 2 ill.

one

The invention relates to automation and computing, in particular, information input / output devices for receiving information in a serial code from a communication channel and converting it into a computer word entered into a computer, as well as converting a computer word obtained from a computer in a parallel code , in serial code issued to the communication channel.

The purpose of the invention is to expand the scope of application by ensuring the autonomous operation of the device in the modes of input and output of information without control from the computer.

Figure 1 shows the functional diagram of the device} in Figure 2 is the functional diagram of the control unit.

The device contains a control unit 1, a register 2, a counter 3, an element I 4, a one-shot 5, a group of 6 elements I.

Positions 7-24 of FIG. T further denote the inputs and outputs of the device and the control unit.

The control unit contains the first element And 25, the first trigger 26, the clock driver 27, the second trigger 28, the third element 29, the frequency divider 30, the generator 31 and the fourth element 32.

The device operates in two modes - Input and Output.

The device enters the Input mode by a positive signal difference. The mode selection from the device input 8 when there is a signal The input from the device input 9. At the same time, a blocking signal is generated at the output 24 of block 1. When the first impulse

Sa at input 13 of the device and input 23 of block 1, the latter begins to generate clock pulses from output 22 to synchronize the input and shift of the input information to register 2 and output 20 to count the number of entered information bits into counter 3. After counting a certain number of information bits, by register bit 2,

the counter 3 generates the signal of the end of the counting, which, having passed through the one-shot 5, prohibits the block 1 from further generation of clock pulses and resets the counter 3 to the initial state. At the same time, the signal from the output of the one-shot 5 through the output 16 of the device informs the computer about the end of the input of information from the communication channel. In this case, in the shift register 2, the information received is transferred to the device, which is converted from a serial code to a parallel one.

Reception of information from the device to the computer is made by the signal Read,

coming from the computer to the input 12 of the device. In this case, the entered information from register 2 through the group of elements And 6 is transmitted to the outputs 15 of the device and enters the computer.

The device goes to Output mode by a positive signal differential. Selecting a mode from input 8 of the device with no signal Input from input 9 of the device. At the same time

31

The output 24 of block 1 produces an enable signal. Thereby, in the Output mode, information is output from shift register 2 through AND 4 to output 14 of the device. The output information is entered into the register 2 from the inputs 11 of the device according to the Record signal received at the input 10 from the computer.

After entering into the register 2 of the output information, the computer generates a Start signal, which arrives at the input 7 of the device. The Start signal is received through input 17 in block 1, which begins to generate clock pulses at outputs 20 and 22, the purpose of which is the same as in Input mode.

After counting a certain number of clock pulses, counter 3

generates an end-of-count signal of 20 ger 28 to its original state. The inhibit signal from the output of the trigger 28 closes the element And 32, prohibiting the passage of clock pulses from the generator 31 to the frequency divider 30 and the 25 outputs 20 and 22 of the block 1.

In the Output mode, the enable signal from the inverted output of the trigger 26 opens the element And 29, puts the clock driver 27 in the state

The one that, having passed through the one-oscillator 5, resets the counter 3 to the initial state, prohibits the generation of clock pulses to the unit 1 and notifies the computer about the end of the output of information to the communication channel.

The control unit 1 operates as follows.

The trigger 26 is designed to select the operation solution and is controlled by the signal Vshod and is fed to the output 24 of the block. The mode is selected at input 1, and the inhibit signal from the direct 18 of the block 1. If there is a trigger at the output 19 of the output 26 Input trigger 26 enters And 25. in the Input state, and in the absence of When received at input 17 of the block

input signal 19 Input - in the state of Output.

In the Input state, on the direct output of the trigger 26, an enable signal appears, which opens the AND element 25, switching the clock driver 27 to the Input state. At the same time, an inhibiting signal is formed at the inverse output of the trigger 26, which closes the element AND 29 arrives at the output 24 of the unit 1.

When the first information pulse arrives through the input 23 in block 1, a signal is generated at the output of the element 25 and that sets the trigger 28 into one state. From the output of the trigger 28, the enabling signal is supplied to the element And 32, which begins to pass at the output the clock pulses from the output of the generator 31 pulses.

From the output element And 32 clock pulses are fed to the input of the divider 30 frequency, designed to reduce the frequency of the input pulses.

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1 signal Trigger on the output of the element 29 and produces a signal that sets the trigger 28 in one state.

The further operation of block 1 is similar to the Input mode, except that the clock driver 27 does not invert the input clock pulses.

Claims (2)

1. A device for input-output information containing a control unit, a register, a counter, a group of elements AND and an element AND, the output of the most significant bit of the register is connected to the first input of the element AND, the code of which is the output of the serial information of the device, characterized by gg In order to expand the field of application due to the provision of autonomous operation in the input and output modes of information without computer control, the device contains one five up to the frequency of transmission and reception of information from the communication channel. By changing the division ratio of the frequency divider 30, the rate of exchange of information of the device over communication channels can be changed. From the output of the frequency divider 30, the clock pulses arrive at the output 20 of block 1 and to the input of the clock driver 27, which in the Input mode inverts the input pulses, and in the Output mode, it skips them without changes. From the output of the clock shaper 27 clock pulses arrive at the output 22 of block 1. After the reception of information from the communication channel is completed, the input 21 of unit 1 receives a signal that resets the triggering signal from the output of the trigger 28 closes the AND element 32, prohibiting the passage of clock pulses from the generator 31 to the frequency divider 30 and the outputs 20 and 22 of the unit 1. In the Output mode, the enable signal from the inverted output of the trigger 26 opens the element And 29, puts the clock driver 27 in the state The output enters the output 24 of block 1, and the inhibit signal from the direct output of the trigger 26 closes the element 25. At arrival at the input 17 of the block 1 signal Trigger on the output of the element 29 and produces a signal that sets the trigger 28 in one state. The further operation of block 1 is similar to the Input mode, except that the clock driver 27 does not invert the input clock pulses. Invention Formula 1. A device for input-output information containing a control unit, a register, a counter, a group of elements AND and an element AND, the output of the most significant bit of the register is connected to the first input of the element AND, whose code is the output of the serial information of the device, characterized in that in order to expand the field of application by providing autonomous operation in input and output information modes without control from a computer, the device contains a single vibrator, the output of which is connected to the reset inputs of the counter and resetting the control unit and is the device ready output, the synchronization input of the control unit and the serial data input of the register are the information input of the device, the start inputs, mode selection and control input inputs are the start start, mode select and input inputs of the device, respectively, the first and second clock outputs the control unit is connected to the synchronous inputs of the counter and the register, respectively, the output resolution of the readout resolution of the control unit is connected to the second input of the AND element, the inputs of the parallel information of the register are the inputs of the device parallel information, the register entry input is the device record input, the register outputs are connected to the first inputs of elements AND groups whose outputs are the parallel information devices, 25 second inputs of elements AND groups are device read inputs, the output of the counter connected to the input of the one-shot. 2. The device according to claim 1, wherein the clock and the 30 clock generator is that the block is controlled by the first clock output of the block, the output does not contain from the second to the quarter clock generator elements And, two triggers, generator, eye clock output unit. the frequency divider and the clock driver, the first inputs of the second and third elements I are the synchronization and triggering inputs of the block, the synchronization input of the first trigger is the mode selection input, and the information input is the input of the block input, the forward output of the first trigger is connected to the second .the input of the second element I and the first control input of the clock driver, the inverse output of the first trigger connected to the second input of the third element AND, the second control input of the clock driver and is the read enable output block, the output of the second element And is connected to the first input of the second trigger, whose reset input is the reset input of the block, the output of the third element And is connected to the second input of the second trigger, the output of which is connected to the first input of the fourth And, the generator output co the input of the fourth And, the output of which is connected to the input of the frequency divider, the output of which is connected to the clock input of that element is one with the element the frequency divider and the clock driver, the first inputs of the second and third elements I are synchronization and block start inputs, the first trigger clock input is the mode selection input, and the information input is the input of the block input, the first output of the first trigger is connected to the second .the input of the second element I and the first control input of the clock driver, the inverse output of the first trigger connected to the second input of the third element AND, the second control input of the clock driver and is the read enable output Loka, the output of the second element And is connected to the first input of the second trigger installation, the reset input of which is the block reset input, the output of the third element And is connected to the second input of the second trigger installation, the output of which is connected to the first input of the fourth And, the generator output with the second input of the fourth And, the output of which is connected to the input of the frequency divider, the output of which is connected to the clock input of that element is one with the element