SG93844A1 - Flip chip metallization - Google Patents
Flip chip metallizationInfo
- Publication number
- SG93844A1 SG93844A1 SG9905098A SG1999005098A SG93844A1 SG 93844 A1 SG93844 A1 SG 93844A1 SG 9905098 A SG9905098 A SG 9905098A SG 1999005098 A SG1999005098 A SG 1999005098A SG 93844 A1 SG93844 A1 SG 93844A1
- Authority
- SG
- Singapore
- Prior art keywords
- aluminum
- ubm
- nascent
- flip chip
- copper layer
- Prior art date
Links
- 238000001465 metallisation Methods 0.000 title abstract 2
- 229910052782 aluminium Inorganic materials 0.000 abstract 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 2
- 229910052802 copper Inorganic materials 0.000 abstract 2
- 239000010949 copper Substances 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 238000004544 sputter deposition Methods 0.000 abstract 1
Classifications
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- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/172,467 US6130141A (en) | 1998-10-14 | 1998-10-14 | Flip chip metallization |
Publications (1)
Publication Number | Publication Date |
---|---|
SG93844A1 true SG93844A1 (en) | 2003-01-21 |
Family
ID=22627814
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG9905098A SG93844A1 (en) | 1998-10-14 | 1999-10-12 | Flip chip metallization |
Country Status (7)
Country | Link |
---|---|
US (2) | US6130141A (zh) |
EP (1) | EP0994507B1 (zh) |
JP (1) | JP3554685B2 (zh) |
KR (1) | KR100654823B1 (zh) |
DE (1) | DE69918631T2 (zh) |
SG (1) | SG93844A1 (zh) |
TW (1) | TW457602B (zh) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
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US6649533B1 (en) * | 1999-05-05 | 2003-11-18 | Advanced Micro Devices, Inc. | Method and apparatus for forming an under bump metallurgy layer |
US6544880B1 (en) * | 1999-06-14 | 2003-04-08 | Micron Technology, Inc. | Method of improving copper interconnects of semiconductor devices for bonding |
US6570251B1 (en) * | 1999-09-02 | 2003-05-27 | Micron Technology, Inc. | Under bump metalization pad and solder bump connections |
US6335226B1 (en) * | 2000-02-09 | 2002-01-01 | Texas Instruments Incorporated | Digital signal processor/known good die packaging using rerouted existing package for test and burn-in carriers |
KR100640576B1 (ko) * | 2000-12-26 | 2006-10-31 | 삼성전자주식회사 | 유비엠의 형성방법 및 그에 의해 형성된 반도체 소자 |
TW508987B (en) * | 2001-07-27 | 2002-11-01 | Phoenix Prec Technology Corp | Method of forming electroplated solder on organic printed circuit board |
US6602775B1 (en) | 2001-08-16 | 2003-08-05 | Taiwan Semiconductor Manufacturing Company | Method to improve reliability for flip-chip device for limiting pad design |
US6756294B1 (en) | 2002-01-30 | 2004-06-29 | Taiwan Semiconductor Manufacturing Company | Method for improving bump reliability for flip chip devices |
US6930032B2 (en) * | 2002-05-14 | 2005-08-16 | Freescale Semiconductor, Inc. | Under bump metallurgy structural design for high reliability bumped packages |
US6596619B1 (en) | 2002-05-17 | 2003-07-22 | Taiwan Semiconductor Manufacturing Company | Method for fabricating an under bump metallization structure |
DE10238816B4 (de) * | 2002-08-23 | 2008-01-10 | Qimonda Ag | Verfahren zur Herstellung von Anschlussbereichen einer integrierten Schaltung und integrierte Schaltung mit Anschlussbereichen |
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TWI233172B (en) * | 2003-04-02 | 2005-05-21 | Siliconware Precision Industries Co Ltd | Non-leaded semiconductor package and method of fabricating the same |
CN100426481C (zh) * | 2003-04-15 | 2008-10-15 | 富士通株式会社 | 半导体装置及其制造方法 |
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WO2005059957A2 (en) * | 2003-12-12 | 2005-06-30 | Great Wall Semiconductor Corporation | Metal interconnect system and method for direct die attachment |
TWI254995B (en) * | 2004-01-30 | 2006-05-11 | Phoenix Prec Technology Corp | Presolder structure formed on semiconductor package substrate and method for fabricating the same |
US20050247894A1 (en) | 2004-05-05 | 2005-11-10 | Watkins Charles M | Systems and methods for forming apertures in microfeature workpieces |
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US7429494B2 (en) * | 2004-08-24 | 2008-09-30 | Micron Technology, Inc. | Microelectronic imagers with optical devices having integral reference features and methods for manufacturing such microelectronic imagers |
US7425499B2 (en) | 2004-08-24 | 2008-09-16 | Micron Technology, Inc. | Methods for forming interconnects in vias and microelectronic workpieces including such interconnects |
US7083425B2 (en) | 2004-08-27 | 2006-08-01 | Micron Technology, Inc. | Slanted vias for electrical circuits on circuit boards and other substrates |
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US7271482B2 (en) | 2004-12-30 | 2007-09-18 | Micron Technology, Inc. | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods |
US7282433B2 (en) * | 2005-01-10 | 2007-10-16 | Micron Technology, Inc. | Interconnect structures with bond-pads and methods of forming bump sites on bond-pads |
US20060205200A1 (en) * | 2005-03-08 | 2006-09-14 | Dominick Richiuso | Low capacitance solder bump interface structure |
US7321140B2 (en) * | 2005-03-11 | 2008-01-22 | Applied Materials, Inc. | Magnetron sputtered metallization of a nickel silicon alloy, especially useful as solder bump barrier |
US7795134B2 (en) | 2005-06-28 | 2010-09-14 | Micron Technology, Inc. | Conductive interconnect structures and formation methods using supercritical fluids |
US7053490B1 (en) * | 2005-07-27 | 2006-05-30 | Semiconductor Manufacturing International (Shanghai) Corporation | Planar bond pad design and method of making the same |
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DE102006008261A1 (de) * | 2006-02-22 | 2007-08-30 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Ätzlösung und Verfahren zur Strukturierung eines UBM-Schichtsystems |
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US7629249B2 (en) | 2006-08-28 | 2009-12-08 | Micron Technology, Inc. | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods |
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SG150410A1 (en) * | 2007-08-31 | 2009-03-30 | Micron Technology Inc | Partitioned through-layer via and associated systems and methods |
TW200926379A (en) * | 2007-12-05 | 2009-06-16 | Phoenix Prec Technology Corp | Package substrate having electrical connecting structure and method of fabricating the same |
US7884015B2 (en) | 2007-12-06 | 2011-02-08 | Micron Technology, Inc. | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods |
CN102747332A (zh) * | 2011-04-21 | 2012-10-24 | 鸿富锦精密工业(深圳)有限公司 | 镀膜件的制备方法及由该方法制得的镀膜件 |
CN102747333A (zh) * | 2011-04-21 | 2012-10-24 | 鸿富锦精密工业(深圳)有限公司 | 镀膜件的制备方法及由该方法制得的镀膜件 |
CN102747326A (zh) * | 2011-04-21 | 2012-10-24 | 鸿富锦精密工业(深圳)有限公司 | 镀膜件的制备方法及由该方法制得的镀膜件 |
US9768132B2 (en) * | 2012-03-14 | 2017-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and method of forming the same |
US20150048502A1 (en) | 2013-08-14 | 2015-02-19 | International Business Machines Corporation | Preventing misshaped solder balls |
TWI599276B (zh) * | 2015-06-26 | 2017-09-11 | 矽創電子股份有限公司 | 電子元件與製造方法 |
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US5480835A (en) * | 1993-05-06 | 1996-01-02 | Motorola, Inc. | Electrical interconnect and method for forming the same |
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GB2095904B (en) * | 1981-03-23 | 1985-11-27 | Gen Electric | Semiconductor device with built-up low resistance contact and laterally conducting second contact |
JPH0344035A (ja) * | 1989-07-11 | 1991-02-25 | Seiko Instr Inc | バンプ電極を有する半導体装置及びその実装方法 |
US5567981A (en) * | 1993-03-31 | 1996-10-22 | Intel Corporation | Bonding pad structure having an interposed rigid layer |
KR950004464A (ko) * | 1993-07-15 | 1995-02-18 | 김광호 | 칩 범프의 제조방법 |
US5773359A (en) * | 1995-12-26 | 1998-06-30 | Motorola, Inc. | Interconnect system and method of fabrication |
US5795818A (en) * | 1996-12-06 | 1998-08-18 | Amkor Technology, Inc. | Integrated circuit chip to substrate interconnection and method |
US5904859A (en) * | 1997-04-02 | 1999-05-18 | Lucent Technologies Inc. | Flip chip metallization |
US5985694A (en) * | 1997-09-29 | 1999-11-16 | Motorola, Inc. | Semiconductor die bumping method utilizing vacuum stencil |
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1998
- 1998-10-14 US US09/172,467 patent/US6130141A/en not_active Expired - Lifetime
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1999
- 1999-08-17 TW TW088114052A patent/TW457602B/zh not_active IP Right Cessation
- 1999-10-05 DE DE69918631T patent/DE69918631T2/de not_active Expired - Lifetime
- 1999-10-05 EP EP99307831A patent/EP0994507B1/en not_active Expired - Lifetime
- 1999-10-11 KR KR1019990043709A patent/KR100654823B1/ko active IP Right Grant
- 1999-10-12 JP JP28984099A patent/JP3554685B2/ja not_active Expired - Lifetime
- 1999-10-12 SG SG9905098A patent/SG93844A1/en unknown
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2000
- 2000-09-14 US US09/661,741 patent/US6597069B1/en not_active Expired - Lifetime
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US5480835A (en) * | 1993-05-06 | 1996-01-02 | Motorola, Inc. | Electrical interconnect and method for forming the same |
Also Published As
Publication number | Publication date |
---|---|
KR20000028968A (ko) | 2000-05-25 |
DE69918631D1 (de) | 2004-08-19 |
TW457602B (en) | 2001-10-01 |
DE69918631T2 (de) | 2005-08-11 |
US6597069B1 (en) | 2003-07-22 |
KR100654823B1 (ko) | 2006-12-08 |
EP0994507A2 (en) | 2000-04-19 |
EP0994507B1 (en) | 2004-07-14 |
US6130141A (en) | 2000-10-10 |
JP3554685B2 (ja) | 2004-08-18 |
EP0994507A3 (en) | 2000-08-16 |
JP2000124265A (ja) | 2000-04-28 |
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