SG89410A1 - Manufacturing method of semiconductor integrated circuit device - Google Patents

Manufacturing method of semiconductor integrated circuit device

Info

Publication number
SG89410A1
SG89410A1 SG200104320A SG200104320A SG89410A1 SG 89410 A1 SG89410 A1 SG 89410A1 SG 200104320 A SG200104320 A SG 200104320A SG 200104320 A SG200104320 A SG 200104320A SG 89410 A1 SG89410 A1 SG 89410A1
Authority
SG
Singapore
Prior art keywords
manufacturing
integrated circuit
semiconductor integrated
circuit device
semiconductor
Prior art date
Application number
SG200104320A
Other languages
English (en)
Inventor
Sato Hidenori
Hayashi Yoshiyuki
Ando Toshio
Original Assignee
Hitachi Ulsi Sys Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2000232191A external-priority patent/JP4262399B2/ja
Priority claimed from JP2000332863A external-priority patent/JP4849711B2/ja
Application filed by Hitachi Ulsi Sys Co Ltd, Hitachi Ltd filed Critical Hitachi Ulsi Sys Co Ltd
Publication of SG89410A1 publication Critical patent/SG89410A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
SG200104320A 2000-07-31 2001-07-17 Manufacturing method of semiconductor integrated circuit device SG89410A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000232191A JP4262399B2 (ja) 2000-07-31 2000-07-31 半導体集積回路装置の製造方法
JP2000332863A JP4849711B2 (ja) 2000-10-31 2000-10-31 半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
SG89410A1 true SG89410A1 (en) 2002-06-18

Family

ID=26597094

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200104320A SG89410A1 (en) 2000-07-31 2001-07-17 Manufacturing method of semiconductor integrated circuit device

Country Status (6)

Country Link
US (2) US6632750B2 (zh)
KR (1) KR100738291B1 (zh)
CN (1) CN1233024C (zh)
MY (1) MY134044A (zh)
SG (1) SG89410A1 (zh)
TW (2) TW200414360A (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG89410A1 (en) * 2000-07-31 2002-06-18 Hitachi Ulsi Sys Co Ltd Manufacturing method of semiconductor integrated circuit device
JP3746669B2 (ja) * 2000-10-17 2006-02-15 株式会社ルネサステクノロジ 半導体装置の製造方法
US6559074B1 (en) * 2001-12-12 2003-05-06 Applied Materials, Inc. Method of forming a silicon nitride layer on a substrate
KR20030067308A (ko) * 2002-02-08 2003-08-14 주식회사 유진테크 싱글 챔버식 화학기상증착 장치를 이용한 질화막 제조 방법
JP4358492B2 (ja) * 2002-09-25 2009-11-04 レール・リキード−ソシエテ・アノニム・プール・レテュード・エ・レクスプロワタシオン・デ・プロセデ・ジョルジュ・クロード 熱化学気相成長法によるシリコン窒化物膜またはシリコンオキシ窒化物膜の製造方法
KR100472518B1 (ko) * 2002-09-30 2005-03-10 주식회사 유진테크 싱글 챔버식 화학 기상증착 장치를 이용한 질화막 증착방법
US20050109276A1 (en) * 2003-11-25 2005-05-26 Applied Materials, Inc. Thermal chemical vapor deposition of silicon nitride using BTBAS bis(tertiary-butylamino silane) in a single wafer chamber
KR100680416B1 (ko) * 2004-05-21 2007-02-08 주식회사 하이닉스반도체 반도체 소자의 형성 방법
US20080187685A1 (en) * 2007-02-07 2008-08-07 Atomic Energy Council - Institute Of Nuclear Energy Research Method of preparing vertically-aligned carbon nanotube under atmospheric and cold-wall heating treatments and making the same
WO2011116273A2 (en) * 2010-03-19 2011-09-22 Gt Solar Incorporated System and method for polycrystalline silicon deposition
US8470713B2 (en) * 2010-12-13 2013-06-25 International Business Machines Corporation Nitride etch for improved spacer uniformity

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2108756A (en) * 1981-09-14 1983-05-18 Tokyo Shibaura Electric Co Forming a pattern of a thin film having metallic lustre
US4489101A (en) * 1979-07-25 1984-12-18 Ulsi Technology Research Association Pattern forming method

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63114124A (ja) * 1986-10-31 1988-05-19 Res Dev Corp Of Japan Ｘ線マスク用メンブレンおよび製造法
US5932286A (en) * 1993-03-16 1999-08-03 Applied Materials, Inc. Deposition of silicon nitride thin films
JPH08203894A (ja) * 1995-01-30 1996-08-09 Sony Corp 半導体装置の製造方法
JP3183190B2 (ja) * 1995-12-14 2001-07-03 株式会社デンソー 半導体装置の製造方法
US6235416B1 (en) * 1997-01-21 2001-05-22 Widia Gmbh Composite body and production process
US6838320B2 (en) * 2000-08-02 2005-01-04 Renesas Technology Corp. Method for manufacturing a semiconductor integrated circuit device
JP4363679B2 (ja) * 1997-06-27 2009-11-11 聯華電子股▲ふん▼有限公司 半導体装置の製造方法
JPH1116999A (ja) 1997-06-27 1999-01-22 Hitachi Ltd 半導体集積回路装置およびその製造方法ならびにその設計方法
JPH1117147A (ja) 1997-06-27 1999-01-22 Hitachi Ltd 半導体集積回路装置の製造方法
JP3827839B2 (ja) * 1997-11-27 2006-09-27 富士通株式会社 半導体装置の製造方法
JP3175725B2 (ja) * 1999-02-24 2001-06-11 日本電気株式会社 半導体装置の製造方法
SG89410A1 (en) * 2000-07-31 2002-06-18 Hitachi Ulsi Sys Co Ltd Manufacturing method of semiconductor integrated circuit device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4489101A (en) * 1979-07-25 1984-12-18 Ulsi Technology Research Association Pattern forming method
US4576678A (en) * 1979-07-25 1986-03-18 Vlsi Technology Research Association Pattern forming method
GB2108756A (en) * 1981-09-14 1983-05-18 Tokyo Shibaura Electric Co Forming a pattern of a thin film having metallic lustre

Also Published As

Publication number Publication date
CN1233024C (zh) 2005-12-21
US20020048971A1 (en) 2002-04-25
US6632750B2 (en) 2003-10-14
CN1337736A (zh) 2002-02-27
TWI223352B (en) 2004-11-01
MY134044A (en) 2007-11-30
KR20020010870A (ko) 2002-02-06
US20040038494A1 (en) 2004-02-26
US6812165B2 (en) 2004-11-02
KR100738291B1 (ko) 2007-07-12
TW200414360A (en) 2004-08-01

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