SG47197A1 - Bga type semiconductor device and electronic equipment using the same - Google Patents

Bga type semiconductor device and electronic equipment using the same

Info

Publication number
SG47197A1
SG47197A1 SG1996011438A SG1996011438A SG47197A1 SG 47197 A1 SG47197 A1 SG 47197A1 SG 1996011438 A SG1996011438 A SG 1996011438A SG 1996011438 A SG1996011438 A SG 1996011438A SG 47197 A1 SG47197 A1 SG 47197A1
Authority
SG
Singapore
Prior art keywords
semiconductor device
same
electronic equipment
type semiconductor
bga type
Prior art date
Application number
SG1996011438A
Other languages
English (en)
Inventor
Hideho Yamamura
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of SG47197A1 publication Critical patent/SG47197A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
SG1996011438A 1995-11-29 1996-11-26 Bga type semiconductor device and electronic equipment using the same SG47197A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31086195A JP3294490B2 (ja) 1995-11-29 1995-11-29 Bga型半導体装置

Publications (1)

Publication Number Publication Date
SG47197A1 true SG47197A1 (en) 1998-03-20

Family

ID=18010279

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996011438A SG47197A1 (en) 1995-11-29 1996-11-26 Bga type semiconductor device and electronic equipment using the same

Country Status (7)

Country Link
US (1) US6163071A (zh)
JP (1) JP3294490B2 (zh)
KR (1) KR100240525B1 (zh)
CN (2) CN1294651C (zh)
MY (1) MY124454A (zh)
SG (1) SG47197A1 (zh)
TW (1) TW309640B (zh)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
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US6734545B1 (en) * 1995-11-29 2004-05-11 Hitachi, Ltd. BGA type semiconductor device and electronic equipment using the same
MY123146A (en) * 1996-03-28 2006-05-31 Intel Corp Perimeter matrix ball grid array circuit package with a populated center
JP3797797B2 (ja) * 1997-08-13 2006-07-19 三菱化学株式会社 半導体発光素子の製造方法
JP3447961B2 (ja) * 1998-08-26 2003-09-16 富士通株式会社 半導体装置の製造方法及び半導体製造装置
DE69922177T2 (de) * 1999-01-19 2005-12-01 Koninklijke Philips Electronics N.V. Röntgenstrahldetektor
JP2001203470A (ja) * 2000-01-21 2001-07-27 Toshiba Corp 配線基板、半導体パッケージ、および半導体装置
US6403896B1 (en) * 2000-09-27 2002-06-11 Advanced Semiconductor Engineering, Inc. Substrate having specific pad distribution
US7434305B2 (en) 2000-11-28 2008-10-14 Knowles Electronics, Llc. Method of manufacturing a microphone
US8617934B1 (en) 2000-11-28 2013-12-31 Knowles Electronics, Llc Methods of manufacture of top port multi-part surface mount silicon condenser microphone packages
DE10121241B4 (de) * 2001-04-30 2005-07-07 Infineon Technologies Ag Integrierte Schaltung
CA2390627C (en) * 2001-06-18 2007-01-30 Research In Motion Limited Ic chip packaging for reducing bond wire length
EP1434264A3 (en) * 2002-12-27 2017-01-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method using the transfer technique
WO2005013359A1 (ja) * 2003-07-31 2005-02-10 Matsushita Electric Industrial Co., Ltd. 半導体装置
US7074049B2 (en) * 2004-03-22 2006-07-11 Johnstech International Corporation Kelvin contact module for a microcircuit test system
CN100447966C (zh) * 2004-05-12 2008-12-31 库利克和索夫工业公司 集成球与过孔的封装和形成工艺
JP4591886B2 (ja) * 2004-07-21 2010-12-01 ローム株式会社 半導体装置を用いた電源回路装置
DE102005008512B4 (de) 2005-02-24 2016-06-23 Epcos Ag Elektrisches Modul mit einem MEMS-Mikrofon
DE102005008511B4 (de) 2005-02-24 2019-09-12 Tdk Corporation MEMS-Mikrofon
DE102005053765B4 (de) 2005-11-10 2016-04-14 Epcos Ag MEMS-Package und Verfahren zur Herstellung
DE102005053767B4 (de) 2005-11-10 2014-10-30 Epcos Ag MEMS-Mikrofon, Verfahren zur Herstellung und Verfahren zum Einbau
KR100681398B1 (ko) * 2005-12-29 2007-02-15 삼성전자주식회사 열방출형 반도체 칩과 테이프 배선기판 및 그를 이용한테이프 패키지
JP2007235004A (ja) * 2006-03-03 2007-09-13 Mitsubishi Electric Corp 半導体装置
US7616451B2 (en) * 2006-10-13 2009-11-10 Stmicroelectronics S.R.L. Semiconductor package substrate and method, in particular for MEMS devices
JP2009054993A (ja) * 2007-08-02 2009-03-12 Tokyo Electron Ltd 位置検出用治具
JP5255929B2 (ja) * 2008-07-04 2013-08-07 ルネサスエレクトロニクス株式会社 半導体装置
EP2774390A4 (en) 2011-11-04 2015-07-22 Knowles Electronics Llc EMBEDDED DIELEKTRIKUM AS A BARRIER IN AN ACOUSTIC DEVICE AND METHOD OF MANUFACTURING
CN104145484A (zh) 2011-11-17 2014-11-12 应美盛股份有限公司 具有声管的麦克风模块
JP2013236039A (ja) * 2012-05-11 2013-11-21 Renesas Electronics Corp 半導体装置
US9738515B2 (en) 2012-06-27 2017-08-22 Invensense, Inc. Transducer with enlarged back volume
US9078063B2 (en) 2012-08-10 2015-07-07 Knowles Electronics, Llc Microphone assembly with barrier to prevent contaminant infiltration
DE102013106353B4 (de) * 2013-06-18 2018-06-28 Tdk Corporation Verfahren zum Aufbringen einer strukturierten Beschichtung auf ein Bauelement
US9794661B2 (en) 2015-08-07 2017-10-17 Knowles Electronics, Llc Ingress protection for reducing particle infiltration into acoustic chamber of a MEMS microphone package
WO2020097767A1 (zh) * 2018-11-12 2020-05-22 北京比特大陆科技有限公司 电路板及超算设备
JP7238481B2 (ja) * 2019-03-05 2023-03-14 株式会社アイシン 半導体モジュール及び半導体装置
CN113008353B (zh) * 2021-02-10 2022-07-01 西北工业大学 集成式多阵元的小型换能器基阵设计方法及小型换能器基阵

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US4614194A (en) * 1984-01-20 1986-09-30 Cordis Corporation Implantable pulse generator having a single printed circuit board for carrying integrated circuit chips thereon with chip carrier means
JPH0324753A (ja) * 1989-06-22 1991-02-01 Nec Corp 半導体装置用パッケージ
US5216278A (en) * 1990-12-04 1993-06-01 Motorola, Inc. Semiconductor device having a pad array carrier package
JPH04352436A (ja) * 1991-05-30 1992-12-07 Fujitsu Ltd 半導体装置
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US5285352A (en) * 1992-07-15 1994-02-08 Motorola, Inc. Pad array semiconductor device with thermal conductor and process for making the same
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
US5283717A (en) * 1992-12-04 1994-02-01 Sgs-Thomson Microelectronics, Inc. Circuit assembly having interposer lead frame
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Also Published As

Publication number Publication date
MY124454A (en) 2006-06-30
TW309640B (zh) 1997-07-01
CN1492498A (zh) 2004-04-28
KR970030750A (ko) 1997-06-26
CN1169593A (zh) 1998-01-07
US6163071A (en) 2000-12-19
JPH09148476A (ja) 1997-06-06
JP3294490B2 (ja) 2002-06-24
CN1089491C (zh) 2002-08-21
CN1294651C (zh) 2007-01-10
KR100240525B1 (ko) 2000-01-15

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