SG194748A1 - Process for forming a crack in a material - Google Patents

Process for forming a crack in a material Download PDF

Info

Publication number
SG194748A1
SG194748A1 SG2013081252A SG2013081252A SG194748A1 SG 194748 A1 SG194748 A1 SG 194748A1 SG 2013081252 A SG2013081252 A SG 2013081252A SG 2013081252 A SG2013081252 A SG 2013081252A SG 194748 A1 SG194748 A1 SG 194748A1
Authority
SG
Singapore
Prior art keywords
implantation
substrate
process according
lithium
hydrogen
Prior art date
Application number
SG2013081252A
Other languages
English (en)
Inventor
Aurelie Tauzin
Frederic Mazen
Original Assignee
Commissariat A L & Rsquo En Atomique Et Aux En Alternatives
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat A L & Rsquo En Atomique Et Aux En Alternatives filed Critical Commissariat A L & Rsquo En Atomique Et Aux En Alternatives
Publication of SG194748A1 publication Critical patent/SG194748A1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Physical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
SG2013081252A 2011-05-02 2012-04-27 Process for forming a crack in a material SG194748A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1153737A FR2974944B1 (fr) 2011-05-02 2011-05-02 Procédé de formation d'une fracture dans un matériau
PCT/EP2012/057713 WO2012150184A1 (fr) 2011-05-02 2012-04-27 Procede de formation d'une fracture dans un materiau

Publications (1)

Publication Number Publication Date
SG194748A1 true SG194748A1 (en) 2013-12-30

Family

ID=44262789

Family Applications (1)

Application Number Title Priority Date Filing Date
SG2013081252A SG194748A1 (en) 2011-05-02 2012-04-27 Process for forming a crack in a material

Country Status (8)

Country Link
US (1) US9105688B2 (https=)
EP (1) EP2705529B1 (https=)
JP (1) JP6019106B2 (https=)
KR (1) KR101913174B1 (https=)
CN (1) CN103534800B (https=)
FR (1) FR2974944B1 (https=)
SG (1) SG194748A1 (https=)
WO (1) WO2012150184A1 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015112308A1 (en) 2014-01-23 2015-07-30 Sunedison Semiconductor Limited High resistivity soi wafers and a method of manufacturing thereof
TW201603193A (zh) * 2014-06-19 2016-01-16 Gtat公司 增強用於離子佈植的施體基板的發射性
FR3043248B1 (fr) * 2015-10-30 2017-12-15 Commissariat Energie Atomique Procede d'elimination de defauts dans un film semiconducteur comprenant la formation d'une couche de piegeage d'hydrogene
JP6632462B2 (ja) 2016-04-28 2020-01-22 信越化学工業株式会社 複合ウェーハの製造方法
FR3079658B1 (fr) * 2018-03-28 2021-12-17 Soitec Silicon On Insulator Procede de detection de la fracture d'un substrat fragilise par implantation d'especes atomiques
FR3091000B1 (fr) * 2018-12-24 2020-12-04 Soitec Silicon On Insulator Procede de fabrication d’un substrat pour un capteur d’image de type face avant
FR3091619B1 (fr) 2019-01-07 2021-01-29 Commissariat Energie Atomique Procédé de guérison avant transfert d’une couche semi-conductrice
FR3091620B1 (fr) * 2019-01-07 2021-01-29 Commissariat Energie Atomique Procédé de transfert de couche avec réduction localisée d’une capacité à initier une fracture
FR3094573B1 (fr) * 2019-03-29 2021-08-13 Soitec Silicon On Insulator Procede de preparation d’une couche mince de materiau ferroelectrique
CN110341291B (zh) * 2019-08-16 2021-04-06 江阴市合助机械科技有限公司 一种复合板材自动剥离方法
CN113311309B (zh) * 2021-07-30 2021-10-12 度亘激光技术(苏州)有限公司 半导体结构的覆盖层剥除方法及半导体结构失效分析方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE504916C2 (sv) 1995-01-18 1997-05-26 Ericsson Telefon Ab L M Förfarande för att åstadkomma en ohmsk kontakt jämte halvledarkomponent försedd med dylik ohmsk kontakt
US6544862B1 (en) * 2000-01-14 2003-04-08 Silicon Genesis Corporation Particle distribution method and resulting structure for a layer transfer process
FR2847076B1 (fr) * 2002-11-07 2005-02-18 Soitec Silicon On Insulator Procede de detachement d'une couche mince a temperature moderee apres co-implantation
US20050181210A1 (en) 2004-02-13 2005-08-18 Doering Patrick J. Diamond structure separation
US7456080B2 (en) * 2005-12-19 2008-11-25 Corning Incorporated Semiconductor on glass insulator made using improved ion implantation process
FR2899378B1 (fr) * 2006-03-29 2008-06-27 Commissariat Energie Atomique Procede de detachement d'un film mince par fusion de precipites

Also Published As

Publication number Publication date
FR2974944B1 (fr) 2013-06-14
KR101913174B1 (ko) 2018-10-30
JP2014518010A (ja) 2014-07-24
US20140113434A1 (en) 2014-04-24
WO2012150184A1 (fr) 2012-11-08
EP2705529B1 (fr) 2015-03-11
US9105688B2 (en) 2015-08-11
EP2705529A1 (fr) 2014-03-12
FR2974944A1 (fr) 2012-11-09
JP6019106B2 (ja) 2016-11-02
CN103534800B (zh) 2016-12-07
CN103534800A (zh) 2014-01-22
KR20140040725A (ko) 2014-04-03

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