SG118387A1 - Method and apparatus for a semiconductor device with a high-k gate - Google Patents
Method and apparatus for a semiconductor device with a high-k gateInfo
- Publication number
- SG118387A1 SG118387A1 SG200503923A SG200503923A SG118387A1 SG 118387 A1 SG118387 A1 SG 118387A1 SG 200503923 A SG200503923 A SG 200503923A SG 200503923 A SG200503923 A SG 200503923A SG 118387 A1 SG118387 A1 SG 118387A1
- Authority
- SG
- Singapore
- Prior art keywords
- gate
- semiconductor device
- semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58209404P | 2004-06-23 | 2004-06-23 | |
US11/021,269 US7229893B2 (en) | 2004-06-23 | 2004-12-23 | Method and apparatus for a semiconductor device with a high-k gate dielectric |
Publications (1)
Publication Number | Publication Date |
---|---|
SG118387A1 true SG118387A1 (en) | 2006-01-27 |
Family
ID=35924817
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200503923A SG118387A1 (en) | 2004-06-23 | 2005-06-14 | Method and apparatus for a semiconductor device with a high-k gate |
Country Status (4)
Country | Link |
---|---|
US (1) | US7229893B2 (zh) |
CN (1) | CN100438073C (zh) |
SG (1) | SG118387A1 (zh) |
TW (1) | TWI283030B (zh) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI254409B (en) * | 2005-02-16 | 2006-05-01 | Powerchip Semiconductor Corp | Semiconductor device having self-aligned contact and manufacturing method thereof |
KR100706244B1 (ko) * | 2005-04-07 | 2007-04-11 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US7250351B2 (en) * | 2005-04-14 | 2007-07-31 | International Business Machines Corporation | Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors |
KR100678632B1 (ko) * | 2005-06-23 | 2007-02-05 | 삼성전자주식회사 | 반도체 집적 회로 장치의 제조 방법 |
FR2890234A1 (fr) * | 2005-08-29 | 2007-03-02 | St Microelectronics Crolles 2 | Procede de protection de la grille d'un transistor et circuit integre correspondant |
JP2007095912A (ja) * | 2005-09-28 | 2007-04-12 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US8501632B2 (en) * | 2005-12-20 | 2013-08-06 | Infineon Technologies Ag | Methods of fabricating isolation regions of semiconductor devices and structures thereof |
US7425497B2 (en) * | 2006-01-20 | 2008-09-16 | International Business Machines Corporation | Introduction of metal impurity to change workfunction of conductive electrodes |
US20070249133A1 (en) * | 2006-04-11 | 2007-10-25 | International Business Machines Corporation | Conductive spacers for semiconductor devices and methods of forming |
US7728387B1 (en) * | 2006-06-13 | 2010-06-01 | The Board Of Trustees Of The Leland Stanford Junior University | Semiconductor device with high on current and low leakage |
US8154051B2 (en) * | 2006-08-29 | 2012-04-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | MOS transistor with in-channel and laterally positioned stressors |
KR100781874B1 (ko) * | 2006-12-26 | 2007-12-05 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
US7737015B2 (en) * | 2007-02-27 | 2010-06-15 | Texas Instruments Incorporated | Formation of fully silicided gate with oxide barrier on the source/drain silicide regions |
US7898027B2 (en) | 2007-07-16 | 2011-03-01 | United Microelectronics Corp. | Metal-oxide-semiconductor device |
US7588991B2 (en) * | 2007-07-18 | 2009-09-15 | United Microelectronics Corp. | Method for fabricating embedded static random access memory |
US7709331B2 (en) * | 2007-09-07 | 2010-05-04 | Freescale Semiconductor, Inc. | Dual gate oxide device integration |
US7625791B2 (en) * | 2007-10-29 | 2009-12-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | High-k dielectric metal gate device structure and method for forming the same |
JP5190250B2 (ja) * | 2007-11-02 | 2013-04-24 | パナソニック株式会社 | 半導体装置 |
DE102008011813B4 (de) * | 2008-02-29 | 2010-03-04 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement mit einem Metallgatestapel mit reduzierter Höhe und Verfahren zur Herstellung des Bauelements |
US20100102393A1 (en) * | 2008-10-29 | 2010-04-29 | Chartered Semiconductor Manufacturing, Ltd. | Metal gate transistors |
US8440547B2 (en) * | 2009-02-09 | 2013-05-14 | International Business Machines Corporation | Method and structure for PMOS devices with high K metal gate integration and SiGe channel engineering |
JP5503735B2 (ja) | 2010-03-30 | 2014-05-28 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US8729627B2 (en) | 2010-05-14 | 2014-05-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel integrated circuit devices |
US8592296B2 (en) * | 2010-06-16 | 2013-11-26 | International Business Machines Corporation | Gate-last fabrication of quarter-gap MGHK FET |
KR101186038B1 (ko) * | 2010-11-26 | 2012-09-26 | 에스케이하이닉스 주식회사 | 반도체 소자의 제조 방법 |
US9269758B2 (en) * | 2011-01-13 | 2016-02-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Low TCR high resistance resistor |
KR20120107762A (ko) * | 2011-03-22 | 2012-10-04 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
US8952458B2 (en) | 2011-04-14 | 2015-02-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Gate dielectric layer having interfacial layer and high-K dielectric over the interfacial layer |
CN102856203B (zh) * | 2011-06-29 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | Mos晶体管及其形成方法 |
US8486778B2 (en) * | 2011-07-15 | 2013-07-16 | International Business Machines Corporation | Low resistance source and drain extensions for ETSOI |
KR101887414B1 (ko) * | 2012-03-20 | 2018-08-10 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
US9059321B2 (en) | 2012-05-14 | 2015-06-16 | International Business Machines Corporation | Buried channel field-effect transistors |
US8551844B1 (en) * | 2012-05-25 | 2013-10-08 | Micron Technology, Inc. | Methods of forming semiconductor constructions |
US8963208B2 (en) * | 2012-11-15 | 2015-02-24 | GlobalFoundries, Inc. | Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof |
CN106374039B (zh) * | 2015-07-22 | 2019-03-12 | 旺宏电子股份有限公司 | 存储器装置与其制造方法 |
US9673207B2 (en) | 2015-08-20 | 2017-06-06 | Sandisk Technologies Llc | Shallow trench isolation trenches and methods for NAND memory |
CN106549014B (zh) * | 2015-09-21 | 2020-04-14 | 中国科学院微电子研究所 | 一种半导体器件及其制造方法 |
US10573639B2 (en) * | 2016-02-29 | 2020-02-25 | Globalfoundries Singapore Pte. Ltd. | Silicon controlled rectifier (SCR) based ESD protection device |
KR102342550B1 (ko) * | 2017-06-09 | 2021-12-23 | 삼성전자주식회사 | 반도체 장치 |
US10832960B2 (en) * | 2019-02-07 | 2020-11-10 | International Business Machines Corporation | Quadruple gate dielectric for gate-all-around transistors |
US11937426B2 (en) * | 2021-01-08 | 2024-03-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device and manufacturing method thereof |
CN113178483B (zh) * | 2021-04-27 | 2022-09-02 | 福建省晋华集成电路有限公司 | 一种半导体结构以及半导体结构制备方法 |
JP2023023637A (ja) * | 2021-08-05 | 2023-02-16 | キオクシア株式会社 | 半導体装置及びその製造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6136654A (en) | 1996-06-07 | 2000-10-24 | Texas Instruments Incorporated | Method of forming thin silicon nitride or silicon oxynitride gate dielectrics |
US6063698A (en) | 1997-06-30 | 2000-05-16 | Motorola, Inc. | Method for manufacturing a high dielectric constant gate oxide for use in semiconductor integrated circuits |
US6136678A (en) * | 1998-03-02 | 2000-10-24 | Motorola, Inc. | Method of processing a conductive layer and forming a semiconductor device |
JP3973819B2 (ja) | 1999-03-08 | 2007-09-12 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
US6174775B1 (en) | 1999-06-25 | 2001-01-16 | Taiwan Semiconductor Manufacturing Company | Method for making a dual gate structure for CMOS device |
US6413803B1 (en) | 1999-10-25 | 2002-07-02 | Taiwan Semiconductor Manufacturing Company | Design and process for a dual gate structure |
US6297103B1 (en) | 2000-02-28 | 2001-10-02 | Micron Technology, Inc. | Structure and method for dual gate oxide thicknesses |
US6352885B1 (en) * | 2000-05-25 | 2002-03-05 | Advanced Micro Devices, Inc. | Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same |
US6812101B2 (en) * | 2001-04-02 | 2004-11-02 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for manufacture thereof |
US6596599B1 (en) | 2001-07-16 | 2003-07-22 | Taiwan Semiconductor Manufacturing Company | Gate stack for high performance sub-micron CMOS devices |
US6730551B2 (en) | 2001-08-06 | 2004-05-04 | Massachusetts Institute Of Technology | Formation of planar strained layers |
US6566205B1 (en) | 2002-01-11 | 2003-05-20 | Taiwan Semiconductor Manufacturing Company | Method to neutralize fixed charges in high K dielectric |
US6479403B1 (en) | 2002-02-28 | 2002-11-12 | Taiwan Semiconductor Manufacturing Company | Method to pattern polysilicon gates with high-k material gate dielectric |
US7084423B2 (en) | 2002-08-12 | 2006-08-01 | Acorn Technologies, Inc. | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions |
US6833556B2 (en) | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
US6706581B1 (en) | 2002-10-29 | 2004-03-16 | Taiwan Semiconductor Manufacturing Company | Dual gate dielectric scheme: SiON for high performance devices and high k for low power devices |
US6716695B1 (en) | 2002-12-20 | 2004-04-06 | Texas Instruments Incorporated | Semiconductor with a nitrided silicon gate oxide and method |
US6746900B1 (en) | 2003-02-19 | 2004-06-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a semiconductor device having high-K gate dielectric material |
JP4700295B2 (ja) * | 2004-06-08 | 2011-06-15 | 富士通セミコンダクター株式会社 | 半導体装置とその製造方法 |
-
2004
- 2004-12-23 US US11/021,269 patent/US7229893B2/en active Active
-
2005
- 2005-06-14 SG SG200503923A patent/SG118387A1/en unknown
- 2005-06-23 TW TW094120924A patent/TWI283030B/zh active
- 2005-06-23 CN CNB2005100793428A patent/CN100438073C/zh active Active
Also Published As
Publication number | Publication date |
---|---|
CN100438073C (zh) | 2008-11-26 |
TWI283030B (en) | 2007-06-21 |
CN1725507A (zh) | 2006-01-25 |
TW200601463A (en) | 2006-01-01 |
US7229893B2 (en) | 2007-06-12 |
US20050287759A1 (en) | 2005-12-29 |
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