SG11201905827RA - Multiple low density parity check (ldpc) base graph design - Google Patents

Multiple low density parity check (ldpc) base graph design

Info

Publication number
SG11201905827RA
SG11201905827RA SG11201905827RA SG11201905827RA SG11201905827RA SG 11201905827R A SG11201905827R A SG 11201905827RA SG 11201905827R A SG11201905827R A SG 11201905827RA SG 11201905827R A SG11201905827R A SG 11201905827RA SG 11201905827R A SG11201905827R A SG 11201905827RA
Authority
SG
Singapore
Prior art keywords
ldpc
base graph
information block
international
california
Prior art date
Application number
SG11201905827RA
Other languages
English (en)
Inventor
Joseph Binamira Soriaga
Gabi Sarkis
Shrinivas KUDEKAR
Thomas Richardson
Vincent Loncke
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of SG11201905827RA publication Critical patent/SG11201905827RA/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
SG11201905827RA 2017-02-06 2018-01-19 Multiple low density parity check (ldpc) base graph design SG11201905827RA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201762455450P 2017-02-06 2017-02-06
US15/709,400 US10340949B2 (en) 2017-02-06 2017-09-19 Multiple low density parity check (LDPC) base graph design
PCT/US2018/014528 WO2018144251A1 (en) 2017-02-06 2018-01-19 Multiple low density parity check (ldpc) base graph design

Publications (1)

Publication Number Publication Date
SG11201905827RA true SG11201905827RA (en) 2019-08-27

Family

ID=63038031

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201905827RA SG11201905827RA (en) 2017-02-06 2018-01-19 Multiple low density parity check (ldpc) base graph design

Country Status (18)

Country Link
US (3) US10340949B2 (zh)
EP (1) EP3577763A1 (zh)
JP (2) JP6980797B2 (zh)
KR (3) KR20200056486A (zh)
CN (1) CN110268635B (zh)
AU (1) AU2018214491B2 (zh)
BR (1) BR112019015528A2 (zh)
CA (1) CA3049454A1 (zh)
CL (1) CL2019002177A1 (zh)
CO (1) CO2019008498A2 (zh)
IL (1) IL268314A (zh)
MX (1) MX2019008942A (zh)
NZ (1) NZ754843A (zh)
PH (1) PH12019501554A1 (zh)
RU (1) RU2749772C2 (zh)
SG (1) SG11201905827RA (zh)
TW (1) TWI744463B (zh)
WO (1) WO2018144251A1 (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10784901B2 (en) 2015-11-12 2020-09-22 Qualcomm Incorporated Puncturing for structured low density parity check (LDPC) codes
US10469104B2 (en) 2016-06-14 2019-11-05 Qualcomm Incorporated Methods and apparatus for compactly describing lifted low-density parity-check (LDPC) codes
US10340949B2 (en) 2017-02-06 2019-07-02 Qualcomm Incorporated Multiple low density parity check (LDPC) base graph design
CN108809509B (zh) * 2017-05-05 2021-01-22 电信科学技术研究院 低密度奇偶校验码的基础图选择方法及装置
US10312939B2 (en) 2017-06-10 2019-06-04 Qualcomm Incorporated Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code
WO2019031925A1 (ko) * 2017-08-10 2019-02-14 삼성전자 주식회사 통신 또는 방송 시스템에서 채널 부호화/복호화 방법 및 장치
CN109391367B (zh) * 2017-08-11 2022-12-30 华为技术有限公司 通信方法和装置
BR112020003426A2 (pt) 2017-08-24 2020-08-25 Telefonaktiebolaget Lm Ericsson (Publ) segmentação de bloco de código para novo rádio 3gpp
WO2019164515A1 (en) * 2018-02-23 2019-08-29 Nokia Technologies Oy Ldpc codes for 3gpp nr ultra-reliable low-latency communications
US11528036B2 (en) * 2019-01-07 2022-12-13 Lg Electronics Inc. Method and device for carrying out channel coding using low density parity check matrix in wireless communication system
US20220231701A1 (en) * 2021-01-20 2022-07-21 Nvidia Corporation Technique to perform decoding of wireless communications signal data
US20240056133A1 (en) * 2022-08-12 2024-02-15 Qualcomm Incorporated Ldpc base graph selection systems and methods

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6633865B1 (en) 1999-12-23 2003-10-14 Pmc-Sierra Limited Multithreaded address resolution system
US6633856B2 (en) 2001-06-15 2003-10-14 Flarion Technologies, Inc. Methods and apparatus for decoding LDPC codes
US6961888B2 (en) 2002-08-20 2005-11-01 Flarion Technologies, Inc. Methods and apparatus for encoding LDPC codes
US7702986B2 (en) 2002-11-18 2010-04-20 Qualcomm Incorporated Rate-compatible LDPC codes
US6957375B2 (en) * 2003-02-26 2005-10-18 Flarion Technologies, Inc. Method and apparatus for performing low-density parity-check (LDPC) code operations using a multi-level permutation
US7231557B2 (en) * 2003-04-02 2007-06-12 Qualcomm Incorporated Methods and apparatus for interleaving in a block-coherent communication system
US7036720B2 (en) * 2003-06-25 2006-05-02 Centre National De La Recherche Scientifique (Cnrs) Method and apparatus for resolution of problems using constrained discrete variables
TWI272777B (en) * 2003-08-08 2007-02-01 Intel Corp Method and apparatus for varying lengths of low density parity check codewords
KR100809619B1 (ko) * 2003-08-26 2008-03-05 삼성전자주식회사 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법
US7237181B2 (en) * 2003-12-22 2007-06-26 Qualcomm Incorporated Methods and apparatus for reducing error floors in message passing decoders
CN101076946B (zh) * 2004-06-24 2012-05-30 Lg电子株式会社 无线通信系统中使用低密度奇偶校验码编码和解码数据的方法和装置
US7127659B2 (en) * 2004-08-02 2006-10-24 Qualcomm Incorporated Memory efficient LDPC decoding methods and apparatus
US7516391B2 (en) 2004-08-16 2009-04-07 Samsung Electronics Co., Ltd Apparatus and method for coding/decoding block low density parity check code with variable block length
WO2006039801A1 (en) * 2004-10-12 2006-04-20 Nortel Networks Limited System and method for low density parity check encoding of data
US7630350B2 (en) * 2005-06-06 2009-12-08 Broadcom Corporation Method and system for parsing bits in an interleaver for adaptive modulations in a multiple input multiple output (MIMO) wireless local area network (WLAN) system
CN100502245C (zh) * 2005-10-21 2009-06-17 中兴通讯股份有限公司 支持任何码率/码长的低密度奇偶校验码编码装置和方法
KR100833515B1 (ko) 2006-12-05 2008-05-29 한국전자통신연구원 가변 정보 길이 및 가변 부호율을 가진 ｌｄｐｃ 부호의패리티 검사 행렬 생성 방법, 부/복호화 방법 및 이를이용하는 장치
MX2009007946A (es) 2007-01-24 2009-08-18 Qualcomm Inc Codificacion y descodificacion de verificacion de paridad de baja densidad (ldpc) de paquetes de tamaños variables.
US7861134B2 (en) * 2007-02-28 2010-12-28 Cenk Kose Methods and systems for LDPC coding
US7912028B2 (en) * 2007-05-31 2011-03-22 Agere Systems Inc. Reducing false detection in an HSDPA 3G terminal
CN101141133B (zh) * 2007-10-23 2011-09-14 北京邮电大学 一种结构化低密度校验码的编码方法
US8219876B2 (en) * 2007-10-24 2012-07-10 Core Wireless Licensing, S.a.r.l. Method, apparatus, computer program product and device providing semi-parallel low density parity check decoding using a block structured parity check matrix
US20090113256A1 (en) * 2007-10-24 2009-04-30 Nokia Corporation Method, computer program product, apparatus and device providing scalable structured high throughput LDPC decoding
JP5240590B2 (ja) * 2007-11-12 2013-07-17 マーベル インターナショナル リミテッド アクティブアイドル通信システム
KR101503058B1 (ko) * 2008-02-26 2015-03-18 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치
KR20100058260A (ko) * 2008-11-24 2010-06-03 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 장치 및 방법
US8433972B2 (en) 2009-04-06 2013-04-30 Nec Laboratories America, Inc. Systems and methods for constructing the base matrix of quasi-cyclic low-density parity-check codes
US8595589B2 (en) 2011-09-30 2013-11-26 Mitsubishi Electric Research Laboratories, Inc. Quasi-cyclic low-density parity-check codes
CN102571105B (zh) * 2012-02-24 2014-03-12 西安电子科技大学 一种逼近信道容量的码率可变ldpc码的编码方法
WO2014117836A1 (en) 2013-01-31 2014-08-07 Intracom S.A. Telecom Solutions Ldpc code design and encoding apparatus enabling the adjustment of code rate and codelength
US20160012465A1 (en) * 2014-02-08 2016-01-14 Jeffrey A. Sharp System and method for distributing, receiving, and using funds or credits and apparatus thereof
CN115568032A (zh) * 2015-01-09 2023-01-03 交互数字专利控股公司 用于支持无线局域网（wlan）系统的多用户传输的方法、装置和系统
US10454499B2 (en) 2016-05-12 2019-10-22 Qualcomm Incorporated Enhanced puncturing and low-density parity-check (LDPC) code structure
CN107888198B (zh) 2016-09-30 2023-05-26 中兴通讯股份有限公司 准循环ldpc编译码方法、装置及ldpc编译码器
JP7075409B2 (ja) 2017-02-03 2022-05-25 アイディーエーシー ホールディングス インコーポレイテッド Ｌｄｐｃ基底行列の選択によるコードブロックのセグメント化
US10340949B2 (en) 2017-02-06 2019-07-02 Qualcomm Incorporated Multiple low density parity check (LDPC) base graph design
CN108809328B (zh) * 2017-05-05 2024-05-17 华为技术有限公司 信息处理的方法、通信装置
US10735134B2 (en) * 2017-08-11 2020-08-04 Qualcomm Incorporated Self-decodable redundancy versions for low-density parity-check codes
US11683393B2 (en) * 2019-09-11 2023-06-20 Intel Corporation Framework for computing in radio access network (RAN)

Also Published As

Publication number Publication date
KR20190107056A (ko) 2019-09-18
US20200119749A1 (en) 2020-04-16
AU2018214491A1 (en) 2019-07-18
MX2019008942A (es) 2019-09-11
KR102114596B1 (ko) 2020-05-22
US11277151B2 (en) 2022-03-15
US10340949B2 (en) 2019-07-02
CO2019008498A2 (es) 2019-08-20
WO2018144251A1 (en) 2018-08-09
RU2019124194A (ru) 2021-03-09
CL2019002177A1 (es) 2019-12-20
JP6937808B2 (ja) 2021-09-22
KR20200056486A (ko) 2020-05-22
TW201841474A (zh) 2018-11-16
BR112019015528A2 (pt) 2020-03-17
RU2749772C2 (ru) 2021-06-16
CN110268635B (zh) 2023-06-20
JP2020507280A (ja) 2020-03-05
RU2019124194A3 (zh) 2021-05-20
PH12019501554A1 (en) 2020-09-14
JP2020005316A (ja) 2020-01-09
TWI744463B (zh) 2021-11-01
KR20190094485A (ko) 2019-08-13
US10560118B2 (en) 2020-02-11
IL268314A (en) 2019-09-26
NZ754843A (en) 2023-01-27
EP3577763A1 (en) 2019-12-11
US20180226989A1 (en) 2018-08-09
CN110268635A (zh) 2019-09-20
US20180226988A1 (en) 2018-08-09
JP6980797B2 (ja) 2021-12-15
CA3049454A1 (en) 2018-08-09
AU2018214491B2 (en) 2022-06-09

Similar Documents

Publication Publication Date Title
SG11201905827RA (en) Multiple low density parity check (ldpc) base graph design
SG11201905916SA (en) Low density parity check (ldpc) circular buffer rate matching
SG11201808344UA (en) Enhanced puncturing and low-density parity-check (ldpc) code structure
SG11201905918RA (en) Feedback techniques for wireless communications
SG11201908288XA (en) Configurable annotations for privacy-sensitive user content
SG11201907531XA (en) Constraining motion vector information derived by decoder-side motion vector derivation
SG11201905921PA (en) Distributed multi-user (mu) wireless communication
SG11201911638SA (en) Communication techniques applying low-density parity-check code base graph selection
SG11201900274VA (en) Event trigger for independent links
SG11201901640RA (en) Method and apparatus for reception of transmit power related information
SG11201907664VA (en) Low latency enhancements to cv2x autonomous resource selection and re-selection procedure for vehicle-to-vehicle communications
SG11201907508WA (en) Single slot short pucch with support for intra slot frequency hopping
SG11201906279XA (en) Mutual-information based recursive polar code construction
CA3015496A1 (en) Voice control of a media playback system
SG11201808364RA (en) Methods and apparatus for efficiently generating multiple lifted low-density parity-check (ldpc) codes
SG11201809649WA (en) Macromolecule analysis employing nucleic acid encoding
SG11201909158QA (en) Methods and apparatuses for configuring a control resource set in a wireless communication system
SG11201807609SA (en) Wireless communication for angle of arrival determination
SG11201910145PA (en) Methods and apparatuses for control resource bundling and mapping in wireless communication systems
SG11201907216WA (en) Adjustable flow nozzle system
SG11201807367RA (en) Indicating start and stop symbols of pdsch and pusch through pdcch
SG11201811512PA (en) Systems and methods for determining an optimal strategy
SG11201909614UA (en) Increasing reference signal density in wireless communications
SG11201908068TA (en) An efficient interleaver design for polar codes
SG11201900992XA (en) Computer architecture and method for recommending asset repairs