CL2019002177A1 - Diseño de gráfica base de comprobación de paridad de baja densidad múltiple (ldpc). - Google Patents
Diseño de gráfica base de comprobación de paridad de baja densidad múltiple (ldpc).Info
- Publication number
- CL2019002177A1 CL2019002177A1 CL2019002177A CL2019002177A CL2019002177A1 CL 2019002177 A1 CL2019002177 A1 CL 2019002177A1 CL 2019002177 A CL2019002177 A CL 2019002177A CL 2019002177 A CL2019002177 A CL 2019002177A CL 2019002177 A1 CL2019002177 A1 CL 2019002177A1
- Authority
- CL
- Chile
- Prior art keywords
- ldpc
- information block
- parity check
- density parity
- chart
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- Mobile Radio Communication Systems (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Abstract
DIVERSOS ASPECTOS DE LA PRESENTE DIVULGACIÓN SE REFIEREN CODIFICACIÓN DE COMPROBACIÓN DE PARIDAD DE DENSIDAD (LDPC) QUE UTILIZA GRÁFICOS DE BASE DE LDPC. DOS O MÁS GRÁFICOS DE BASE DE LDPC SE PUEDE MANTENER QUE ESTÁN ASOCIADOS CON DIFERENTES RANGOS DE SUPERPOSICIÓN DE LONGITUDES DE BLOQUE DE INFORMACIÓN. UN GRÁFICO DE BASE DE LDPC PARTICULAR PUEDE SER SELECCIONADO PARA UN BLOQUE DE INFORMACIÓN CON BASE EN LA LONGITUD DE BLOQUE DE INFORMACIÓN DEL BLOQUE DE INFORMACIÓN. LAS MÉTRICAS ADICIONALES QUE PUEDEN SER CONSIDERADAS AL SELECCIONAR EL GRÁFICO DE BASE DE LDPC PUEDEN INCLUIR LA TASA DE CODIFICACIÓN UTILIZADA PARA CODIFICAR EL BLOQUE DE INFORMACIÓN Y/O EL TAMAÑO DE ELEVACIÓN APLICADA A CADA GRÁFICO DE BASE DE LDPC PARA PRODUCIR LA LONGITUD DEL BLOQUE DE INFORMACIÓN DEL BLOQUE DE INFORMACIÓN.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201762455450P | 2017-02-06 | 2017-02-06 | |
US15/709,400 US10340949B2 (en) | 2017-02-06 | 2017-09-19 | Multiple low density parity check (LDPC) base graph design |
Publications (1)
Publication Number | Publication Date |
---|---|
CL2019002177A1 true CL2019002177A1 (es) | 2019-12-20 |
Family
ID=63038031
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CL2019002177A CL2019002177A1 (es) | 2017-02-06 | 2019-08-02 | Diseño de gráfica base de comprobación de paridad de baja densidad múltiple (ldpc). |
Country Status (18)
Country | Link |
---|---|
US (3) | US10340949B2 (es) |
EP (1) | EP3577763A1 (es) |
JP (2) | JP6980797B2 (es) |
KR (3) | KR102114596B1 (es) |
CN (1) | CN110268635B (es) |
AU (1) | AU2018214491B2 (es) |
BR (1) | BR112019015528A2 (es) |
CA (1) | CA3049454A1 (es) |
CL (1) | CL2019002177A1 (es) |
CO (1) | CO2019008498A2 (es) |
IL (1) | IL268314A (es) |
MX (1) | MX2019008942A (es) |
NZ (1) | NZ754843A (es) |
PH (1) | PH12019501554A1 (es) |
RU (1) | RU2749772C2 (es) |
SG (1) | SG11201905827RA (es) |
TW (1) | TWI744463B (es) |
WO (1) | WO2018144251A1 (es) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
US10469104B2 (en) | 2016-06-14 | 2019-11-05 | Qualcomm Incorporated | Methods and apparatus for compactly describing lifted low-density parity-check (LDPC) codes |
US10340949B2 (en) | 2017-02-06 | 2019-07-02 | Qualcomm Incorporated | Multiple low density parity check (LDPC) base graph design |
CN108809509B (zh) * | 2017-05-05 | 2021-01-22 | 电信科学技术研究院 | 低密度奇偶校验码的基础图选择方法及装置 |
US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
CN109391367B (zh) * | 2017-08-11 | 2022-12-30 | 华为技术有限公司 | 通信方法和装置 |
BR112020003426A2 (pt) | 2017-08-24 | 2020-08-25 | Telefonaktiebolaget Lm Ericsson (Publ) | segmentação de bloco de código para novo rádio 3gpp |
WO2019164515A1 (en) * | 2018-02-23 | 2019-08-29 | Nokia Technologies Oy | Ldpc codes for 3gpp nr ultra-reliable low-latency communications |
WO2020145516A1 (ko) * | 2019-01-07 | 2020-07-16 | 엘지전자 주식회사 | 무선 통신 시스템에서 저밀도 패리티 체크 행렬을 이용한 채널 코딩을 수행하는 방법 및 장치 |
US20220231701A1 (en) * | 2021-01-20 | 2022-07-21 | Nvidia Corporation | Technique to perform decoding of wireless communications signal data |
US20240056133A1 (en) * | 2022-08-12 | 2024-02-15 | Qualcomm Incorporated | Ldpc base graph selection systems and methods |
Family Cites Families (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6633865B1 (en) | 1999-12-23 | 2003-10-14 | Pmc-Sierra Limited | Multithreaded address resolution system |
US6633856B2 (en) | 2001-06-15 | 2003-10-14 | Flarion Technologies, Inc. | Methods and apparatus for decoding LDPC codes |
US6961888B2 (en) | 2002-08-20 | 2005-11-01 | Flarion Technologies, Inc. | Methods and apparatus for encoding LDPC codes |
US7702986B2 (en) | 2002-11-18 | 2010-04-20 | Qualcomm Incorporated | Rate-compatible LDPC codes |
US6957375B2 (en) * | 2003-02-26 | 2005-10-18 | Flarion Technologies, Inc. | Method and apparatus for performing low-density parity-check (LDPC) code operations using a multi-level permutation |
US7231557B2 (en) * | 2003-04-02 | 2007-06-12 | Qualcomm Incorporated | Methods and apparatus for interleaving in a block-coherent communication system |
US7036720B2 (en) * | 2003-06-25 | 2006-05-02 | Centre National De La Recherche Scientifique (Cnrs) | Method and apparatus for resolution of problems using constrained discrete variables |
CN1902828B (zh) * | 2003-08-08 | 2012-02-29 | 英特尔公司 | 用于改变低密度奇偶校验码字长度的方法和装置 |
KR100809619B1 (ko) * | 2003-08-26 | 2008-03-05 | 삼성전자주식회사 | 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법 |
US7237181B2 (en) * | 2003-12-22 | 2007-06-26 | Qualcomm Incorporated | Methods and apparatus for reducing error floors in message passing decoders |
CN102638275B (zh) * | 2004-06-24 | 2015-01-28 | Lg电子株式会社 | 无线通信系统中使用低密度奇偶校验码编码和解码数据的方法和装置 |
US7127659B2 (en) * | 2004-08-02 | 2006-10-24 | Qualcomm Incorporated | Memory efficient LDPC decoding methods and apparatus |
EP1628401A1 (en) | 2004-08-16 | 2006-02-22 | Samsung Electronics Co., Ltd. | Apparatus and method for coding/decoding block low density parity check code with variable block length |
US7996746B2 (en) | 2004-10-12 | 2011-08-09 | Nortel Networks Limited | Structured low-density parity-check (LDPC) code |
US7630350B2 (en) * | 2005-06-06 | 2009-12-08 | Broadcom Corporation | Method and system for parsing bits in an interleaver for adaptive modulations in a multiple input multiple output (MIMO) wireless local area network (WLAN) system |
CN100502245C (zh) * | 2005-10-21 | 2009-06-17 | 中兴通讯股份有限公司 | 支持任何码率/码长的低密度奇偶校验码编码装置和方法 |
KR100833515B1 (ko) | 2006-12-05 | 2008-05-29 | 한국전자통신연구원 | 가변 정보 길이 및 가변 부호율을 가진 ldpc 부호의패리티 검사 행렬 생성 방법, 부/복호화 방법 및 이를이용하는 장치 |
KR101339120B1 (ko) | 2007-01-24 | 2013-12-09 | 퀄컴 인코포레이티드 | 가변 크기들의 패킷들의 ldpc 인코딩 및 디코딩 |
US7861134B2 (en) * | 2007-02-28 | 2010-12-28 | Cenk Kose | Methods and systems for LDPC coding |
US7912028B2 (en) * | 2007-05-31 | 2011-03-22 | Agere Systems Inc. | Reducing false detection in an HSDPA 3G terminal |
CN101141133B (zh) * | 2007-10-23 | 2011-09-14 | 北京邮电大学 | 一种结构化低密度校验码的编码方法 |
US20090113256A1 (en) * | 2007-10-24 | 2009-04-30 | Nokia Corporation | Method, computer program product, apparatus and device providing scalable structured high throughput LDPC decoding |
US8219876B2 (en) * | 2007-10-24 | 2012-07-10 | Core Wireless Licensing, S.a.r.l. | Method, apparatus, computer program product and device providing semi-parallel low density parity check decoding using a block structured parity check matrix |
WO2009064439A2 (en) * | 2007-11-12 | 2009-05-22 | Solarflare Communications, Inc. | Active idle communication system |
KR101503058B1 (ko) * | 2008-02-26 | 2015-03-18 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치 |
KR20100058260A (ko) * | 2008-11-24 | 2010-06-03 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 장치 및 방법 |
US8433972B2 (en) | 2009-04-06 | 2013-04-30 | Nec Laboratories America, Inc. | Systems and methods for constructing the base matrix of quasi-cyclic low-density parity-check codes |
US8595589B2 (en) | 2011-09-30 | 2013-11-26 | Mitsubishi Electric Research Laboratories, Inc. | Quasi-cyclic low-density parity-check codes |
CN102571105B (zh) * | 2012-02-24 | 2014-03-12 | 西安电子科技大学 | 一种逼近信道容量的码率可变ldpc码的编码方法 |
WO2014117836A1 (en) | 2013-01-31 | 2014-08-07 | Intracom S.A. Telecom Solutions | Ldpc code design and encoding apparatus enabling the adjustment of code rate and codelength |
US20160012465A1 (en) * | 2014-02-08 | 2016-01-14 | Jeffrey A. Sharp | System and method for distributing, receiving, and using funds or credits and apparatus thereof |
CN115568032A (zh) * | 2015-01-09 | 2023-01-03 | 交互数字专利控股公司 | 用于支持无线局域网(wlan)系统的多用户传输的方法、装置和系统 |
US10454499B2 (en) | 2016-05-12 | 2019-10-22 | Qualcomm Incorporated | Enhanced puncturing and low-density parity-check (LDPC) code structure |
CN107888198B (zh) | 2016-09-30 | 2023-05-26 | 中兴通讯股份有限公司 | 准循环ldpc编译码方法、装置及ldpc编译码器 |
BR112019016156A2 (pt) | 2017-02-03 | 2020-03-24 | Idac Holdings, Inc. | Unidade de transmissão/recepção sem fio, e, método implementado em uma unidade de transmissão/recepção sem fio |
US10340949B2 (en) | 2017-02-06 | 2019-07-02 | Qualcomm Incorporated | Multiple low density parity check (LDPC) base graph design |
CN110535474B (zh) * | 2017-05-05 | 2023-06-06 | 华为技术有限公司 | 信息处理的方法、通信装置 |
US10735134B2 (en) * | 2017-08-11 | 2020-08-04 | Qualcomm Incorporated | Self-decodable redundancy versions for low-density parity-check codes |
US11683393B2 (en) * | 2019-09-11 | 2023-06-20 | Intel Corporation | Framework for computing in radio access network (RAN) |
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2017
- 2017-09-19 US US15/709,400 patent/US10340949B2/en active Active
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2018
- 2018-01-19 KR KR1020197022922A patent/KR102114596B1/ko active IP Right Grant
- 2018-01-19 RU RU2019124194A patent/RU2749772C2/ru active
- 2018-01-19 BR BR112019015528-7A patent/BR112019015528A2/pt unknown
- 2018-01-19 SG SG11201905827RA patent/SG11201905827RA/en unknown
- 2018-01-19 CN CN201880009988.4A patent/CN110268635B/zh active Active
- 2018-01-19 KR KR1020197022930A patent/KR20190107056A/ko not_active Application Discontinuation
- 2018-01-19 NZ NZ754843A patent/NZ754843A/en unknown
- 2018-01-19 EP EP18703163.8A patent/EP3577763A1/en active Pending
- 2018-01-19 JP JP2019541418A patent/JP6980797B2/ja active Active
- 2018-01-19 CA CA3049454A patent/CA3049454A1/en active Pending
- 2018-01-19 KR KR1020207013904A patent/KR20200056486A/ko not_active Application Discontinuation
- 2018-01-19 TW TW107102002A patent/TWI744463B/zh active
- 2018-01-19 AU AU2018214491A patent/AU2018214491B2/en active Active
- 2018-01-19 WO PCT/US2018/014528 patent/WO2018144251A1/en active Application Filing
- 2018-01-19 MX MX2019008942A patent/MX2019008942A/es unknown
- 2018-04-02 US US15/943,624 patent/US10560118B2/en active Active
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2019
- 2019-07-02 PH PH12019501554A patent/PH12019501554A1/en unknown
- 2019-07-29 IL IL268314A patent/IL268314A/en unknown
- 2019-08-02 CL CL2019002177A patent/CL2019002177A1/es unknown
- 2019-08-02 CO CONC2019/0008498A patent/CO2019008498A2/es unknown
- 2019-10-02 JP JP2019182139A patent/JP6937808B2/ja active Active
- 2019-12-13 US US16/714,606 patent/US11277151B2/en active Active
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