SG11201811295TA - Polycrystalline ceramic substrate and method of manufacture - Google Patents

Polycrystalline ceramic substrate and method of manufacture

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Publication number
SG11201811295TA
SG11201811295TA SG11201811295TA SG11201811295TA SG11201811295TA SG 11201811295T A SG11201811295T A SG 11201811295TA SG 11201811295T A SG11201811295T A SG 11201811295TA SG 11201811295T A SG11201811295T A SG 11201811295TA SG 11201811295T A SG11201811295T A SG 11201811295TA
Authority
SG
Singapore
Prior art keywords
international
quora
barrier layer
santa clara
ceramic substrate
Prior art date
Application number
SG11201811295TA
Inventor
Vladimir Odnoblyudov
Cem Basceri
Shari Farrens
Original Assignee
Qromis Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qromis Inc filed Critical Qromis Inc
Publication of SG11201811295TA publication Critical patent/SG11201811295TA/en

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    • HELECTRICITY
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
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    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
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    • C30B29/403AIII-nitrides
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    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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  • General Chemical & Material Sciences (AREA)
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  • Plasma & Fusion (AREA)
  • Recrystallisation Techniques (AREA)
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Abstract

INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 111111101111 11 11111111111111 11111111111111111111111111111111111111111111111111111110111111 Organization International Bureau (10) International Publication Number (43) International Publication Date ......0\"\" WO 2017/222873 Al 28 December 2017 (28.12.2017) WIP0 I PCT — (51) (21) (22) (25) Filing Language: (26) (30) (71) (72) International Patent Classification: H01L 21/84 (2006.01) HO1L 27/12 (2006.01) H01L 21/20 (2006.01) H01L 33/02 (2010.01) (74) H01L 21/30 (2006.01) International Application Number: PCT/US2017/037213 (81) International Filing Date: 13 June 2017 (13.06.2017) English Publication Language: English Priority Data: 62/354,623 24 June 2016 (24.06.2016) US Applicant: QUORA TECHNOLOGY, INC. [US/US]; 2306 Walsh Avenue, Santa Clara, California 95051 (US). Inventors: ODNOBLYUDOV, Vladimir; c/o Quora (84) Technology, Inc., 2306 Walsh Avenue, Santa Clara, Cali- fornia 95032 (US). BASCERI, Cem; c/o Quora Technolo- gy, Inc., 2306 Walsh Avenue, Santa Clara, California 95051 (US). FARRENS, Shari; c/o Quora Technology, Inc., 2306 Walsh Avenue, Santa Clara, California 95051 (US). Agent: LARGENT, Craig C. et al.; Kilpatrick Townsend & Stockton LLP, Mailstop: IP Docketing-22, 1100 Peachtree Street, Suite 2800, Atlanta, Georgia 30309 (US). Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, = Title: : the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding at least a portion of the exposed barrier layer and the fill regions. (54) ---- substrate POLYCRYSTALLINE CERAMIC SUBSTRATE AND METHOD OF MANUFACTURE ......., 5 _ ceramic a portion layer on _ = • . . • 118 = = = = = f r ,ff \ - 116 iti 7 _ ,\" 114 ''\"--112 = = = = = 1 -1 M IN GC ei ei el (57) IN ,1 of 0 the ei • „ „ .4 112 114 A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing . 116 FIG. 1A 118 C [Continued on next page] WO 2017/222873 Al IMEDIMOM0101011MMEMODIMMOHMOHIIMOVOIMIE TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, SK, SM, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3))
SG11201811295TA 2016-06-24 2017-06-13 Polycrystalline ceramic substrate and method of manufacture SG11201811295TA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201662354623P 2016-06-24 2016-06-24
PCT/US2017/037213 WO2017222873A1 (en) 2016-06-24 2017-06-13 Polycrystalline ceramic substrate and method of manufacture

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SG11201811295TA true SG11201811295TA (en) 2019-01-30

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US (5) US10134589B2 (en)
EP (2) EP3475975B1 (en)
JP (3) JP6719600B2 (en)
KR (3) KR102391997B1 (en)
CN (2) CN116936703A (en)
SG (1) SG11201811295TA (en)
TW (5) TWI767788B (en)
WO (1) WO2017222873A1 (en)

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KR102391997B1 (en) 2016-06-24 2022-04-28 큐로미스, 인크 Polycrystalline ceramic substrate and manufacturing method thereof
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