SG107561A1 - Method of fabricating a stacked poly-poly and mos capacitor using a sige integration scheme - Google Patents

Method of fabricating a stacked poly-poly and mos capacitor using a sige integration scheme

Info

Publication number
SG107561A1
SG107561A1 SG200101931A SG200101931A SG107561A1 SG 107561 A1 SG107561 A1 SG 107561A1 SG 200101931 A SG200101931 A SG 200101931A SG 200101931 A SG200101931 A SG 200101931A SG 107561 A1 SG107561 A1 SG 107561A1
Authority
SG
Singapore
Prior art keywords
poly
polysilicon layer
mos capacitor
fabricating
stacked
Prior art date
Application number
SG200101931A
Other languages
English (en)
Inventor
Duane Coolbaugh Douglas
Stuart Dunn James
Arthur St Onge Stephen
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of SG107561A1 publication Critical patent/SG107561A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0805—Capacitors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electric Double-Layer Capacitors Or The Like (AREA)
SG200101931A 2000-04-17 2001-03-26 Method of fabricating a stacked poly-poly and mos capacitor using a sige integration scheme SG107561A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/551,168 US6507063B2 (en) 2000-04-17 2000-04-17 Poly-poly/MOS capacitor having a gate encapsulating first electrode layer

Publications (1)

Publication Number Publication Date
SG107561A1 true SG107561A1 (en) 2004-12-29

Family

ID=24200135

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200101931A SG107561A1 (en) 2000-04-17 2001-03-26 Method of fabricating a stacked poly-poly and mos capacitor using a sige integration scheme

Country Status (12)

Country Link
US (2) US6507063B2 (es)
EP (1) EP1148557B1 (es)
JP (1) JP2002009163A (es)
KR (1) KR20010096611A (es)
CN (1) CN1184698C (es)
AT (1) ATE360890T1 (es)
DE (1) DE60128028T2 (es)
ES (1) ES2281379T3 (es)
IL (1) IL140565A0 (es)
MY (1) MY133800A (es)
SG (1) SG107561A1 (es)
TW (1) TW506043B (es)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6440811B1 (en) * 2000-12-21 2002-08-27 International Business Machines Corporation Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme
EP1390112B1 (en) * 2001-05-31 2005-11-30 The Procter & Gamble Company Trigger mechanism for initiating a phase change in a variable liquid element
JP2003224204A (ja) * 2002-01-29 2003-08-08 Mitsubishi Electric Corp キャパシタを有する半導体装置
KR100451517B1 (ko) * 2002-07-19 2004-10-06 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법
JP2004228188A (ja) * 2003-01-21 2004-08-12 Renesas Technology Corp 半導体装置
TWI233689B (en) * 2003-04-14 2005-06-01 Samsung Electronics Co Ltd Capacitors of semiconductor devices including silicon-germanium and metallic electrodes and methods of fabricating the same
DE10324066A1 (de) * 2003-05-27 2004-12-30 Texas Instruments Deutschland Gmbh Stapelkondensator und Verfahren zur Herstellung eines solchen
CN1327525C (zh) * 2003-12-24 2007-07-18 上海宏力半导体制造有限公司 测量电容的结构与方法
EP1560269A1 (en) * 2004-01-30 2005-08-03 Alcatel MOS capacitor in an integrated semiconductor circuit
US7709313B2 (en) * 2005-07-19 2010-05-04 International Business Machines Corporation High performance capacitors in planar back gates CMOS
CN100446254C (zh) * 2005-12-15 2008-12-24 上海华虹Nec电子有限公司 半导体电容
US7821053B2 (en) * 2006-11-15 2010-10-26 International Business Machines Corporation Tunable capacitor
US7670920B2 (en) 2007-04-09 2010-03-02 Texas Instruments Incorporated Methods and apparatus for forming a polysilicon capacitor
KR100979001B1 (ko) * 2007-12-27 2010-08-30 주식회사 동부하이텍 커패시터 및 커패시터 제조 방법
CN102088001B (zh) * 2009-12-04 2013-10-09 中芯国际集成电路制造(上海)有限公司 快闪存储器及其制作方法
US8318575B2 (en) 2011-02-07 2012-11-27 Infineon Technologies Ag Compressive polycrystalline silicon film and method of manufacture thereof
US9112060B2 (en) 2011-03-23 2015-08-18 Freescale Semiconductor, Inc. Low-leakage, high-capacitance capacitor structures and method of making
US9581772B2 (en) 2011-09-09 2017-02-28 Centera Photonics Inc. Optical electrical module used for optical communication
US11009788B2 (en) 2011-09-09 2021-05-18 Centera Photonics Inc. Method for manufacturing optical electrical module and substrate of an optical electrical module
US9379202B2 (en) * 2012-11-12 2016-06-28 Nvidia Corporation Decoupling capacitors for interposers
CN104851776A (zh) * 2014-02-14 2015-08-19 中芯国际集成电路制造(上海)有限公司 MiS电容器结构及其制造方法
JP2016162904A (ja) * 2015-03-03 2016-09-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9905707B1 (en) * 2016-10-28 2018-02-27 Globalfoundries Inc. MOS capacitive structure of reduced capacitance variability
CN111180394B (zh) * 2018-11-13 2022-09-09 无锡华润上华科技有限公司 形成有电容器的半导体器件及其制造方法
KR20200113871A (ko) 2019-03-26 2020-10-07 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 제조방법
US11257940B2 (en) * 2020-01-14 2022-02-22 Cree, Inc. Group III HEMT and capacitor that share structural features

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4246502A (en) * 1978-08-16 1981-01-20 Mitel Corporation Means for coupling incompatible signals to an integrated circuit and for deriving operating supply therefrom
US4434433A (en) * 1977-02-21 1984-02-28 Zaidan Hojin Handotai Kenkyu Shinkokai Enhancement mode JFET dynamic memory
US4805071A (en) * 1987-11-30 1989-02-14 Texas Instruments Incorporated High voltage capacitor for integrated circuits

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2654393B2 (ja) * 1988-05-16 1997-09-17 株式会社日立製作所 半導体装置
US4914546A (en) * 1989-02-03 1990-04-03 Micrel Incorporated Stacked multi-polysilicon layer capacitor
JPH0389545A (ja) * 1989-08-31 1991-04-15 Sharp Corp 集積回路のためのキャパシタ
US5236859A (en) * 1990-06-05 1993-08-17 Samsung Electronics Co., Ltd. Method of making stacked-capacitor for a dram cell same
US5104822A (en) * 1990-07-30 1992-04-14 Ramtron Corporation Method for creating self-aligned, non-patterned contact areas and stacked capacitors using the method
US5082797A (en) * 1991-01-22 1992-01-21 Micron Technology, Inc. Method of making stacked textured container capacitor
US5206788A (en) * 1991-12-12 1993-04-27 Ramtron Corporation Series ferroelectric capacitor structure for monolithic integrated circuits and method
JP3120528B2 (ja) * 1992-01-29 2000-12-25 日本電気株式会社 半導体装置
KR940016805A (ko) * 1992-12-31 1994-07-25 김주용 반도체 소자의 적층 캐패시터 제조 방법
US5583359A (en) * 1995-03-03 1996-12-10 Northern Telecom Limited Capacitor structure for an integrated circuit
US5663088A (en) 1995-05-19 1997-09-02 Micron Technology, Inc. Method of forming a Ta2 O5 dielectric layer with amorphous diffusion barrier layer and method of forming a capacitor having a Ta2 O5 dielectric layer and amorphous diffusion barrier layer
DE19531629C1 (de) * 1995-08-28 1997-01-09 Siemens Ag Verfahren zur Herstellung einer EEPROM-Halbleiterstruktur
US5602051A (en) 1995-10-06 1997-02-11 International Business Machines Corporation Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level
KR100275544B1 (ko) 1995-12-20 2001-01-15 이계철 선택적 컬렉터 박막 성장을 이용한 초자기정렬 바이폴러 트랜지스터의 제조방법
US6072160A (en) * 1996-06-03 2000-06-06 Applied Materials, Inc. Method and apparatus for enhancing the efficiency of radiant energy sources used in rapid thermal processing of substrates by energy reflection
KR100413805B1 (ko) 1996-10-31 2004-06-26 삼성전자주식회사 누설전류를이용한매트릭스형다진법강유전체랜덤액세서메모리
US5918119A (en) 1997-12-08 1999-06-29 Taiwan Semiconductor Manufacturing Company, Ltd. Process for integrating MOSFET devices, comprised of different gate insulator thicknesses, with a capacitor structure
TW377512B (en) * 1998-02-06 1999-12-21 United Microelectronics Corp Capacitor for DRAM and the method of manufacturing the same
US6288419B1 (en) * 1999-07-09 2001-09-11 Micron Technology, Inc. Low resistance gate flash memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4434433A (en) * 1977-02-21 1984-02-28 Zaidan Hojin Handotai Kenkyu Shinkokai Enhancement mode JFET dynamic memory
US4246502A (en) * 1978-08-16 1981-01-20 Mitel Corporation Means for coupling incompatible signals to an integrated circuit and for deriving operating supply therefrom
US4805071A (en) * 1987-11-30 1989-02-14 Texas Instruments Incorporated High voltage capacitor for integrated circuits

Also Published As

Publication number Publication date
KR20010096611A (ko) 2001-11-07
ES2281379T3 (es) 2007-10-01
CN1184698C (zh) 2005-01-12
DE60128028T2 (de) 2008-01-03
IL140565A0 (en) 2002-02-10
EP1148557B1 (en) 2007-04-25
US6507063B2 (en) 2003-01-14
EP1148557A3 (en) 2003-08-27
MY133800A (en) 2007-11-30
CN1318869A (zh) 2001-10-24
US20030092239A1 (en) 2003-05-15
US6833299B2 (en) 2004-12-21
US20020089008A1 (en) 2002-07-11
JP2002009163A (ja) 2002-01-11
ATE360890T1 (de) 2007-05-15
TW506043B (en) 2002-10-11
DE60128028D1 (de) 2007-06-06
EP1148557A2 (en) 2001-10-24

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