SE9001770D0 - Output buffer precharge circuit for dram - Google Patents

Output buffer precharge circuit for dram

Info

Publication number
SE9001770D0
SE9001770D0 SE9001770A SE9001770A SE9001770D0 SE 9001770 D0 SE9001770 D0 SE 9001770D0 SE 9001770 A SE9001770 A SE 9001770A SE 9001770 A SE9001770 A SE 9001770A SE 9001770 D0 SE9001770 D0 SE 9001770D0
Authority
SE
Sweden
Prior art keywords
output buffer
precharge
dram
generating section
transition
Prior art date
Application number
SE9001770A
Other languages
English (en)
Other versions
SE9001770L (sv
SE513715C2 (sv
Inventor
J You
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SE9001770D0 publication Critical patent/SE9001770D0/sv
Publication of SE9001770L publication Critical patent/SE9001770L/sv
Publication of SE513715C2 publication Critical patent/SE513715C2/sv

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Bus Control (AREA)
SE9001770A 1989-06-15 1990-05-16 Utgångskrets för dynamiska direktaccessminnesceller SE513715C2 (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890008263A KR910005602B1 (ko) 1989-06-15 1989-06-15 어드레스 변환 검출에 따른 출력버퍼의 프리챠아지 제어방법

Publications (3)

Publication Number Publication Date
SE9001770D0 true SE9001770D0 (sv) 1990-05-16
SE9001770L SE9001770L (sv) 1990-12-16
SE513715C2 SE513715C2 (sv) 2000-10-30

Family

ID=19287133

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9001770A SE513715C2 (sv) 1989-06-15 1990-05-16 Utgångskrets för dynamiska direktaccessminnesceller

Country Status (11)

Country Link
US (1) US5058066A (sv)
JP (1) JPH0632216B2 (sv)
KR (1) KR910005602B1 (sv)
CN (1) CN1019706B (sv)
DE (1) DE4006703A1 (sv)
FR (1) FR2648610B1 (sv)
GB (1) GB2233131B (sv)
IT (1) IT1248661B (sv)
NL (1) NL9000467A (sv)
RU (1) RU2051429C1 (sv)
SE (1) SE513715C2 (sv)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4857768A (en) * 1988-04-27 1989-08-15 Sun Microsystems, Inc. Triple rail logic gate
KR930003929B1 (ko) * 1990-08-09 1993-05-15 삼성전자 주식회사 데이타 출력버퍼
KR940005688B1 (ko) * 1991-09-05 1994-06-22 삼성전자 주식회사 메모리 소자에 있어서 데이터 라인의 프리챠아지 자동 검사 장치
FR2694121B1 (fr) * 1992-07-24 1995-09-22 Sgs Thomson Microelectronics Memoire en circuit integre avec prechaarge prealable en sortie.
US5469385A (en) * 1993-05-11 1995-11-21 Texas Instruments Incorporated Output buffer with boost from voltage supplies
US5349566A (en) * 1993-05-19 1994-09-20 Micron Semiconductor, Inc. Memory device with pulse circuit for timing data output, and method for outputting data
JPH07182864A (ja) * 1993-12-21 1995-07-21 Mitsubishi Electric Corp 半導体記憶装置
JP2634141B2 (ja) * 1994-01-19 1997-07-23 インターナショナル・ビジネス・マシーンズ・コーポレイション マルチプロセッサ・システム
KR960004567B1 (ko) * 1994-02-04 1996-04-09 삼성전자주식회사 반도체 메모리 장치의 데이타 출력 버퍼
US5729503A (en) * 1994-12-23 1998-03-17 Micron Technology, Inc. Address transition detection on a synchronous design
US5610864A (en) * 1994-12-23 1997-03-11 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5675549A (en) * 1994-12-23 1997-10-07 Micron Technology, Inc. Burst EDO memory device address counter
US6525971B2 (en) 1995-06-30 2003-02-25 Micron Technology, Inc. Distributed write data drivers for burst access memories
US5668773A (en) * 1994-12-23 1997-09-16 Micron Technology, Inc. Synchronous burst extended data out DRAM
US5721859A (en) * 1994-12-23 1998-02-24 Micron Technology, Inc. Counter control circuit in a burst memory
US5682354A (en) * 1995-11-06 1997-10-28 Micron Technology, Inc. CAS recognition in burst extended data out DRAM
US6804760B2 (en) 1994-12-23 2004-10-12 Micron Technology, Inc. Method for determining a type of memory present in a system
US5640364A (en) * 1994-12-23 1997-06-17 Micron Technology, Inc. Self-enabling pulse trapping circuit
US5526320A (en) 1994-12-23 1996-06-11 Micron Technology Inc. Burst EDO memory device
US5652724A (en) * 1994-12-23 1997-07-29 Micron Technology, Inc. Burst EDO memory device having pipelined output buffer
US5717654A (en) * 1995-02-10 1998-02-10 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5850368A (en) * 1995-06-01 1998-12-15 Micron Technology, Inc. Burst EDO memory address counter
US5729504A (en) * 1995-12-14 1998-03-17 Micron Technology, Inc. Continuous burst edo memory device
US5966724A (en) * 1996-01-11 1999-10-12 Micron Technology, Inc. Synchronous memory device with dual page and burst mode operations
US7681005B1 (en) 1996-01-11 2010-03-16 Micron Technology, Inc. Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation
US6401186B1 (en) 1996-07-03 2002-06-04 Micron Technology, Inc. Continuous burst memory which anticipates a next requested start address
US6981126B1 (en) 1996-07-03 2005-12-27 Micron Technology, Inc. Continuous interleave burst access
US7103742B1 (en) 1997-12-03 2006-09-05 Micron Technology, Inc. Burst/pipelined edo memory device
US6281719B1 (en) 1999-10-29 2001-08-28 Macronix International Co., Ltd. Output pad precharge circuit for semiconductor devices
US6292405B1 (en) * 2000-08-11 2001-09-18 Stmicroelectronics S.R.L. Data output buffer with precharge
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
CN111293738A (zh) * 2018-12-10 2020-06-16 法雷奥动力总成(上海)有限公司 预充电控制电路及预充电控制方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4291393A (en) * 1980-02-11 1981-09-22 Mostek Corporation Active refresh circuit for dynamic MOS circuits
JPS58108091A (ja) * 1981-12-21 1983-06-28 Nec Corp メモリ回路
JPS5942690A (ja) * 1982-09-03 1984-03-09 Toshiba Corp 半導体記憶装置
JPS59181829A (ja) * 1983-03-31 1984-10-16 Toshiba Corp 半導体素子の出力バツフア回路
JPS6214520A (ja) * 1985-07-12 1987-01-23 Sony Corp メモリの出力バツフア回路
US4658381A (en) * 1985-08-05 1987-04-14 Motorola, Inc. Bit line precharge on a column address change
US4716550A (en) * 1986-07-07 1987-12-29 Motorola, Inc. High performance output driver
JPS6381551A (ja) * 1986-09-25 1988-04-12 Sony Corp メモリ装置
JPH0817037B2 (ja) * 1987-12-03 1996-02-21 松下電子工業株式会社 スタティックｒａｍの出力回路

Also Published As

Publication number Publication date
SE9001770L (sv) 1990-12-16
DE4006703A1 (de) 1991-01-03
GB2233131A (en) 1991-01-02
CN1019706B (zh) 1992-12-30
JPH0330185A (ja) 1991-02-08
CN1048622A (zh) 1991-01-16
FR2648610A1 (fr) 1990-12-21
FR2648610B1 (fr) 1993-12-03
IT1248661B (it) 1995-01-26
NL9000467A (nl) 1991-01-02
KR910005602B1 (ko) 1991-07-31
IT9020460A1 (it) 1991-11-29
RU2051429C1 (ru) 1995-12-27
SE513715C2 (sv) 2000-10-30
GB2233131B (en) 1994-03-16
GB9004473D0 (en) 1990-04-25
JPH0632216B2 (ja) 1994-04-27
IT9020460A0 (it) 1990-05-29
KR910001747A (ko) 1991-01-31
US5058066A (en) 1991-10-15

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