SE8904169D0 - APPARATUS FOR DECODING BCH CODE FOR CORRECTING COMPLEX ERROR - Google Patents
APPARATUS FOR DECODING BCH CODE FOR CORRECTING COMPLEX ERRORInfo
- Publication number
- SE8904169D0 SE8904169D0 SE8904169A SE8904169A SE8904169D0 SE 8904169 D0 SE8904169 D0 SE 8904169D0 SE 8904169 A SE8904169 A SE 8904169A SE 8904169 A SE8904169 A SE 8904169A SE 8904169 D0 SE8904169 D0 SE 8904169D0
- Authority
- SE
- Sweden
- Prior art keywords
- circuit
- bit
- bch code
- combining circuits
- outputs
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/17—Burst error correction, e.g. error trapping, Fire codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
The apparatus includes a circuit (2) for generating two n-bit syndromes corresponding to the received signal, a circuit (4) for converting the two n-bit syndromes to a 2n-bit syndrome, a random error correcting circuit (7), a burst error correcting circuit (5), two combining circuits (11a, 11b) and output selecting circuit (6). The circuit (7) inputs the two n-bit syndromes and outputs a random error correction signal to one of the combining circuits (11a) and the circuit (5) inputs the 2n-bit syndrome and outputs a burst error correction signal to the other of the combining circuits (11b). The combining circuits combine the correction signals to the received BCH code signal. The output selecting circuit (6) selectively outputs one of the combined signals in accordance with the decoding conditions of the error correcting circuits (5, 7) and the result of comparison between the decoded and error-corrected signals.
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Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1121909A JPH02301226A (en) | 1989-05-15 | 1989-05-15 | Composite error correction bch decoding circuit |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| SE8904169D0 true SE8904169D0 (en) | 1989-12-11 |
| SE8904169L SE8904169L (en) | 1990-11-16 |
| SE512145C2 SE512145C2 (en) | 2000-01-31 |
Family
ID=14822911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SE8904169A SE512145C2 (en) | 1989-05-15 | 1989-12-11 | Device for correction of burst and random errors |
Country Status (11)
| Country | Link |
|---|---|
| JP (1) | JPH02301226A (en) |
| KR (1) | KR940002112B1 (en) |
| CA (1) | CA2011103C (en) |
| CH (1) | CH680031A5 (en) |
| DE (1) | DE4005533C2 (en) |
| FR (1) | FR2646976B1 (en) |
| GB (1) | GB2232043B (en) |
| IT (1) | IT1237726B (en) |
| NL (1) | NL191348C (en) |
| NO (1) | NO305879B1 (en) |
| SE (1) | SE512145C2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03235528A (en) * | 1990-02-13 | 1991-10-21 | Sharp Corp | Bch code decoding circuit |
| NL9101376A (en) * | 1990-08-16 | 1992-03-16 | Digital Equipment Corp | AN IMPROVED ERROR DETECTION CODING SYSTEM. |
| US5377208A (en) * | 1991-11-02 | 1994-12-27 | U.S. Philips Corporation | Transmission system with random error and burst error correction for a cyclically coded digital signal |
| JP2944489B2 (en) * | 1995-10-14 | 1999-09-06 | 日本電気株式会社 | Error correction method in wireless transmission system |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3544963A (en) * | 1968-12-27 | 1970-12-01 | Bell Telephone Labor Inc | Random and burst error-correcting arrangement |
| US4592054A (en) * | 1982-10-22 | 1986-05-27 | Mitsubishi Denki Kabushiki Kaisha | Decoder with code error correcting function |
| JPS5975732A (en) * | 1982-10-22 | 1984-04-28 | Mitsubishi Electric Corp | Decoder |
| GB2131253A (en) * | 1982-11-24 | 1984-06-13 | Motorola Ltd | Error-correcting decoder |
| GB2136248A (en) * | 1983-02-25 | 1984-09-12 | Philips Electronic Associated | Text error correction in digital data transmission systems |
| US4646303A (en) * | 1983-10-05 | 1987-02-24 | Nippon Gakki Seizo Kabushiki Kaisha | Data error detection and correction circuit |
| JPS61105931A (en) * | 1984-10-30 | 1986-05-24 | Mitsubishi Electric Corp | Decoder |
| JPS6276825A (en) * | 1985-09-30 | 1987-04-08 | Hitachi Ltd | Code error correcting method |
| JPS62268215A (en) * | 1986-05-16 | 1987-11-20 | Fuji Electric Co Ltd | Galois field arithmetic circuit |
| JPS6427322A (en) * | 1988-04-21 | 1989-01-30 | Sony Corp | Arithmetic circuit for galois field |
-
1989
- 1989-05-15 JP JP1121909A patent/JPH02301226A/en active Pending
- 1989-11-29 NO NO894757A patent/NO305879B1/en not_active IP Right Cessation
- 1989-12-11 SE SE8904169A patent/SE512145C2/en not_active IP Right Cessation
- 1989-12-18 NL NL8903084A patent/NL191348C/en not_active IP Right Cessation
- 1989-12-22 IT IT06815689A patent/IT1237726B/en active IP Right Grant
-
1990
- 1990-01-09 FR FR9000185A patent/FR2646976B1/en not_active Expired - Fee Related
- 1990-01-12 GB GB9000712A patent/GB2232043B/en not_active Expired - Fee Related
- 1990-01-25 CH CH239/90A patent/CH680031A5/de not_active IP Right Cessation
- 1990-02-19 DE DE4005533A patent/DE4005533C2/en not_active Expired - Fee Related
- 1990-02-26 CA CA002011103A patent/CA2011103C/en not_active Expired - Fee Related
- 1990-05-15 KR KR1019900006248A patent/KR940002112B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| GB9000712D0 (en) | 1990-03-14 |
| FR2646976B1 (en) | 1996-08-02 |
| DE4005533C2 (en) | 1998-01-22 |
| GB2232043B (en) | 1993-07-14 |
| IT8968156A0 (en) | 1989-12-22 |
| FR2646976A1 (en) | 1990-11-16 |
| NO894757L (en) | 1990-11-16 |
| JPH02301226A (en) | 1990-12-13 |
| CA2011103C (en) | 1996-01-02 |
| KR940002112B1 (en) | 1994-03-17 |
| NO894757D0 (en) | 1989-11-29 |
| CH680031A5 (en) | 1992-05-29 |
| DE4005533A1 (en) | 1990-12-13 |
| NL8903084A (en) | 1990-12-03 |
| KR900019400A (en) | 1990-12-24 |
| NL191348C (en) | 1995-06-01 |
| GB2232043A (en) | 1990-11-28 |
| CA2011103A1 (en) | 1990-11-15 |
| IT1237726B (en) | 1993-06-15 |
| SE512145C2 (en) | 2000-01-31 |
| NO305879B1 (en) | 1999-08-09 |
| SE8904169L (en) | 1990-11-16 |
| NL191348B (en) | 1995-01-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| NUG | Patent has lapsed |