JPS6133023A - Coding and decoding device - Google Patents

Abstract

PURPOSE:To treat a C1 code as the one equal to a 2-dimensional code while maintaining the correcting capacity of a Reed Solomon RS code, bu regarding the C1 code as the 2-dimensional code and the RS code on a Galois field. CONSTITUTION:The information supplied from a terminal 1 is calculated by S0 and S8 syndrome calculation circuits 11 and 12 respectively and supplied to a divider circuit 13 of a Galois field. Then X=S8/S0 is carried out on a Galois field GF(2<8>). The value X is converted by a logarithm ROM14 and multiplied by 1/8 through a coefficient unit 15 to be latched by a register 16 in the form of the number of error positions. An error patten sent from the circuit 11 is latched by a register 17, and the outputs of both registers 16 and 17 are supplied to a correction circuit 18 together with the input information delayed by a delay circuit 19. Thus an error is corrected and checked by an S4 syndrome recheck circuit 20. When a correct correction is confirmed, the information is delivered through a terminal 2. Then the detection information is outputted through a terminal 21 when an error is checked.

Description

[Detailed description of the invention] [Technical field of invention] This invention relates to error correction codes.

In particular, it relates to the encoding/decoding device.

[Prior art]

FIG. 1 is an explanatory diagram of a decoder that decodes double codes. In the figure, (1) is the information input terminal, and (2) is the output terminal.

(31 is 01'OI1 encoder, (4) is C2 decoder. In this example, C1 is ("1v R19dl) binary code, (example λ is ORO (Cyclic Redunda)
ncy Check) code) C2 is (I2°R2, d
2) It is encoded with an R8 (Reed-Solomon) code, and the information input from the input terminal is subjected to syndrome calculation by a binary code serial shift register, error detection or correction, and output to the C2 decoder. There, the error is corrected again and outputted from the output terminal (2). Here, (n, k, d) code means code length n,
It is a linear code with k number of information symbols and minimum distance d. In this case, the C1 code is a binary code, so if it is used only for error detection, it can be configured with a 1-stage nl k shift register, but since it is a binary code, the hardware is more complicated than an R8 code etc. The number of error bits that can be corrected is small, and it is not particularly effective against burst errors.

FIG. 2 is another conventional example, and (5) is an example in which a zero-fold code is used in the SR and decoder. In this case, if the Galois fields GP (2m) of codes C4 and C2 were made the same field, a considerable part of the hardware including the syndrome calculation circuit could be made common. However, in this case.

Even if an attempt was made to use the C1 code only for detection, an 11k1 stage shift register would not be able to perform mJ&, and hardware of approximately the same level as a syndrome calculation circuit would be required.

[Summary of the invention]

The present invention has been developed to eliminate such problems in the conventional technology, and is configured with a shift register of 11 k1 stages when 01 is used only for detection, and which can be used in common with C2 code hardware when performing 01 correction. It has the same structure as the R8 code, and its correction ability is exactly the same as that of the R8 code, and it is characterized by being able to detect errors using the same method as the binary code.

[Embodiments of the invention]

FIG. 3 shows a C1 code encoder according to the present invention, and in this example, encoding is performed using a generator polynomial.

In the 3rd L\1 (61 is the input terminal, (7) is the output terminal, (
81-digit shift register, (9) is exclusive OR gate, Sl.

82 is a switch, and 82 is an OR gate.

In the embodiment of the 41st ¥1 digit decoding circuit, (1) is an information input terminal, (2) is an information output terminal, and flit is a syndrome S
o calculation circuit, (I2 is syndrome 88 calculation circuit, +
131 is a division circuit, (141 is a logarithm ROM memory,
Q! 9 is a 1/8 multiplier, tt61 is an error position register, aD is an error pattern register, +till is an error correction circuit, (II is a delay circuit).

■ is the S4 syndromic check circuit, and Qυ is the error detection terminal. Here, the parameters with symbols C1 and C2 are (10°8
．． 3), (10, 7, 4).

In the conventional method, the syndrome calculation for C1 decoding is as follows.

Here α is the primitive polynomial X8+X4+X6+X2+1-0
It is root 0.

The syndrome of the 02th issue is Therefore, the syndrome calculation circuit S. ,S, can be shared.

However, this eliminates the advantage of using a binary code as a zero-fold code and easily encoding and decoding it with a serial shift register, as in CRO.

Generate the element of op(2m) with a binary shift register,
Moreover, by making the element common to the element of the code C2, the C1 code can be made like a binary code.

It is an object of the present invention to encode and decode like an R8 code. If C1 is a binary code and the generator polynomial is selected, this means that the raw nail polynomial o(x) = (x+1) (X+α8) on the Galois field G PI (2m) is selected. S(C0) for syndrome calculation of C2 decoding.

If designed to include S(α8), the syndrome calculation circuits of C1 and C2 can be shared. Root α1゜αi of C2 code
+1. In order for α1+21 to include the C4 root, the difference in the power of α of each root should be carried at equal intervals. That is, in this case, d=3, so for example, the C2 code has a root α0. α4. α8. The C1 code has the root α0. α
It's good to have 8.

Therefore, the syndrome calculation for C2 code is as follows. This is because all even numbers of the primitive element α can be primitive elements. Among them, it is possible to select a generator polynomial for the C1 code that can be a generator polynomial for the binary code. In this case, the generator polynomial for C1 as a 8-code is o(x) = (x+α0) (X+α8), and if β = α8 is considered a new primitive element, then o(x) = (x+β0) (X+β1) and H, It can be seen that this is a generating polynomial for the S code. Also, the usual R8 code cannot express a generator polynomial in two elements.

It can be understood that the above example is a special case that can be used with two elements.

Let us explain how to perform C2 decoding using conventional parallel operations.

When correcting one error using So, S8.

So-ei S8==e, ((1B) The ISO pattern indicates an error pattern. Find the error position αi.

X-88/So2 α81 Therefore, 1=(1/8)logaX Find the error position. However, logaX is GF (
28) is the logarithm with the primitive element α as the base.

Outputs X as an input pattern and logaX as an output area. The correspondence table is given in Table 1 of FIG. X is input as an address pattern to the ROM memory, and the content is 1oga.
X is output.

In Fig. 4, the information input from the information input terminal fil is
, S8 syndrome calculation circuit (111, n7J) are respectively calculated and input to the Galois field division circuit Q3.
SB/S.

is executed on the Galois field GF(28). The value X is the logarithm R
It is converted by OM and further multiplied by (1/8) by a coefficient multiplier to obtain the number of error positions (latched in the register of le).

On the other hand, the error pattern is latched from the So register to the register 071, and the information stored in the delay circuit ←9 is corrected by the correction circuit f116, and then checked by the S4 syndrome re-check circuit to see if it is correct. outputs information from the output terminal (2), and if an error is detected, outputs detection information from the detection terminal r211.

〔Effect of the invention〕

As described above, since the C1 code can be encoded and decoded as if it were a binary code, the C4 code can be handled in the same way as a binary code while taking advantage of the retention ability of the R8 code.

For convenience of explanation, a distance of 3. distance 4 to C2 code
Although the ns code of 1 is used, in general, any combination of R8 codes of any distance is possible.

Furthermore, although the explanation has been limited to a two-dimensional code composed of two codes C1 and C2, it is generally applicable to multidimensional codes.

[Brief explanation of drawings]

FIG. 1 shows an example of the prior art [N1. Figure 2 is a diagram showing another example of the prior art, Figure 3 is a diagram showing an example of C1 encoding according to the present invention, Figure 4 is a diagram showing an example of 02 encoding according to the present invention, and Figure 5 is a diagram showing an example of C1 encoding according to the present invention. 1 is a diagram showing a correspondence table between the address of the logarithm ROM, which is the basic calculation part of the conventional system and the present invention, the contents log, and the operation X. In the figure, 09 is syndrome S. Calculation circuit, 12 is 8
8 calculation circuit, a is a Galois field division circuit, (141
is a logarithmic ROM. In the figures, the same or corresponding parts are denoted by the same reference numerals.

Claims (3)

[Claims] (1) Binary encoding of C_1 code or Reed-Sol
omon code, and C_2 code is Reed-So
In an encoding/decoding device that encodes with Lomon code and transmits it, detects or corrects errors and decodes it on the receiving side, the generating polynomial of C_1 code is set to GF(2^m) (m is an appropriate positive integer). By selecting it under the Galois field, C_
Reed-sol on GF(2^m) with 1 as binary code
Encoding/decoding device that can be regarded as an omon code and enables C_1 correction or detection (2) Binary encoding of C_1 code or Reed-Sol
omon code, and C_2 code is Reed-So
In an encoding/decoding device that encodes with Lomon code and transmits it, detects or corrects errors and decodes it on the receiving side, the generating polynomial of C_1 code is GF(2^m) (m is an appropriate positive integer) Galois By choosing C_1 as the element of the field, both binary codes are Reed-Solomon on GF(2^m)
An encoding/decoding device characterized in that the syndrome calculation circuit portion of C_1 and C_2 is shared so that it can be regarded as a code. (3) Binary encoding of C_1 code or Reed-Sol
omon code, and C_2 code is Reed-So
In an encoding/decoding device that encodes with Lomon code and transmits it, detects or corrects errors and decodes it on the receiving side, the generating polynomial of C_1 code is set to GF(2^m) (m is an appropriate positive integer). By selecting it under the Galois field, C_
1 as a binary code is Reed-Sol on GF(2^m)
omon code, C_1 code, C_
In order to share the syndrome calculation circuit of two codes, C_
The roots of 2 signs are α^i, α^i+l, α^i^+^2^l
, ..., α^j, α^j of C_1 code at equal intervals
Some common roots include ^+^k, α^j^+^2^k, ... (for example, α^i=α^j, α^i^+^2^l
=α^j^+^k). However, i, j, k, and l are appropriate integers.