JPS6427322A - Arithmetic circuit for galois field - Google Patents
Arithmetic circuit for galois fieldInfo
- Publication number
- JPS6427322A JPS6427322A JP9910488A JP9910488A JPS6427322A JP S6427322 A JPS6427322 A JP S6427322A JP 9910488 A JP9910488 A JP 9910488A JP 9910488 A JP9910488 A JP 9910488A JP S6427322 A JPS6427322 A JP S6427322A
- Authority
- JP
- Japan
- Prior art keywords
- alpha
- output
- circuit
- fed
- inverse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To decrease the area on a chip in case of circuit integration by adopting simple constitution such that a ROM or a PLA (programmable logic array) and an adder circuit while taking notice of a Galois field GF(2<m>) forming a multiplicative group of an order of (2<m>-1). CONSTITUTION:An output (i+j) adding exponents i, j generated respectively from conversion ROMs 1A, 1B receiving elements alpha<i>, alpha<j> at an adder circuit 2 is inputted to an inverse conversion ROM 3 and multiplication outputs alpha<i+j>=alpha<i>, alpha<j> are obtained as output data. Moreover, the exponent outputted from the conversion ROM 1B is inverted by an inverse circuit 4A and the result is fed to the adder circuit 2, its output (i-j) is fed to the inverse conversion ROM 3 and a division output alpha<i-j>=alpha<i>/alpha<j> is obtained as the output data. Moreover, the exponent (i) outputted from the conversion ROM 1A is inverted by an inversion circuit 4B and fed to the adder circuit 2, its output (j-i) is fed to the inverse conversion ROM 3 and a division output alpha<j-i>=alpha<j>/alpha<i> is obtained as the output data. Furthermore, outputs of the conversion ROMs 1A1B are added to the adder circuit 2, its output (i+j) is inverted by an inverse circuit 4C, fed to the inverse conversion ROM 3 and alpha<-i+j>=1/alpha<i+j> is obtained as the output data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9910488A JPS6427322A (en) | 1988-04-21 | 1988-04-21 | Arithmetic circuit for galois field |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9910488A JPS6427322A (en) | 1988-04-21 | 1988-04-21 | Arithmetic circuit for galois field |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6427322A true JPS6427322A (en) | 1989-01-30 |
Family
ID=14238529
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9910488A Pending JPS6427322A (en) | 1988-04-21 | 1988-04-21 | Arithmetic circuit for galois field |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6427322A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02301226A (en) * | 1989-05-15 | 1990-12-13 | Mitsubishi Electric Corp | Composite error correction bch decoding circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5432240A (en) * | 1977-08-15 | 1979-03-09 | Ibm | Error correcting unit |
| JPS5432440A (en) * | 1977-08-12 | 1979-03-09 | Hoffmann La Roche | Production of cyclopentene dione |
-
1988
- 1988-04-21 JP JP9910488A patent/JPS6427322A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5432440A (en) * | 1977-08-12 | 1979-03-09 | Hoffmann La Roche | Production of cyclopentene dione |
| JPS5432240A (en) * | 1977-08-15 | 1979-03-09 | Ibm | Error correcting unit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02301226A (en) * | 1989-05-15 | 1990-12-13 | Mitsubishi Electric Corp | Composite error correction bch decoding circuit |
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