SE8104981L - Metod och anordning for adressering av ett minne - Google Patents

Metod och anordning for adressering av ett minne

Info

Publication number
SE8104981L
SE8104981L SE8104981A SE8104981A SE8104981L SE 8104981 L SE8104981 L SE 8104981L SE 8104981 A SE8104981 A SE 8104981A SE 8104981 A SE8104981 A SE 8104981A SE 8104981 L SE8104981 L SE 8104981L
Authority
SE
Sweden
Prior art keywords
memory
addressing
field
modified
address word
Prior art date
Application number
SE8104981A
Other languages
Unknown language ( )
English (en)
Other versions
SE424581B (sv
Inventor
E S Prame
Original Assignee
Ibm Svenska Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm Svenska Ab filed Critical Ibm Svenska Ab
Priority to SE8104981A priority Critical patent/SE8104981L/sv
Priority to EP82106646A priority patent/EP0072927B1/en
Priority to DE8282106646T priority patent/DE3279112D1/de
Publication of SE424581B publication Critical patent/SE424581B/sv
Publication of SE8104981L publication Critical patent/SE8104981L/sv
Priority to US06/409,004 priority patent/US4592013A/en
Priority to JP57142764A priority patent/JPS5837883A/ja

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)
  • Static Random-Access Memory (AREA)
SE8104981A 1981-08-21 1981-08-21 Metod och anordning for adressering av ett minne SE8104981L (sv)

Priority Applications (5)

Application Number Priority Date Filing Date Title
SE8104981A SE8104981L (sv) 1981-08-21 1981-08-21 Metod och anordning for adressering av ett minne
EP82106646A EP0072927B1 (en) 1981-08-21 1982-07-23 Device for addressing a memory
DE8282106646T DE3279112D1 (en) 1981-08-21 1982-07-23 Device for addressing a memory
US06/409,004 US4592013A (en) 1981-08-21 1982-08-17 Method and device for addressing a memory
JP57142764A JPS5837883A (ja) 1981-08-21 1982-08-19 メモリ・アドレシング装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE8104981A SE8104981L (sv) 1981-08-21 1981-08-21 Metod och anordning for adressering av ett minne

Publications (2)

Publication Number Publication Date
SE424581B SE424581B (sv) 1982-07-26
SE8104981L true SE8104981L (sv) 1982-07-26

Family

ID=20344405

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8104981A SE8104981L (sv) 1981-08-21 1981-08-21 Metod och anordning for adressering av ett minne

Country Status (5)

Country Link
US (1) US4592013A (sv)
EP (1) EP0072927B1 (sv)
JP (1) JPS5837883A (sv)
DE (1) DE3279112D1 (sv)
SE (1) SE8104981L (sv)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341667U (sv) * 1989-09-01 1991-04-19
JP2000010863A (ja) * 1998-06-24 2000-01-14 Sony Computer Entertainment Inc 情報処理装置および方法、並びに提供媒体
US6678806B1 (en) * 2000-08-23 2004-01-13 Chipwrights Design, Inc. Apparatus and method for using tagged pointers for extract, insert and format operations
US6618788B1 (en) * 2000-09-27 2003-09-09 Cypress Semiconductor, Inc. ATA device control via a packet-based interface
US6732253B1 (en) 2000-11-13 2004-05-04 Chipwrights Design, Inc. Loop handling for single instruction multiple datapath processor architectures
US6931518B1 (en) 2000-11-28 2005-08-16 Chipwrights Design, Inc. Branching around conditional processing if states of all single instruction multiple datapaths are disabled and the computer program is non-deterministic
US7493607B2 (en) * 2002-07-09 2009-02-17 Bluerisc Inc. Statically speculative compilation and execution
US20050114850A1 (en) 2003-10-29 2005-05-26 Saurabh Chheda Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
US7996671B2 (en) * 2003-11-17 2011-08-09 Bluerisc Inc. Security of program executables and microprocessors based on compiler-architecture interaction
US8607209B2 (en) 2004-02-04 2013-12-10 Bluerisc Inc. Energy-focused compiler-assisted branch prediction
US20070294181A1 (en) * 2006-05-22 2007-12-20 Saurabh Chheda Flexible digital rights management with secure snippets
US20080126766A1 (en) 2006-11-03 2008-05-29 Saurabh Chheda Securing microprocessors against information leakage and physical tampering
US20080154379A1 (en) * 2006-12-22 2008-06-26 Musculoskeletal Transplant Foundation Interbody fusion hybrid graft
EP3173935B1 (en) 2015-11-24 2018-06-06 Stichting IMEC Nederland Memory access unit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE331921B (sv) * 1966-03-25 1971-01-18 Ericsson Telefon Ab L M
US3739532A (en) * 1971-06-30 1973-06-19 Owens Illinois Inc Apparatus for transferring and operating on articles
FR2230258A5 (sv) * 1973-05-16 1974-12-13 Honeywell Bull Soc Ind
US4126897A (en) * 1977-07-05 1978-11-21 International Business Machines Corporation Request forwarding system
US4419727A (en) * 1979-01-02 1983-12-06 Honeywell Information Systems Inc. Hardware for extending microprocessor addressing capability
US4318175A (en) * 1979-08-13 1982-03-02 Bunker Ramo Corporation Addressing means for random access memory system
US4356549A (en) * 1980-04-02 1982-10-26 Control Data Corporation System page table apparatus
US4432053A (en) * 1981-06-29 1984-02-14 Burroughs Corporation Address generating apparatus and method
US4453212A (en) * 1981-07-13 1984-06-05 Burroughs Corporation Extended address generating apparatus and method
US4447879A (en) * 1981-09-11 1984-05-08 Data General Corporation Improved apparatus for representing the size of an element in a compound data item and deriving addresses and lengths using the element size

Also Published As

Publication number Publication date
SE424581B (sv) 1982-07-26
EP0072927B1 (en) 1988-10-12
DE3279112D1 (en) 1988-11-17
EP0072927A2 (en) 1983-03-02
JPS648383B2 (sv) 1989-02-14
US4592013A (en) 1986-05-27
JPS5837883A (ja) 1983-03-05
EP0072927A3 (en) 1985-09-18

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