JPS54148439A - Information memory unit - Google Patents

Information memory unit

Info

Publication number
JPS54148439A
JPS54148439A JP5740278A JP5740278A JPS54148439A JP S54148439 A JPS54148439 A JP S54148439A JP 5740278 A JP5740278 A JP 5740278A JP 5740278 A JP5740278 A JP 5740278A JP S54148439 A JPS54148439 A JP S54148439A
Authority
JP
Japan
Prior art keywords
writing
reading
circuit
data
bank
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5740278A
Other languages
Japanese (ja)
Other versions
JPS6037930B2 (en
Inventor
Norio Aihara
Takashi Nagashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP53057402A priority Critical patent/JPS6037930B2/en
Publication of JPS54148439A publication Critical patent/JPS54148439A/en
Publication of JPS6037930B2 publication Critical patent/JPS6037930B2/en
Expired legal-status Critical Current

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Abstract

PURPOSE: To ensure the process execution with the same cycle time by installing the 1st and 2nd writing registers with an effective use of the memory access time for the continuous reading and writing as well as for the reading after writing and the writing after reading rspectively.
CONSTITUTION: Memory bank 1, which is capable of access for the single word and the multiple words and consists of memory boards 11W1n, is installed along with bit length designation circuit 7 which designates the optional memory boards 11W1n. In addition, board enable circuit 9 which performs an access of the single word to bank 1 is installed along with reading data register 12 which memorizes temporarily the multiple word data read from bank 1. Furthermore, the following units are provided: reading data register 12 which divides the data memorized temporarily in register 12 with every fixed transfer unit and delivers them; shift circuit 13; multiple word board 14 which carries out the data transfer control between circuit 13 and multiple word channel 15, and 1st and 2nd writing data registers 16 and 17 provided to the output of circuit 13.
COPYRIGHT: (C)1979,JPO&Japio
JP53057402A 1978-05-15 1978-05-15 information storage device Expired JPS6037930B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53057402A JPS6037930B2 (en) 1978-05-15 1978-05-15 information storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53057402A JPS6037930B2 (en) 1978-05-15 1978-05-15 information storage device

Publications (2)

Publication Number Publication Date
JPS54148439A true JPS54148439A (en) 1979-11-20
JPS6037930B2 JPS6037930B2 (en) 1985-08-29

Family

ID=13054636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53057402A Expired JPS6037930B2 (en) 1978-05-15 1978-05-15 information storage device

Country Status (1)

Country Link
JP (1) JPS6037930B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592169A (en) * 1982-06-29 1984-01-07 Fujitsu Ltd Three-dimensional picture memory setting system
JPS59140576A (en) * 1983-02-01 1984-08-11 Hitachi Ltd Pattern converting device
JPS61259349A (en) * 1985-05-13 1986-11-17 Fujitsu Ltd Memory access system
JPS62281198A (en) * 1986-05-30 1987-12-07 Texas Instr Japan Ltd Data selection circuit
JPH06259320A (en) * 1993-03-04 1994-09-16 Hitachi Ltd Nonvolatile memory device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592169A (en) * 1982-06-29 1984-01-07 Fujitsu Ltd Three-dimensional picture memory setting system
JPH059831B2 (en) * 1982-06-29 1993-02-08 Fujitsu Ltd
JPS59140576A (en) * 1983-02-01 1984-08-11 Hitachi Ltd Pattern converting device
JPS61259349A (en) * 1985-05-13 1986-11-17 Fujitsu Ltd Memory access system
JPS62281198A (en) * 1986-05-30 1987-12-07 Texas Instr Japan Ltd Data selection circuit
JPH06259320A (en) * 1993-03-04 1994-09-16 Hitachi Ltd Nonvolatile memory device

Also Published As

Publication number Publication date
JPS6037930B2 (en) 1985-08-29

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