JPS5512533A - Control system for multiplex memory unit - Google Patents

Control system for multiplex memory unit

Info

Publication number
JPS5512533A
JPS5512533A JP8399778A JP8399778A JPS5512533A JP S5512533 A JPS5512533 A JP S5512533A JP 8399778 A JP8399778 A JP 8399778A JP 8399778 A JP8399778 A JP 8399778A JP S5512533 A JPS5512533 A JP S5512533A
Authority
JP
Japan
Prior art keywords
alpha
memory
address
unit
memory unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8399778A
Other languages
Japanese (ja)
Inventor
Atomi Noguchi
Toshiyuki Ide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8399778A priority Critical patent/JPS5512533A/en
Publication of JPS5512533A publication Critical patent/JPS5512533A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Abstract

PURPOSE:To speed up more the accessing to the momory unit, by transmitting two different adresses to the duplex memory unit, when CPU makes readout operation. CONSTITUTION:When the CPU 4 performs readout operation, two different address are transmitted to the duplex memory unit 3. For example, continuous addresses alpha and alpha+1 are simultaneously accessed. The unit 3 accesses the address alpha to one system and the address alpha+1 to another system. If no error is detected to the data in two words read out, the two words are transmitted to the CPU 4 simultaneously. Further, if any error is detected in the data read out with the access to the address alpha of the memory 1, access is made to the address alpha of the memory 2. Further, error restoration is made by writing in the memory content at the address alpha of the memory 2 to the address alpha of the memory 1.
JP8399778A 1978-07-12 1978-07-12 Control system for multiplex memory unit Pending JPS5512533A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8399778A JPS5512533A (en) 1978-07-12 1978-07-12 Control system for multiplex memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8399778A JPS5512533A (en) 1978-07-12 1978-07-12 Control system for multiplex memory unit

Publications (1)

Publication Number Publication Date
JPS5512533A true JPS5512533A (en) 1980-01-29

Family

ID=13818165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8399778A Pending JPS5512533A (en) 1978-07-12 1978-07-12 Control system for multiplex memory unit

Country Status (1)

Country Link
JP (1) JPS5512533A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60179840U (en) * 1984-05-04 1985-11-29 株式会社システムメンテナンス Sample collection and measurement equipment
EP0239299A2 (en) * 1986-03-28 1987-09-30 Tandem Computers Incorporated Overlapped control store

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60179840U (en) * 1984-05-04 1985-11-29 株式会社システムメンテナンス Sample collection and measurement equipment
EP0239299A2 (en) * 1986-03-28 1987-09-30 Tandem Computers Incorporated Overlapped control store

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