JPS56159896A - Data processing system - Google Patents
Data processing systemInfo
- Publication number
- JPS56159896A JPS56159896A JP6178780A JP6178780A JPS56159896A JP S56159896 A JPS56159896 A JP S56159896A JP 6178780 A JP6178780 A JP 6178780A JP 6178780 A JP6178780 A JP 6178780A JP S56159896 A JPS56159896 A JP S56159896A
- Authority
- JP
- Japan
- Prior art keywords
- address
- memory
- protection information
- ranged
- sent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE:To make overheads for address conversion and protection check reduce by storing all of the protection information in a high-speed storage device for a specific address region. CONSTITUTION:An actual address sent from a selection circuit is set in an address register 13 within a memory control circuit 19. The address information which has been set in checked through comparators 34, 35 and a gate 36 whether the address is ranged among i and 1. When the address for write request time to a main storage device 20 is detected to be ranged from i to 1, a signal 37 is sent to a high-speed memory 15, and for a part related to the protection information within a data register 30 to which writing data has been set it is written to the device 20 and also the memory 15. Hereby, at the time of exchange from a virtual address to an actual address, as for an area where both addresses are equal, the memory 15 can be accessed directly because protection information is obtained from the memory 15.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6178780A JPS56159896A (en) | 1980-05-12 | 1980-05-12 | Data processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6178780A JPS56159896A (en) | 1980-05-12 | 1980-05-12 | Data processing system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56159896A true JPS56159896A (en) | 1981-12-09 |
JPH0159611B2 JPH0159611B2 (en) | 1989-12-19 |
Family
ID=13181144
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6178780A Granted JPS56159896A (en) | 1980-05-12 | 1980-05-12 | Data processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56159896A (en) |
-
1980
- 1980-05-12 JP JP6178780A patent/JPS56159896A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0159611B2 (en) | 1989-12-19 |
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