SE7900229L - Integrerad halvledarkrets samt sett att tillverka densamma - Google Patents
Integrerad halvledarkrets samt sett att tillverka densammaInfo
- Publication number
- SE7900229L SE7900229L SE7900229A SE7900229A SE7900229L SE 7900229 L SE7900229 L SE 7900229L SE 7900229 A SE7900229 A SE 7900229A SE 7900229 A SE7900229 A SE 7900229A SE 7900229 L SE7900229 L SE 7900229L
- Authority
- SE
- Sweden
- Prior art keywords
- manufacture
- way
- same
- semiconductor circuit
- integrated semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0244—I2L structures integrated in combination with analog structures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/916—Autodoping control or utilization
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/877,856 US4170501A (en) | 1978-02-15 | 1978-02-15 | Method of making a semiconductor integrated circuit device utilizing simultaneous outdiffusion and autodoping during epitaxial deposition |
Publications (1)
Publication Number | Publication Date |
---|---|
SE7900229L true SE7900229L (sv) | 1979-08-16 |
Family
ID=25370869
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE7900229A SE7900229L (sv) | 1978-02-15 | 1979-01-10 | Integrerad halvledarkrets samt sett att tillverka densamma |
Country Status (5)
Country | Link |
---|---|
US (1) | US4170501A (de) |
JP (1) | JPS5585052A (de) |
DE (1) | DE2904480B2 (de) |
IT (1) | IT7919362A0 (de) |
SE (1) | SE7900229L (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS567463A (en) * | 1979-06-29 | 1981-01-26 | Hitachi Ltd | Semiconductor device and its manufacture |
JPS5676560A (en) * | 1979-11-28 | 1981-06-24 | Hitachi Ltd | Semiconductor device |
JPS57136342A (en) * | 1981-02-17 | 1982-08-23 | Fujitsu Ltd | Manufacture of semiconductor device |
US4487653A (en) * | 1984-03-19 | 1984-12-11 | Advanced Micro Devices, Inc. | Process for forming and locating buried layers |
US5055417A (en) * | 1987-06-11 | 1991-10-08 | National Semiconductor Corporation | Process for fabricating self-aligned high performance lateral action silicon-controlled rectifier and static random access memory cells |
US5243214A (en) * | 1992-04-14 | 1993-09-07 | North American Philips Corp. | Power integrated circuit with latch-up prevention |
JP3353277B2 (ja) * | 1992-09-25 | 2002-12-03 | ソニー株式会社 | エピタキシャルウェハの製造方法 |
JP2647057B2 (ja) * | 1995-06-02 | 1997-08-27 | 日本電気株式会社 | 半導体装置 |
JP3409548B2 (ja) | 1995-12-12 | 2003-05-26 | ソニー株式会社 | 半導体装置の製造方法 |
US5731619A (en) * | 1996-05-22 | 1998-03-24 | International Business Machines Corporation | CMOS structure with FETS having isolated wells with merged depletions and methods of making same |
DE102017121693B4 (de) * | 2017-09-19 | 2022-12-08 | Infineon Technologies Ag | Dotierungsverfahren |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL273009A (de) * | 1960-12-29 | |||
NL297821A (de) * | 1962-10-08 | |||
US3479233A (en) * | 1967-01-16 | 1969-11-18 | Ibm | Method for simultaneously forming a buried layer and surface connection in semiconductor devices |
US3591430A (en) * | 1968-11-14 | 1971-07-06 | Philco Ford Corp | Method for fabricating bipolar planar transistor having reduced minority carrier fringing |
FR2041710B1 (de) * | 1969-05-08 | 1974-06-14 | Radiotechnique Compelec | |
US3582725A (en) * | 1969-08-21 | 1971-06-01 | Nippon Electric Co | Semiconductor integrated circuit device and the method of manufacturing the same |
BE758683A (fr) * | 1969-11-10 | 1971-05-10 | Ibm | Procede de fabrication d'un dispositif monolithique auto-isolant et structure de transistor a socle |
US3885998A (en) * | 1969-12-05 | 1975-05-27 | Siemens Ag | Method for the simultaneous formation of semiconductor components with individually tailored isolation regions |
DE2044863A1 (de) * | 1970-09-10 | 1972-03-23 | Siemens Ag | Verfahren zur Herstellung von Schottkydioden |
US4032372A (en) * | 1971-04-28 | 1977-06-28 | International Business Machines Corporation | Epitaxial outdiffusion technique for integrated bipolar and field effect transistors |
US3961340A (en) * | 1971-11-22 | 1976-06-01 | U.S. Philips Corporation | Integrated circuit having bipolar transistors and method of manufacturing said circuit |
JPS51116687A (en) * | 1975-04-07 | 1976-10-14 | Hitachi Ltd | Semiconductor integrated circuit device |
JPS51132784A (en) * | 1975-05-14 | 1976-11-18 | Hitachi Ltd | Production method of semiconductor device |
JPS5261976A (en) * | 1975-11-18 | 1977-05-21 | Matsushita Electric Ind Co Ltd | Semiconductor integrated circuit device and its production |
-
1978
- 1978-02-15 US US05/877,856 patent/US4170501A/en not_active Expired - Lifetime
-
1979
- 1979-01-10 SE SE7900229A patent/SE7900229L/xx unknown
- 1979-01-17 IT IT7919362A patent/IT7919362A0/it unknown
- 1979-02-07 DE DE2904480A patent/DE2904480B2/de not_active Withdrawn
- 1979-02-09 JP JP1490379A patent/JPS5585052A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS5585052A (en) | 1980-06-26 |
DE2904480A1 (de) | 1979-08-16 |
US4170501A (en) | 1979-10-09 |
IT7919362A0 (it) | 1979-01-17 |
DE2904480B2 (de) | 1981-02-19 |
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