SE515581C2 - Förfarande och system för överföring av data mellan processorer - Google Patents

Förfarande och system för överföring av data mellan processorer

Info

Publication number
SE515581C2
SE515581C2 SE9601346A SE9601346A SE515581C2 SE 515581 C2 SE515581 C2 SE 515581C2 SE 9601346 A SE9601346 A SE 9601346A SE 9601346 A SE9601346 A SE 9601346A SE 515581 C2 SE515581 C2 SE 515581C2
Authority
SE
Sweden
Prior art keywords
processors
processor
read
interrupt
memory area
Prior art date
Application number
SE9601346A
Other languages
English (en)
Swedish (sv)
Other versions
SE9601346D0 (sv
SE9601346L (sv
Inventor
Esko Rautanen
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Publication of SE9601346D0 publication Critical patent/SE9601346D0/xx
Publication of SE9601346L publication Critical patent/SE9601346L/
Publication of SE515581C2 publication Critical patent/SE515581C2/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
SE9601346A 1993-10-13 1996-04-10 Förfarande och system för överföring av data mellan processorer SE515581C2 (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI934523A FI94190C (fi) 1993-10-13 1993-10-13 Menetelmä ja järjestelmä tiedon siirtämiseksi prosessorien välillä
PCT/FI1994/000459 WO1995010811A1 (en) 1993-10-13 1994-10-12 Method and system for transferring data between processors

Publications (3)

Publication Number Publication Date
SE9601346D0 SE9601346D0 (sv) 1996-04-10
SE9601346L SE9601346L (sv) 1996-04-10
SE515581C2 true SE515581C2 (sv) 2001-09-03

Family

ID=8538771

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9601346A SE515581C2 (sv) 1993-10-13 1996-04-10 Förfarande och system för överföring av data mellan processorer

Country Status (6)

Country Link
AU (1) AU7815094A (de)
DE (2) DE4497671B4 (de)
FI (1) FI94190C (de)
GB (1) GB2298064B (de)
SE (1) SE515581C2 (de)
WO (1) WO1995010811A1 (de)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4209839A (en) * 1978-06-16 1980-06-24 International Business Machines Corporation Shared synchronous memory multiprocessing arrangement
JPH02128267A (ja) * 1988-11-09 1990-05-16 Fujitsu Ltd 共有メモリによる通信方式
DE4129809C2 (de) * 1991-01-28 2000-08-17 Bosch Gmbh Robert Mehrrechnersystem

Also Published As

Publication number Publication date
SE9601346D0 (sv) 1996-04-10
WO1995010811A1 (en) 1995-04-20
AU7815094A (en) 1995-05-04
GB9607540D0 (en) 1996-06-26
SE9601346L (sv) 1996-04-10
DE4497671T1 (de) 1996-11-21
DE4497671B4 (de) 2004-02-05
GB2298064B (en) 1998-01-14
FI94190C (fi) 1995-07-25
FI934523A0 (fi) 1993-10-13
GB2298064A (en) 1996-08-21
FI94190B (fi) 1995-04-13

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Legal Events

Date Code Title Description
NUG Patent has lapsed