SE405909B - Cellstruktur for en integrerad halvledarkretsanordning av injektionslogiktyp och forfarande for dess tillverkning - Google Patents
Cellstruktur for en integrerad halvledarkretsanordning av injektionslogiktyp och forfarande for dess tillverkningInfo
- Publication number
- SE405909B SE405909B SE7504328A SE7504328A SE405909B SE 405909 B SE405909 B SE 405909B SE 7504328 A SE7504328 A SE 7504328A SE 7504328 A SE7504328 A SE 7504328A SE 405909 B SE405909 B SE 405909B
- Authority
- SE
- Sweden
- Prior art keywords
- procedure
- manufacture
- cell structure
- system device
- semiconductor system
- Prior art date
Links
- 238000002347 injection Methods 0.000 title 1
- 239000007924 injection Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8226—Bipolar technology comprising merged transistor logic or integrated injection logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/096—Lateral transistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/124—Polycrystalline emitter
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US464480A US3904450A (en) | 1974-04-26 | 1974-04-26 | Method of fabricating injection logic integrated circuits using oxide isolation |
Publications (2)
Publication Number | Publication Date |
---|---|
SE7504328L SE7504328L (sv) | 1975-10-27 |
SE405909B true SE405909B (sv) | 1979-01-08 |
Family
ID=23844105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE7504328A SE405909B (sv) | 1974-04-26 | 1975-04-15 | Cellstruktur for en integrerad halvledarkretsanordning av injektionslogiktyp och forfarande for dess tillverkning |
Country Status (10)
Country | Link |
---|---|
US (1) | US3904450A (de) |
JP (1) | JPS50152682A (de) |
BE (1) | BE828348A (de) |
CA (1) | CA1005170A (de) |
DE (1) | DE2518010A1 (de) |
FR (1) | FR2269200B1 (de) |
GB (1) | GB1498531A (de) |
IT (1) | IT1032757B (de) |
NL (1) | NL7504859A (de) |
SE (1) | SE405909B (de) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3962717A (en) * | 1974-10-29 | 1976-06-08 | Fairchild Camera And Instrument Corporation | Oxide isolated integrated injection logic with selective guard ring |
US3993513A (en) * | 1974-10-29 | 1976-11-23 | Fairchild Camera And Instrument Corporation | Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures |
FR2297495A1 (fr) * | 1975-01-10 | 1976-08-06 | Radiotechnique Compelec | Structure de transistors complementaires et son procede de fabrication |
US4044454A (en) * | 1975-04-16 | 1977-08-30 | Ibm Corporation | Method for forming integrated circuit regions defined by recessed dielectric isolation |
FR2337432A1 (fr) * | 1975-12-29 | 1977-07-29 | Radiotechnique Compelec | Perfectionnement a la structure des circuits integres a transistors bipolaires complementaires et procede d'obtention |
FR2337431A1 (fr) * | 1975-12-29 | 1977-07-29 | Radiotechnique Compelec | Perfectionnement a la structure des circuits integres a transistors bipolaires et procede d'obtention |
US4013489A (en) * | 1976-02-10 | 1977-03-22 | Intel Corporation | Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit |
US4137109A (en) * | 1976-04-12 | 1979-01-30 | Texas Instruments Incorporated | Selective diffusion and etching method for isolation of integrated logic circuit |
US4102714A (en) * | 1976-04-23 | 1978-07-25 | International Business Machines Corporation | Process for fabricating a low breakdown voltage device for polysilicon gate technology |
JPS5317081A (en) * | 1976-07-30 | 1978-02-16 | Sharp Corp | Production of i2l device |
JPS6035818B2 (ja) * | 1976-09-22 | 1985-08-16 | 日本電気株式会社 | 半導体装置の製造方法 |
JPS53108776A (en) * | 1977-03-04 | 1978-09-21 | Nec Corp | Semiconductor device |
US4111720A (en) * | 1977-03-31 | 1978-09-05 | International Business Machines Corporation | Method for forming a non-epitaxial bipolar integrated circuit |
NL7703941A (nl) * | 1977-04-12 | 1978-10-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze. |
DE2728845A1 (de) * | 1977-06-27 | 1979-01-18 | Siemens Ag | Verfahren zum herstellen eines hochfrequenztransistors |
JPS5467778A (en) * | 1977-11-10 | 1979-05-31 | Toshiba Corp | Production of semiconductor device |
US4190466A (en) * | 1977-12-22 | 1980-02-26 | International Business Machines Corporation | Method for making a bipolar transistor structure utilizing self-passivating diffusion sources |
NL190710C (nl) | 1978-02-10 | 1994-07-01 | Nec Corp | Geintegreerde halfgeleiderketen. |
US4264382A (en) * | 1978-05-25 | 1981-04-28 | International Business Machines Corporation | Method for making a lateral PNP or NPN with a high gain utilizing reactive ion etching of buried high conductivity regions |
US4196440A (en) * | 1978-05-25 | 1980-04-01 | International Business Machines Corporation | Lateral PNP or NPN with a high gain |
US4157269A (en) * | 1978-06-06 | 1979-06-05 | International Business Machines Corporation | Utilizing polysilicon diffusion sources and special masking techniques |
JPS5586151A (en) * | 1978-12-23 | 1980-06-28 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor integrated circuit |
JPS6043024B2 (ja) * | 1978-12-30 | 1985-09-26 | 富士通株式会社 | 半導体装置の製造方法 |
JPS55134962A (en) * | 1979-04-09 | 1980-10-21 | Toshiba Corp | Semiconductor device |
JPS6043656B2 (ja) * | 1979-06-06 | 1985-09-30 | 株式会社東芝 | 半導体装置の製造方法 |
US4338622A (en) * | 1979-06-29 | 1982-07-06 | International Business Machines Corporation | Self-aligned semiconductor circuits and process therefor |
US4303933A (en) * | 1979-11-29 | 1981-12-01 | International Business Machines Corporation | Self-aligned micrometer bipolar transistor device and process |
US4333227A (en) * | 1979-11-29 | 1982-06-08 | International Business Machines Corporation | Process for fabricating a self-aligned micrometer bipolar transistor device |
JPS5696852A (en) * | 1979-12-29 | 1981-08-05 | Fujitsu Ltd | Semiconductor device |
US4319932A (en) * | 1980-03-24 | 1982-03-16 | International Business Machines Corporation | Method of making high performance bipolar transistor with polysilicon base contacts |
JPS5734365A (en) * | 1980-08-08 | 1982-02-24 | Ibm | Symmetrical bipolar transistor |
CA1188418A (en) * | 1982-01-04 | 1985-06-04 | Jay A. Shideler | Oxide isolation process for standard ram/prom and lateral pnp cell ram |
US4624046A (en) * | 1982-01-04 | 1986-11-25 | Fairchild Camera & Instrument Corp. | Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM |
US4961102A (en) * | 1982-01-04 | 1990-10-02 | Shideler Jay A | Junction programmable vertical transistor with high performance transistor |
JPS59186367A (ja) * | 1983-04-06 | 1984-10-23 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
US4713355A (en) * | 1984-04-16 | 1987-12-15 | Trw Inc. | Bipolar transistor construction |
US5166094A (en) * | 1984-09-14 | 1992-11-24 | Fairchild Camera & Instrument Corp. | Method of fabricating a base-coupled transistor logic |
US4936928A (en) * | 1985-11-27 | 1990-06-26 | Raytheon Company | Semiconductor device |
GB2183907B (en) * | 1985-11-27 | 1989-10-04 | Raytheon Co | Semiconductor device |
US4903107A (en) * | 1986-12-29 | 1990-02-20 | General Electric Company | Buried oxide field isolation structure with composite dielectric |
US6869854B2 (en) * | 2002-07-18 | 2005-03-22 | International Business Machines Corporation | Diffused extrinsic base and method for fabrication |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3534234A (en) * | 1966-12-15 | 1970-10-13 | Texas Instruments Inc | Modified planar process for making semiconductor devices having ultrafine mesa type geometry |
NL6706735A (de) * | 1967-05-13 | 1968-11-14 | ||
US3460007A (en) * | 1967-07-03 | 1969-08-05 | Rca Corp | Semiconductor junction device |
US3519901A (en) * | 1968-01-29 | 1970-07-07 | Texas Instruments Inc | Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation |
-
1974
- 1974-04-26 US US464480A patent/US3904450A/en not_active Expired - Lifetime
- 1974-12-09 CA CA215,537A patent/CA1005170A/en not_active Expired
-
1975
- 1975-04-15 SE SE7504328A patent/SE405909B/xx unknown
- 1975-04-23 DE DE19752518010 patent/DE2518010A1/de not_active Withdrawn
- 1975-04-24 IT IT68068/75A patent/IT1032757B/it active
- 1975-04-24 BE BE155739A patent/BE828348A/xx unknown
- 1975-04-24 NL NL7504859A patent/NL7504859A/xx not_active Application Discontinuation
- 1975-04-25 FR FR7513131A patent/FR2269200B1/fr not_active Expired
- 1975-04-25 GB GB17198/75A patent/GB1498531A/en not_active Expired
- 1975-04-26 JP JP50050264A patent/JPS50152682A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
CA1005170A (en) | 1977-02-08 |
BE828348A (fr) | 1975-08-18 |
JPS50152682A (de) | 1975-12-08 |
FR2269200B1 (de) | 1977-04-15 |
DE2518010A1 (de) | 1975-11-13 |
GB1498531A (en) | 1978-01-18 |
NL7504859A (nl) | 1975-10-28 |
IT1032757B (it) | 1979-06-20 |
US3904450A (en) | 1975-09-09 |
FR2269200A1 (de) | 1975-11-21 |
SE7504328L (sv) | 1975-10-27 |
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