NO954086L - Sammensatt klokke-signal - Google Patents

Sammensatt klokke-signal

Info

Publication number
NO954086L
NO954086L NO954086A NO954086A NO954086L NO 954086 L NO954086 L NO 954086L NO 954086 A NO954086 A NO 954086A NO 954086 A NO954086 A NO 954086A NO 954086 L NO954086 L NO 954086L
Authority
NO
Norway
Prior art keywords
signal
clock
bit clock
clsy
bit
Prior art date
Application number
NO954086A
Other languages
English (en)
Other versions
NO954086D0 (no
Inventor
Peter Carl Birger Lundh
Mats Goran Wilhelmsson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of NO954086D0 publication Critical patent/NO954086D0/no
Publication of NO954086L publication Critical patent/NO954086L/no

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0602Systems characterised by the synchronising information used
    • H04J3/0614Systems characterised by the synchronising information used the synchronising signal being characterised by the amplitude, duration or polarity
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronizing For Television (AREA)

Abstract

Foreliggende oppfinnelse fremskaffer et sammensatt klokkesignal (CLSY) som med et eneste signal fordel- er både klokkesignal og synkroniseringssignal, hvori detekteringen av dette synkroniseringssignal i en etterfølgende bitklokke-generator for en høy bit- klokkefrekvens (fBci,) betyr at eventuell tidsdirring som kan finnes på flankene av klokkesignalet (CLSY) ikke vil påvirke defineringen av det lokalt oppnådde synkroniseringssignal (SYN1), hvori hver databitram- me definert av synkroniseringssignalet (SYN1) alltid vil omfatte det nøyaktige antall databiter ved bit- klokkefrekvensen (fBci,). Bitklokke-generator en omfat- ter hovedsakelig en PLL-krets, en delekrets og et skiftregister og en logikkport fra CLSY-signalet for å generere bitklokkesignalet med det rammereferanse, hvori det fra bitklokke-generatoren i tillegg til bitklokkefrekvensen oppnås en synkroniseringspuls som har høy nøyaktighet i forhold til både høyfrek- vens-systemklokken og også i forhold til et eksternt tidsdomene overført via det sammensatte referanse- signal (CLSY).
NO954086A 1993-04-21 1995-10-13 Sammensatt klokke-signal NO954086L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9301327A SE501156C2 (sv) 1993-04-21 1993-04-21 Referenssignal sammansatt av klocksignal och synkroniseringssignal, anordning och förfarande för synkronisering m.h.a. referenssignal
PCT/SE1994/000321 WO1994024793A1 (en) 1993-04-21 1994-04-06 Composite clock signal

Publications (2)

Publication Number Publication Date
NO954086D0 NO954086D0 (no) 1995-10-13
NO954086L true NO954086L (no) 1995-12-08

Family

ID=20389653

Family Applications (1)

Application Number Title Priority Date Filing Date
NO954086A NO954086L (no) 1993-04-21 1995-10-13 Sammensatt klokke-signal

Country Status (13)

Country Link
US (1) US5724360A (no)
EP (1) EP0695487B1 (no)
JP (1) JPH08509108A (no)
KR (1) KR100311591B1 (no)
CN (1) CN1121755A (no)
AU (1) AU675840B2 (no)
BR (1) BR9406331A (no)
CA (1) CA2159190A1 (no)
DE (1) DE69430055D1 (no)
FI (1) FI954971A (no)
NO (1) NO954086L (no)
SE (1) SE501156C2 (no)
WO (1) WO1994024793A1 (no)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3976362B2 (ja) * 1996-10-16 2007-09-19 ローム株式会社 移動体通信の受信回路
SE504920C2 (sv) 1995-09-29 1997-05-26 Ericsson Telefon Ab L M Förfarande och system för redundant klockdistribution till telekommunikationsutrustningar i vilka byte av vald klocksignal bland de inkommande klocksignalerna ständigt sker
SE506739C2 (sv) 1995-09-29 1998-02-09 Ericsson Telefon Ab L M Drift och underhåll av klockdistributionsnät med redundans
IT1305801B1 (it) 1998-05-19 2001-05-16 Strato Srl Profilo a struttura multipla per la produzione di serramenti
US6188286B1 (en) * 1999-03-30 2001-02-13 Infineon Technologies North America Corp. Method and system for synchronizing multiple subsystems using one voltage-controlled oscillator
US20020157111A1 (en) * 2001-04-20 2002-10-24 Reams David Anthony Television program-related coupon hyperlink system
DE10157331A1 (de) * 2001-11-23 2003-05-28 Thomson Brandt Gmbh Gerät zur Aufzeichnung oder Wiedergabe von Informationen mit Mitteln zur Signalerzeugung aus einem Wobbelsignal
US7292876B2 (en) * 2002-10-08 2007-11-06 Sonion Nederland B.V. Digital system bus for use in low power instruments such as hearing aids and listening devices
CN101958786B (zh) * 2009-07-16 2014-01-01 中兴通讯股份有限公司 一种产生定时信号的方法和装置

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3980953A (en) * 1973-05-14 1976-09-14 Ns Electronics Delta modulation system employing digital frame averaging
SE406655B (sv) * 1976-10-08 1979-02-19 Ellemtel Utvecklings Ab Anordning for overforing av bestemda klocksignaler i en klocksignalserie med hjelp av signaler av legre frekvens i synnerhet for att ur nemnda signaler av legre frekvens utvinna veldefinerade pulser for styrning av ...
US4124778A (en) * 1977-11-02 1978-11-07 Minnesota Mining And Manufacturing Company Digital frame synchronizing circuit
FR2450835A2 (fr) * 1978-04-14 1980-10-03 Synthelabo Derives de la tetrahydroalstonine et leur application en therapeutique
US4314368A (en) * 1978-10-12 1982-02-02 Decoursey Calvin H Receiver for pulse code multiplexed signals
US4234957A (en) * 1978-12-04 1980-11-18 Gte Automatic Electric Laboratories Incorporated Method and apparatus for generating timing phase error signals in PSK demodulators
US4450572A (en) * 1982-05-07 1984-05-22 Digital Equipment Corporation Interface for serial data communications link
US4611325A (en) * 1984-12-21 1986-09-09 Gte Communication Systems Corporation DTMF receiver sense and control arrangement
US4651320A (en) * 1984-12-24 1987-03-17 American Telephone And Telegraph Company Inband coding of secondary data
FR2577089B1 (fr) * 1985-02-07 1987-03-06 Thomson Csf Mat Tel Dispositif de transmission d'un signal d'horloge accompagne d'un signal de synchronisation
US5163072A (en) * 1986-07-23 1992-11-10 Optical Communications Corporation Optical communications transmitter and receiver
US4759041A (en) * 1987-02-19 1988-07-19 Unisys Corporation Local area network control system synchronization with phase-lock loop
JP2540850B2 (ja) * 1987-03-25 1996-10-09 ソニー株式会社 半導体レ−ザ
US4933955A (en) * 1988-02-26 1990-06-12 Silicon General, Inc. Timing generator
JPH0797328B2 (ja) * 1988-10-25 1995-10-18 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン フオールト・トレラント同期システム
US4926447A (en) * 1988-11-18 1990-05-15 Hewlett-Packard Company Phase locked loop for clock extraction in gigabit rate data communication links
JPH02179046A (ja) * 1988-12-28 1990-07-12 Nec Corp 信号符号化方式
US5241543A (en) * 1989-01-25 1993-08-31 Hitachi, Ltd. Independent clocking local area network and nodes used for the same
US5077724A (en) * 1989-05-22 1991-12-31 Del Mar Avionics Optical tape cartridge
JP2777929B2 (ja) * 1990-07-04 1998-07-23 富士通株式会社 非同期信号抽出回路
US5184350A (en) * 1991-04-17 1993-02-02 Raytheon Company Telephone communication system having an enhanced timing circuit
JPH0522262A (ja) * 1991-06-21 1993-01-29 Matsushita Electric Ind Co Ltd データ伝送方式および送信装置と受信装置ならびに伝送制御方式
EP0530030B1 (en) * 1991-08-30 1998-12-16 Nec Corporation Circuit for detecting a synchronizing signal in frame synchronized data transmission

Also Published As

Publication number Publication date
EP0695487B1 (en) 2002-03-06
JPH08509108A (ja) 1996-09-24
US5724360A (en) 1998-03-03
NO954086D0 (no) 1995-10-13
SE9301327L (sv) 1994-10-22
AU6585394A (en) 1994-11-08
KR960702234A (ko) 1996-03-28
FI954971A0 (fi) 1995-10-18
CN1121755A (zh) 1996-05-01
SE501156C2 (sv) 1994-11-28
SE9301327D0 (sv) 1993-04-21
WO1994024793A1 (en) 1994-10-27
DE69430055D1 (de) 2002-04-11
BR9406331A (pt) 1995-12-26
EP0695487A1 (en) 1996-02-07
CA2159190A1 (en) 1994-10-27
AU675840B2 (en) 1997-02-20
FI954971A (fi) 1995-10-18
KR100311591B1 (ko) 2001-12-17

Similar Documents

Publication Publication Date Title
US5919265A (en) Source synchronization data transfers without resynchronization penalty
KR960013655B1 (ko) 고선명 텔레비젼 수상기의 데이터 세그먼트 동기신호검출기
NO954086L (no) Sammensatt klokke-signal
US6178216B1 (en) Digital phase locked loop circuit and method therefor
JPH0748725B2 (ja) フレーム同期回路
US5222107A (en) Transmission and reception synchronization device for a communication network station particularly for automotive vehicles
US7133483B1 (en) Apparatus and method for a jitter cancellation circuit
JP3063291B2 (ja) 回線監視回路
JPH10242951A (ja) 疑似ランダムパターン同期引き込み回路
JPH01503029A (ja) 低周波信号の高周波数分解能を得る方法および装置
JPH036142A (ja) フレーム同期方式
SU1539816A1 (ru) Устройство дл сокращени избыточности дискретной информации
SU944137A1 (ru) Устройство цикловой синхронизации
JPH0568025A (ja) クロツク乗換回路
JPH02112342A (ja) フレーム重畳クロック分配装置
KR970024375A (ko) 디지탈 전전자 교환기의 동기장치(An apparatus for synchronizing system clock to network in a digital exchanger)
JPH0481376B2 (no)
JPH05259837A (ja) 論理回路のグリッチ除去回路
KR20010048983A (ko) 딜레이 락 루프 회로
JPH06169298A (ja) 多重クロック伝送方法および装置
JPH06237247A (ja) データ伝送方式
JPS628636A (ja) フレ−ム同期装置
KR19980026770A (ko) 코덱 인터페이스 회로
JPH05284131A (ja) チャネル抽出回路
JPH0370227A (ja) フレーム同期回路

Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application