KR970072489A - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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KR970072489A
KR970072489A KR1019960010151A KR19960010151A KR970072489A KR 970072489 A KR970072489 A KR 970072489A KR 1019960010151 A KR1019960010151 A KR 1019960010151A KR 19960010151 A KR19960010151 A KR 19960010151A KR 970072489 A KR970072489 A KR 970072489A
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forming
insulating film
semiconductor layer
layer
doping
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KR1019960010151A
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KR100191786B1 (ko
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서성모
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구자홍
Lg 전자 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 박막트랜지스터 제조방법은 다결정실리콘층을 형성하고, 이어서 게이트전극을 마스크로 하여 이온을 도핑한 후, 게이트전극에 측면절연막을 형성하고 레이저를 조사하여 반도체층을 소스/드레인영역, LDD영역 및 채널층으로 형성한다. 소스/드레인영역은 다결정실리콘으로 불순물층이고, LDD영역은 비정질실리콘과 다결정실리콘이 혼합된 불순물층이며, 채널층은 다결정실리콘층이다. 반도체층에 대한 이온의 도핑시 먼저 측면절연막을 형성한 후, 이온을 도핑하면 반도체층에는 오프셋영역이 형성된다.

Description

박막트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명의 일실시예에 따른 박막트랜지스터 제조방법을 나타내는 도면, 제5도는 본 발명의 다른 실시예에 따른 박막트랜지스터 제조방법을 나타내는 도면.

Claims (7)

  1. 기판 위에 반도체층을 형성하는 단계와, 상기 반도체층을 패터닝한 후, 절연막과 금속막을 성막하는 단계와, 상기한 금속막 및 절연막을 패터닝하여 게이트전극과 게이트절연막을 형성한 후, 상기한 게이트전극을 마스크로 하여 상기한 반도체층에 불순물 이온을 도핑하는 단계와, 상기한 게이트전극에 측면절연막을 형성한 후, 불순물 이온이 도핑된 상기한 반도체층에 레이저를 조사하여 소스/드레인영역, LDD영역 및 채널층을 형성하는 단계와, 상기한 기판 전체에 걸쳐서 층간절연막을 성막하고 컨택트홀을 형성한 후, 소스/드레인전극을 형성하는 단계로 구성된 박막트랜지스터 제조방법.
  2. 제1항에 있어서, 상기한 불순물 이온의 도핑이 이온샤우워도핑에 의해 이루어지는 것을 특징으로 하는 박막트랜지스터 제조방법.
  3. 제1항에 있어서, 상기한 측면절연막이 등방성식각에 의해 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
  4. 제1항에 있어서, 상기한 LDD영역이 비정질실리콘과 다결정실리콘층이 혼합된 불순물층인 것을 특징으로 하는 박막트랜지스터 제조방법.
  5. 기판 위에 반도체층을 형성하는 단계와, 상기한 반도체층을 패터닝한 후, 절연막과 금속막을 성막하는 단계와, 상기한 금속막 및 절연막을 패터닝하여 게이트전극과 게이트절연막을 형성하고 측면절연막을 형성한 후, 상기한 반도체층에 불순물 이온을 도핑하는 단계와, 불수물 이온이 도핑된 상기한 반도체층에 레이저를 조사하여 소스/드레인영역, 오프셋영역 및 채널층을 형성하는 단계와, 상기한 기판 전체에 걸쳐서 층간절연막을 성막하고 컨택트홀을 형성한 후, 소스/드레인전극을 형성하는 단계로 구성된 박막트랜지스터 제조방법.
  6. 제5항에 있어서, 상기한 불순물 이온의 도핑이 이온샤우워도핑에 의해 이루어지는 것을 특징으로 하는 박막트랜지스터 제조방법.
  7. 제5항에 있어서, 상기한 측면절연막이 등방성식각에 의해 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
    ※참고사항: 최초출원 내용에 의하여 공개하는 것임.
KR1019960010151A 1996-04-04 1996-04-04 박막트랜지스터의 제조방법 KR100191786B1 (ko)

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KR1019960010151A KR100191786B1 (ko) 1996-04-04 1996-04-04 박막트랜지스터의 제조방법

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KR100773359B1 (ko) 2006-11-20 2007-11-05 삼성전자주식회사 높은 이동도를 갖는 트랜지스터들의 제조방법 및 그에 의해제조된 트랜지스터들

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