KR970013919A - Low speed data frame inverter - Google Patents
Low speed data frame inverter Download PDFInfo
- Publication number
- KR970013919A KR970013919A KR1019950026034A KR19950026034A KR970013919A KR 970013919 A KR970013919 A KR 970013919A KR 1019950026034 A KR1019950026034 A KR 1019950026034A KR 19950026034 A KR19950026034 A KR 19950026034A KR 970013919 A KR970013919 A KR 970013919A
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- KR
- South Korea
- Prior art keywords
- frame
- dsob
- unit
- synchronization signal
- data
- Prior art date
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- Synchronisation In Digital Transmission Systems (AREA)
Abstract
본 발명은 저속데이타 프레임 변환에 관한 것으로, 특히 서로 상이한 다중 방식을 갖는 DDS의 DSOB와 CCITT X.50와의 프레임을 상호 변환 가능토록 하여 외부 중계장치 없이도 상호 데이타 접속이 가능하도록 한 저속데이타 프레임 변환장치에 관한 것이다.The present invention relates to low-speed data frame conversion, and in particular, a low-speed data frame conversion device that enables mutual data connection without an external relay device by enabling conversion of a frame between a DSOB and a CCITT X.50 of a DDS having different multiple systems. It is about.
이러한 본 발명은 하이웨이를 통해 다중 처리된 데이타가 인가되면 각 다중방식의 프레임을 추출하여 동기신호로 출력하는 프레임 추출수단과, 프레임 추출수단에서 얻어지는 동기신호에 따라 DSOB 및 X.50 프레임을 발생시키는 프레임 발생수단과, 프레임 발생수단에서 발생된 DSOB 프레임 또는 X.50 프레임을 인가되는 선택신호에 의해 선택하여 출력시키는 프레임 선택수단과, 프레임 동기신호에 따라 프레임 선택수단에서 출력되는 프레임과 상기 하이웨이를 통해 인가되는 프레임을 제외한 데이타와를 가산하여 저속데이타로 출력하는 프레임 가산수단으로 이루어진다.The present invention is characterized in that the frame extraction means for extracting each multi-frame frame and output as a synchronization signal when the data processed by the multi-way is applied, and generates the DSOB and X.50 frame according to the synchronization signal obtained from the frame extraction means Frame selection means for selecting and outputting a DSOB frame or X.50 frame generated by the frame generating means by a selection signal applied thereto, a frame output from the frame selection means according to a frame synchronizing signal, and the highway Frame addition means for adding data except for a frame applied through and outputting the data as low speed data.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 3 도는 본 발명에 의한 저속데이타 프레임 변환장치 구성도,3 is a block diagram of a low speed data frame converter according to the present invention;
제 5 도는 본 발명을 설명하기 위한 송, 수신파형도,5 is a diagram illustrating a transmission and reception waveform for explaining the present invention;
제 6 도는 제 3 도의 X.50/DSOB 디프레이머부 상세구성도,6 is a detailed configuration diagram of the X.50 / DSOB deframer part of FIG.
제 7 도는 제 3 도의 X.50/DSOB 프레이머부 상세구성도.7 is a detailed configuration diagram of the X.50 / DSOB framer part of FIG.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950026034A KR970013919A (en) | 1995-08-22 | 1995-08-22 | Low speed data frame inverter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950026034A KR970013919A (en) | 1995-08-22 | 1995-08-22 | Low speed data frame inverter |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970013919A true KR970013919A (en) | 1997-03-29 |
Family
ID=66595441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950026034A KR970013919A (en) | 1995-08-22 | 1995-08-22 | Low speed data frame inverter |
Country Status (1)
Country | Link |
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KR (1) | KR970013919A (en) |
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1995
- 1995-08-22 KR KR1019950026034A patent/KR970013919A/en not_active Application Discontinuation
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