KR950022358A - Frame Shift Synchronization Circuit of Digital Transmission System - Google Patents
Frame Shift Synchronization Circuit of Digital Transmission System Download PDFInfo
- Publication number
- KR950022358A KR950022358A KR1019930031302A KR930031302A KR950022358A KR 950022358 A KR950022358 A KR 950022358A KR 1019930031302 A KR1019930031302 A KR 1019930031302A KR 930031302 A KR930031302 A KR 930031302A KR 950022358 A KR950022358 A KR 950022358A
- Authority
- KR
- South Korea
- Prior art keywords
- data
- frame
- shift
- input
- frame shift
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1036—Read-write modes for single port memories, i.e. having either a random port or a serial port using data shift registers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
특정 프레임 단위로 송수신되는 데이터의 프레임 동기가 이루어 지지 않았을때 데이터를 시프트하여 프레임 동기를 실행하는 디지털 전송 시스템의 프레임 시프트 회로를 제공한다. 상기의 회로는 각각의 데이터 단자로 입력되는 직렬 데이터를 시스템 클럭의 입력에 응답하여 시프트 출력하는 시프트 레지스터 수단들과, 상기 프레임 동기회로로 부터 출력되는 슬립신호(SLIP)의 입력을 카운팅하여 프레임 시프트 데이터를 출력하는 슬립 카운팅 수단과, 상기 슬립 카운팅 수단으로부터 출력되는 프레임 시프트 데이터의 입력에 응답하여 상기 프레임 시프트 데이터에 대응된 위치의 시프트 데이터 비트를 선택하여 출력하는 선택수단들을 포함하며, 상기 슬립신호가 발생시 마다 순차 시프트된 위치의 데이터를 출력토록 동작된다.Provided is a frame shift circuit of a digital transmission system that performs frame synchronization by shifting data when frame synchronization of data transmitted and received in a specific frame unit is not performed. The above circuit includes a shift register means for shifting out and outputting serial data input to each data terminal in response to an input of a system clock, and a frame shift by counting an input of a sleep signal (SLIP) output from the frame synchronizing circuit. Slip counting means for outputting data, and selecting means for selecting and outputting shift data bits at positions corresponding to the frame shift data in response to input of frame shift data output from the slip counting means, wherein the sleep signal Each time is generated, data is outputted at the sequentially shifted position.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 따른 디지털 전송 시스템의 프레임 시프트 동기 회로도.2 is a frame shift synchronization circuit diagram of a digital transmission system according to the present invention.
제3도는 제2도에 도시된 일부분의 구체 회로도.3 is a detailed circuit diagram of a portion shown in FIG.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930031302A KR100199187B1 (en) | 1993-12-30 | 1993-12-30 | Frame shift sync. circuit of digital transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930031302A KR100199187B1 (en) | 1993-12-30 | 1993-12-30 | Frame shift sync. circuit of digital transmission system |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950022358A true KR950022358A (en) | 1995-07-28 |
KR100199187B1 KR100199187B1 (en) | 1999-06-15 |
Family
ID=19374289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930031302A KR100199187B1 (en) | 1993-12-30 | 1993-12-30 | Frame shift sync. circuit of digital transmission system |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100199187B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100684564B1 (en) * | 2005-11-16 | 2007-02-20 | 엠텍비젼 주식회사 | Frame synchronization method and apparatus therefor |
-
1993
- 1993-12-30 KR KR1019930031302A patent/KR100199187B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100684564B1 (en) * | 2005-11-16 | 2007-02-20 | 엠텍비젼 주식회사 | Frame synchronization method and apparatus therefor |
Also Published As
Publication number | Publication date |
---|---|
KR100199187B1 (en) | 1999-06-15 |
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