KR970056530A - interface - Google Patents
interface Download PDFInfo
- Publication number
- KR970056530A KR970056530A KR1019950064358A KR19950064358A KR970056530A KR 970056530 A KR970056530 A KR 970056530A KR 1019950064358 A KR1019950064358 A KR 1019950064358A KR 19950064358 A KR19950064358 A KR 19950064358A KR 970056530 A KR970056530 A KR 970056530A
- Authority
- KR
- South Korea
- Prior art keywords
- data
- inertial measurement
- serial communication
- generating
- communication controller
- Prior art date
Links
Landscapes
- Communication Control (AREA)
Abstract
본 발명은 관성 측정 장치와 직렬 통신 컨트롤러 간에 직접적인 데이타 전송이 가능하도록 데이타 프레임을 맞춰주기 위한 인터페이스에 관한 것이다. 이 인터페이스는, 관성측정장치와 직렬 통신 컨트롤러 간에 데이타의 직접적인 전송을 가능케 하기 위한 인터페이스에 있어서; 상기 관성측정장치에서 데이타 전송을 워날때, 상기 컨트롤러로 입력되는 데이타 프레임의 주기를 동기시켜 주기 위해서 클럭신호를 발생하는 클럭발생부와; 초기화시 세팅된 SYNC character와 일치하는 데이타를 생성하고, 상기 클럭발생부에서 출력하는 클럭선호에 동기하여, 상기 직렬 통신 컨트롤러로 데이타를 울력하는 데이타 생성부와; 상기 데이타 생성부의 데이타 추력 후, 상기 관성측정장치에서 출력되는 데이타를 전송하는 데이타 전송부로 구성하는 것을 특징으로 한다.The present invention relates to an interface for fitting a data frame to enable direct data transmission between an inertial measurement device and a serial communication controller. This interface comprises: an interface for enabling direct transfer of data between the inertial measurement unit and the serial communication controller; A clock generator for generating a clock signal to synchronize a period of a data frame input to the controller when data transmission is lost in the inertial measurement unit; A data generation unit for generating data corresponding to the SYNC character set at initialization, and generating data to the serial communication controller in synchronization with a clock preference output from the clock generation unit; And a data transmission unit for transmitting data output from the inertial measurement unit after data thrust of the data generation unit.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 고안에 따르 인터페이스 회로도.2 is an interface circuit diagram according to the present invention.
제3도는 인터페이스 동작시 제2도에 도시된 직렬 통신 컨트롤러에서 수행되는 순서도.3 is a flow chart performed in the serial communication controller shown in FIG. 2 during interface operation.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950064358A KR970056530A (en) | 1995-12-29 | 1995-12-29 | interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950064358A KR970056530A (en) | 1995-12-29 | 1995-12-29 | interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR970056530A true KR970056530A (en) | 1997-07-31 |
Family
ID=66623534
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950064358A KR970056530A (en) | 1995-12-29 | 1995-12-29 | interface |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR970056530A (en) |
-
1995
- 1995-12-29 KR KR1019950064358A patent/KR970056530A/en not_active Application Discontinuation
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR940012831A (en) | Method and apparatus for controlling clock frequency to minimize power consumption of electronic circuits | |
| ES2113921T3 (en) | SYNCHRONOUS OF SDH DATA TRANSMISSION. | |
| KR970056530A (en) | interface | |
| KR950007335A (en) | Serial I / O Interface Device and Method | |
| TW371344B (en) | Circuit for generating internal column address suitable for burst mode | |
| KR960009398A (en) | Synchronous Clock Generation Circuit | |
| KR940005004A (en) | Interface circuit between transmission channel data transceiver and terminal | |
| KR960024803A (en) | Clock signal input device of synchronous memory device | |
| KR950002510A (en) | Serial interface circuit for subscriber board control of electronic exchange | |
| KR960043659A (en) | Interface for I²C Protocol Support | |
| TW342501B (en) | Data input circuit including echo clock generator | |
| KR970031570A (en) | A synchronous overhead transmitter of a synchronous transmission system | |
| JPS57133741A (en) | Synchronizing line connector | |
| KR970008769A (en) | Synchronization Control Device | |
| KR920020863A (en) | T1 Stuffing 8B6T Code Converter | |
| KR950005075A (en) | Voice data transmission circuit | |
| KR920017407A (en) | Data transmission device | |
| KR970055934A (en) | Frame sync signal generator of personal communication terminal | |
| KR970056015A (en) | Low speed combined control channel interrupt signal generator during downlink of personal communication terminal | |
| KR960035280A (en) | Window control device of time slot according to frame in synchronous network | |
| KR940012139A (en) | Bus relay circuit of long distance interface device | |
| PE103299A1 (en) | SYSTEM AND APPARATUS FOR GENERATION AND CONTROL OF THE TIMING SIGNAL | |
| KR970078190A (en) | Matching circuit between the SPM device and the PCM | |
| KR950013100A (en) | Data frame sync bit generator in synchronous data link control / high level data link control (SDLC / HDLC) communication | |
| KR900002158A (en) | Transmission and reception clock supply method of data terminal device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E902 | Notification of reason for refusal | ||
| E601 | Decision to refuse application |