KR960035280A - Window control device of time slot according to frame in synchronous network - Google Patents
Window control device of time slot according to frame in synchronous network Download PDFInfo
- Publication number
- KR960035280A KR960035280A KR1019950006993A KR19950006993A KR960035280A KR 960035280 A KR960035280 A KR 960035280A KR 1019950006993 A KR1019950006993 A KR 1019950006993A KR 19950006993 A KR19950006993 A KR 19950006993A KR 960035280 A KR960035280 A KR 960035280A
- Authority
- KR
- South Korea
- Prior art keywords
- window
- time slot
- synchronization
- signal
- generator
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
Abstract
본 타임슬롯의 윈도우제어장치는 동기망에 있어서 프레임에 따른 타임슬롯의 윈도우를 생성하는 회로를 간소화하기 위한 것이다. 이를 위하여 본 장치는 동기클럭신호와 시트템 동기신호가 인가되면, 동기리세트신호를 생성하는 동기리세트신호 생성부; 프로세서로부터 제공되는 송신 타임슬롯 데이이타에 대응되는 타임슬롯의 윈도우신호를 동기리세트신호 생성부에서 생성되는 동기리세트신호에 동기시켜 대응되는 타임슬롯으로 윈도우 신호를 출력하는 송신동기 제어기; 제공되는 수신 타임슬롯 데이타에 대응되는 타임슬롯의 윈도우신호를 동기리세트신호 생성부에서 생성되는 동기리세트신호에 동기시켜 출력하는 수신 타임슬롯 윈도우 발생기; 수신 타임슬롯 윈도우 발생기에서 발생되는 윈도우신호를 동기클럭신호에 동기시켜 대응되는 타임스롯으로 윈도우를 출력하는 수신 동기 제어기를 포함하도록 구성된다.The window control apparatus of this time slot is for simplifying the circuit which generates the window of the time slot according to a frame in a synchronization network. To this end, the apparatus includes a synchronous reset signal generator for generating a synchronous reset signal when a synchronous clock signal and a system synchronous signal are applied; A transmission synchronization controller for outputting a window signal to a corresponding time slot by synchronizing a window signal of a time slot corresponding to a transmission time slot data provided from a processor with a synchronization reset signal generated by a synchronization reset signal generator; A reception time slot window generator configured to output a window signal of a time slot corresponding to the received reception time slot data in synchronization with a synchronization reset signal generated by the synchronization reset signal generator; And a reception synchronization controller configured to output a window to a corresponding time slot by synchronizing the window signal generated by the reception timeslot window generator with the synchronization clock signal.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 따른 동기망에 있어서 프레임에 따른 타임슬롯의 윈도우제어장치의 블럭도.2 is a block diagram of a window control apparatus for timeslots according to frames in a synchronization network according to the present invention.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950006993A KR0154465B1 (en) | 1995-03-30 | 1995-03-30 | Apparatus for controlling the window of time slot according to frame in the synchronous network |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950006993A KR0154465B1 (en) | 1995-03-30 | 1995-03-30 | Apparatus for controlling the window of time slot according to frame in the synchronous network |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960035280A true KR960035280A (en) | 1996-10-24 |
KR0154465B1 KR0154465B1 (en) | 1998-11-16 |
Family
ID=19410884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950006993A KR0154465B1 (en) | 1995-03-30 | 1995-03-30 | Apparatus for controlling the window of time slot according to frame in the synchronous network |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0154465B1 (en) |
-
1995
- 1995-03-30 KR KR1019950006993A patent/KR0154465B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0154465B1 (en) | 1998-11-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR960035280A (en) | Window control device of time slot according to frame in synchronous network | |
KR970055933A (en) | Uplink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal | |
KR970055980A (en) | Low speed combined control channel interrupt signal generator during uplink of personal communication terminal | |
KR970055981A (en) | Independent control channel interrupt signal generator during uplink of personal communication terminal | |
KR970056015A (en) | Low speed combined control channel interrupt signal generator during downlink of personal communication terminal | |
KR970058151A (en) | Downlink independent control channel data strobe signal generator of personal communication terminal | |
KR960006380A (en) | Delay Circuit for Data Clock Signal | |
KR970056007A (en) | Traffic channel strobe signal generator of personal communication terminal | |
KR970056008A (en) | Low speed combined control channel strobe signal generator in downlink of personal communication terminal | |
KR970056013A (en) | Independent control channel interrupt signal generator during downlink of personal communication terminal | |
KR970055982A (en) | Low speed combined control channel interrupt signal generator during uplink of personal communication terminal | |
KR970056006A (en) | Independent control channel interrupt signal generator during downlink of personal communication terminal | |
KR970056005A (en) | Call channel shift clock signal generator of personal communication terminal | |
KR970056033A (en) | Independent control channel interrupt signal generator during uplink of personal communication terminal | |
KR970055932A (en) | Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal | |
KR970056001A (en) | Random access channel shift clock signal generator of personal communication terminal | |
KR970055923A (en) | Time slot synchronization signal generator of personal communication terminal | |
KR970058153A (en) | Traffic channel strobe signal generator of personal communication terminal | |
KR970056004A (en) | Low speed coupled control channel shift clock signal generator during uplink of personal communication terminal | |
KR970055983A (en) | Low speed combined control channel strobe signal generator in uplink of personal communication terminal | |
KR970055931A (en) | Uplink traffic channel strobe signal generator for assigned timeslot of personal communication terminal | |
KR960009398A (en) | Synchronous Clock Generation Circuit | |
KR960006381A (en) | Frame Sync Reset Signal Generation Circuit | |
KR920003722A (en) | External frame synchronization circuit of exchange system | |
KR970055926A (en) | Synchronization signal generator for assigned time slot of personal communication terminal |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20070627 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |