KR970055923A

KR970055923A - Time slot synchronization signal generator of personal communication terminal

Info

Publication number: KR970055923A
Application number: KR1019950059547A
Authority: KR
Inventors: 곽재봉
Original assignee: 유기범; 대우통신 주식회사
Priority date: 1995-12-27
Filing date: 1995-12-27
Publication date: 1997-07-31
Also published as: KR0169767B1

Abstract

본 말명은 휴대용 전화기 등의 개인통신장치에 있어서 기지국으로부터 송신되어 온 프레임개시신호를 근거로 각 타임슬롯(Time Slot)에 대한 동기신호를 생성하도록 된 개인통신 시스템용 단말기의 타임슬롯 동기신호 발생장치에 관한 것으로서, 13MHz의 클록을 기준으로 하여 각 데이터 비트를 48클록의 길이를 함과 더불어, 156.25비트로 하나의 타임슬롯을 구성하도록 된 개인통신 시스템에 있어서, 13MHz의 기준클록을 생성하는 클록발생수단과, 상기 기준클록을 계수하여 그 계수치가 48이 되면 소정의 클록신호를 출력하는 비트동기신호 발생수단, 상기 비트동기신호를 계수하여 그 계수치가 156이 되면 소정의 타이밍신호를 출력하는 156계수수단, 상기 156계수수단으로부터 타이밍신호가 입력되면 상기 기준클록을 계수하여, 그 계수치가 12가 되면 소정의 클록신호를 타임슬롯 동기신호로서 출력하는 12계수수단 및, 상기 비트동기신호와 프레임개시신호를 근거로 상기 비트동기발생수단을 리셋트시킴과 더불어, 상기 12계수수단으로부터 출력되는 타임슬롯 동기신호를 근거로 장치 전체를 리셋트시키는 리셋트수단을 포함하여 구성된 것을 특징으로 한다.The present invention refers to a device for generating a time slot synchronization signal of a terminal for a personal communication system that generates a synchronization signal for each time slot based on a frame start signal transmitted from a base station in a personal communication device such as a portable telephone. A clock generating means for generating a reference clock of 13 MHz in a personal communication system configured to form a time slot of 156.25 bits with each data bit having a length of 48 clocks based on a 13 MHz clock. And a bit synchronous signal generating means for counting the reference clock and outputting a predetermined clock signal when the count value reaches 48, and a 156 counting means for counting the bit synchronous signal and outputting a predetermined timing signal when the count value reaches 156. When the timing signal is inputted from the 156 counting means, the reference clock is counted. 12 counting means for outputting a clock signal as a time slot synchronizing signal, and resetting the bit synchronizing means based on the bit synchronizing signal and the frame start signal, and outputting the time slot synchronizing signal outputted from the 12 counting means. And reset means for resetting the entire apparatus on the basis of the above.

Description

Time slot synchronization signal generator of personal communication terminal

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 1실시예에 따른 개인통신용 단말기의 타임슬롯 동기신호 발생장치의 구성을 나타낸 회도구성도.3 is a circuit diagram showing the configuration of a time slot synchronization signal generator of a personal communication terminal according to an embodiment of the present invention.

Claims

In a personal communication system configured to form a time slot of 156.25 bits with each data bit having a length of 48 clocks based on a 13 MHz clock, clock generation means for generating a reference clock of 13 MHz, and the reference. Bit synchronous signal generating means for counting a clock and outputting a predetermined clock signal when the count value reaches 48, 156 counting means for counting the bit synchronous signal and outputting a predetermined timing signal when the count value reaches 156, the 156 coefficient 12 counting means for counting the reference clock when a timing signal is input from the means, and outputting a predetermined clock signal as a time slot synchronization signal when the count value reaches 12, and the bit based on the bit synchronization signal and the frame start signal. In addition to resetting the synchronization generating means, the entire apparatus is reset based on the time slot synchronization signal outputted from the 12 counting means. Key and a time slot synchronization signal generation device of the terminal for personal communication systems, characterized in that is configured including a reset means.

※ Note: The disclosure is based on the initial application.