TW354395B - A bus interface synchronous system for synchronously system clock and the inner clock of a central processing unit, comprising: - Google Patents
A bus interface synchronous system for synchronously system clock and the inner clock of a central processing unit, comprising:Info
- Publication number
- TW354395B TW354395B TW084105329A TW84105329A TW354395B TW 354395 B TW354395 B TW 354395B TW 084105329 A TW084105329 A TW 084105329A TW 84105329 A TW84105329 A TW 84105329A TW 354395 B TW354395 B TW 354395B
- Authority
- TW
- Taiwan
- Prior art keywords
- clock
- processing unit
- central processing
- synchronous
- bus interface
- Prior art date
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Abstract
A bus interface synchronous system for synchronously system clock and the inner clock of a central processing unit, comprising: a synchronous device for inputting an input signal synchronous with system clock and the inner clock signal of the central processing unit, and converting the input signal synchronous to the system clock to a first signal output; a logic processing device for inputting the signal synchronous to the inner clock of the central processing unit and outputted from the synchronous device, and inputting signal synchronous to the inner clock of other central processing unit for performing logic processing, and the inner clock of the central processing unit is M times or N x 5 times of the system clocking signal, M and N are integer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW084105329A TW354395B (en) | 1995-05-26 | 1995-05-26 | A bus interface synchronous system for synchronously system clock and the inner clock of a central processing unit, comprising: |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW084105329A TW354395B (en) | 1995-05-26 | 1995-05-26 | A bus interface synchronous system for synchronously system clock and the inner clock of a central processing unit, comprising: |
Publications (1)
Publication Number | Publication Date |
---|---|
TW354395B true TW354395B (en) | 1999-03-11 |
Family
ID=57940201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084105329A TW354395B (en) | 1995-05-26 | 1995-05-26 | A bus interface synchronous system for synchronously system clock and the inner clock of a central processing unit, comprising: |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW354395B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6904536B2 (en) | 2000-06-29 | 2005-06-07 | Kabushiki Kaisha Toshiba | Semiconductor circuit and functional block including synchronizing circuit for determining operation timing |
-
1995
- 1995-05-26 TW TW084105329A patent/TW354395B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6904536B2 (en) | 2000-06-29 | 2005-06-07 | Kabushiki Kaisha Toshiba | Semiconductor circuit and functional block including synchronizing circuit for determining operation timing |
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MM4A | Annulment or lapse of patent due to non-payment of fees |