JPS5563446A - Clock control system in board inspection - Google Patents

Clock control system in board inspection

Info

Publication number
JPS5563446A
JPS5563446A JP13702878A JP13702878A JPS5563446A JP S5563446 A JPS5563446 A JP S5563446A JP 13702878 A JP13702878 A JP 13702878A JP 13702878 A JP13702878 A JP 13702878A JP S5563446 A JPS5563446 A JP S5563446A
Authority
JP
Japan
Prior art keywords
clock
switch
input terminal
board inspection
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13702878A
Other languages
Japanese (ja)
Inventor
Takayuki Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13702878A priority Critical patent/JPS5563446A/en
Publication of JPS5563446A publication Critical patent/JPS5563446A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To speed up the processing speed, by transferring the basic clock to the computer in normal case and the slow clock to it in using the board pull-out tool at maintenance, in the synchronous type computer.
CONSTITUTION: The basic clock 11a of a given period is obtained from the clock generator 11, and it is directly inputted to the input terminal A of the switch 12, and the clock 13a twice in the period of the basic clock 11a is obtained from the double counter 13 and it is inputted to the input terminal B of the switch 12. At normal case, the switch 12 outputs the input signal to the input terminal A and transfers the basic clock 11a to the computer 14, and the input signal to the input terminal B is outputted through the selection of the switch 12 at the board inspection and the clock 13a twice in the period is transferred.
COPYRIGHT: (C)1980,JPO&Japio
JP13702878A 1978-11-07 1978-11-07 Clock control system in board inspection Pending JPS5563446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13702878A JPS5563446A (en) 1978-11-07 1978-11-07 Clock control system in board inspection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13702878A JPS5563446A (en) 1978-11-07 1978-11-07 Clock control system in board inspection

Publications (1)

Publication Number Publication Date
JPS5563446A true JPS5563446A (en) 1980-05-13

Family

ID=15189149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13702878A Pending JPS5563446A (en) 1978-11-07 1978-11-07 Clock control system in board inspection

Country Status (1)

Country Link
JP (1) JPS5563446A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57121744A (en) * 1981-01-20 1982-07-29 Toshiba Corp Integrated circuit device
JPS5840642A (en) * 1981-09-04 1983-03-09 Anritsu Corp Emulator clock circuit
JPH01205241A (en) * 1988-02-10 1989-08-17 Nec Corp Debugging device
JP2002070958A (en) * 2000-08-30 2002-03-08 Hitachi Ltd Transmitting mechanism and vehicle provided with this transmitting mechanism

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57121744A (en) * 1981-01-20 1982-07-29 Toshiba Corp Integrated circuit device
JPS6360421B2 (en) * 1981-01-20 1988-11-24
JPS5840642A (en) * 1981-09-04 1983-03-09 Anritsu Corp Emulator clock circuit
JPH0115096B2 (en) * 1981-09-04 1989-03-15 Anritsu Corp
JPH01205241A (en) * 1988-02-10 1989-08-17 Nec Corp Debugging device
JP2002070958A (en) * 2000-08-30 2002-03-08 Hitachi Ltd Transmitting mechanism and vehicle provided with this transmitting mechanism

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