JPS53149725A - Simulator - Google Patents
SimulatorInfo
- Publication number
- JPS53149725A JPS53149725A JP6448977A JP6448977A JPS53149725A JP S53149725 A JPS53149725 A JP S53149725A JP 6448977 A JP6448977 A JP 6448977A JP 6448977 A JP6448977 A JP 6448977A JP S53149725 A JPS53149725 A JP S53149725A
- Authority
- JP
- Japan
- Prior art keywords
- simulator
- input signal
- clock
- clock signal
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE: To facilitate the operation confirmation of a clock-synchronous processor, by setting the speed of a clock signal freely and by displaying an input signal as well as synchronizing the set clock signal to the input signal.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6448977A JPS53149725A (en) | 1977-06-01 | 1977-06-01 | Simulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6448977A JPS53149725A (en) | 1977-06-01 | 1977-06-01 | Simulator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53149725A true JPS53149725A (en) | 1978-12-27 |
Family
ID=13259665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6448977A Pending JPS53149725A (en) | 1977-06-01 | 1977-06-01 | Simulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53149725A (en) |
-
1977
- 1977-06-01 JP JP6448977A patent/JPS53149725A/en active Pending
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