KR960023218A - 확산방지용 금속층 형성방법 - Google Patents

확산방지용 금속층 형성방법 Download PDF

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Publication number
KR960023218A
KR960023218A KR1019940032859A KR19940032859A KR960023218A KR 960023218 A KR960023218 A KR 960023218A KR 1019940032859 A KR1019940032859 A KR 1019940032859A KR 19940032859 A KR19940032859 A KR 19940032859A KR 960023218 A KR960023218 A KR 960023218A
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KR
South Korea
Prior art keywords
layer
diffusion barrier
forming
metal layer
metal
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KR1019940032859A
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English (en)
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KR0144085B1 (ko
Inventor
최경근
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김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940032859A priority Critical patent/KR0144085B1/ko
Priority to US08/555,112 priority patent/US5670420A/en
Publication of KR960023218A publication Critical patent/KR960023218A/ko
Application granted granted Critical
Publication of KR0144085B1 publication Critical patent/KR0144085B1/ko

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864—Thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H01L21/76852—Barrier, adhesion or liner layers the layer covering a conductive structure the layer also covering the sidewalls of the conductive structure
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/927—Electromigration resistant metallization

Abstract

본 발명은 반도체 소자 제조 공정 중 상부층과 하부층 사이의 원자 이동을 방지하는 확산방지용 금속층 형성 방법에 관한 것으로, 확산방지층으로 형성하고자 하는 금속층을 이온주입법으로 형성함으로써 깊고 좁은 콘택에서 금속원자의 실리콘기판으로의 확산을 막고 산화막 위에서 쉽게 구리를 증착하여 우수한 금속화 공정을 수행할 수 있다.

Description

확산방지용 금속층 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1D도는 본 발명의 일실시예에 따른 확산방지층 형성 공정 단면도.

Claims (10)

  1. 반도체 소자 제조 공정 중 상부층과 하부층 사이의 원자 이동을 방지하는 확산방지용 금속층 형성방법에 있어서, 확산방지층으로 형성하고자 하는 금속층을 이온주입법으로 형성하는 것을 특징으로 하는 확산방지용 금속층 형성방법.
  2. 제1항에 있어서, 상기 확산방지층은 확산방지층 형성영역 상부에 확산방지용 금속을 이온주입하여 확산방지층을 형성하는 단계; 상기 확산방지층의 잔류물을 탈착시키고 열처리 하는 단계; 배선용 금속층을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 확산방지용 금속층 형성방법.
  3. 제2항에 있어서, 상기 배선용 금속층 형성 후 대기노출에 따른 금속선의 산화를 억제하기 위한 산화방지층을 형성하는 단계를 더 포함하여 이루어지는 것을 특징으로 하는 확산방지용 금속층 형성방법.
  4. 제2항에 있어서, 상기 확산방지층 형성영역은 반도체기판 상부의 산화층인 것을 특징으로 하는 확산방지용 금속층 형성방법.
  5. 제2항에 있어서, 상기 확산방지층은 3000 내지 5000Å 두께의 텅스텐층인 것을 특징으로 하는 확산방지용 금속층 형성방법.
  6. 제5항에 있어서, 상기 확산방지층은 WF6를 소스 기체로 사용하여 50 내지 150keV의 에너지, 1020내지 1022ions/cm2로 이온주입함으로써 형성되는 것을 특징으로 하는 확산방지용 금속층 형성방법.
  7. 제2항에 있어서, 상기 배선용 금속층은 구리층인 것을 특징으로 하는 확산방지용 금속층 형성방법.
  8. 제7항에 있어서, 상기 배선용 금속층은 MOCVD(Metal Organic CVD)법으로 증착되는 것을 특징으로 하는 확산방지용 금속층 형성방법.
  9. 제2항에 있어서, 상기 열처리 단계는 H2또는 N2분위기의 공정튜브에서 600℃의 온도에서 30 내지 90분 동안 열처리함으로써 이루어지는 것을 특징으로 하는 확산방지용 금속층 형성방법.
  10. 제3항에 있어서, 상기 산화방지층은 선택적 증착에 의한 텅스텐층인 것을 특징으로 하는 확산방지용 금속층 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940032859A 1994-12-05 1994-12-05 반도체 소자의 금속배선 형성방법 KR0144085B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019940032859A KR0144085B1 (ko) 1994-12-05 1994-12-05 반도체 소자의 금속배선 형성방법
US08/555,112 US5670420A (en) 1994-12-05 1995-11-08 Method of forming metal interconnection layer of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940032859A KR0144085B1 (ko) 1994-12-05 1994-12-05 반도체 소자의 금속배선 형성방법

Publications (2)

Publication Number Publication Date
KR960023218A true KR960023218A (ko) 1996-07-18
KR0144085B1 KR0144085B1 (ko) 1998-08-17

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KR100546173B1 (ko) * 1998-09-21 2006-04-14 주식회사 하이닉스반도체 반도체소자의 금속배선 형성방법
KR100615437B1 (ko) * 2001-12-12 2006-08-25 엘지.필립스 엘시디 주식회사 배리어층을 가지는 구리 배선의 식각 방법
US7521366B2 (en) 2001-12-12 2009-04-21 Lg Display Co., Ltd. Manufacturing method of electro line for liquid crystal display device

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Cited By (5)

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Publication number Priority date Publication date Assignee Title
KR100546173B1 (ko) * 1998-09-21 2006-04-14 주식회사 하이닉스반도체 반도체소자의 금속배선 형성방법
KR100615437B1 (ko) * 2001-12-12 2006-08-25 엘지.필립스 엘시디 주식회사 배리어층을 가지는 구리 배선의 식각 방법
US7521366B2 (en) 2001-12-12 2009-04-21 Lg Display Co., Ltd. Manufacturing method of electro line for liquid crystal display device
US7704767B2 (en) 2001-12-12 2010-04-27 Lg Display Co., Ltd. Manufacturing method of electro line for liquid crystal display device
US8148182B2 (en) 2001-12-12 2012-04-03 Lg Display Co., Ltd. Manufacturing method of electro line for liquid crystal display device

Also Published As

Publication number Publication date
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KR0144085B1 (ko) 1998-08-17

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